2015-10-29 20:36:54 +01:00
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EESchema Schematic File Version 2
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2016-02-19 14:20:06 +01:00
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LIBS:fpgna-rescue
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2015-10-29 20:36:54 +01:00
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LIBS:power
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LIBS:device
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LIBS:transistors
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LIBS:conn
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LIBS:linear
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LIBS:regul
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LIBS:74xx
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LIBS:cmos4000
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LIBS:adc-dac
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LIBS:memory
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LIBS:xilinx
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LIBS:microcontrollers
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LIBS:dsp
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LIBS:microchip
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LIBS:analog_switches
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LIBS:motorola
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LIBS:texas
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LIBS:intel
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LIBS:audio
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LIBS:interface
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LIBS:digital-audio
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LIBS:philips
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LIBS:display
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LIBS:cypress
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LIBS:siliconi
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LIBS:opto
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LIBS:atmel
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LIBS:contrib
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LIBS:valves
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LIBS:Oscillators
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2016-02-15 15:02:54 +01:00
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LIBS:lattice
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LIBS:pmic
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LIBS:specific-powersyms
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2016-02-15 18:20:08 +01:00
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LIBS:regulators
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2016-02-17 10:41:34 +01:00
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LIBS:stm32f4
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2016-02-18 15:59:42 +01:00
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LIBS:itead-displays
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2016-02-19 11:53:31 +01:00
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LIBS:ram
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2016-02-20 17:03:47 +01:00
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LIBS:connectors
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2016-02-20 22:50:36 +01:00
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LIBS:analog
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2015-10-29 20:36:54 +01:00
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LIBS:fpgna-cache
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EELAYER 25 0
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EELAYER END
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$Descr A4 11693 8268
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encoding utf-8
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2016-02-20 22:50:36 +01:00
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Sheet 1 9
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2015-10-29 20:36:54 +01:00
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Title "FPGna"
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Date ""
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Rev ""
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Comp "Shimatta"
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Comment1 ""
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Comment2 ""
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Comment3 ""
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Comment4 ""
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$EndDescr
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$Sheet
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2016-02-21 16:50:27 +01:00
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S 1750 2050 1000 1150
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2015-10-29 20:36:54 +01:00
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U 563244F7
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F0 "powersupply" 60
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F1 "power.sch" 60
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2016-02-21 16:50:27 +01:00
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F2 "CHG_ACTIVE_N" O R 2750 2300 60
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F3 "USB_PRESENT_N" O R 2750 2600 60
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F4 "CHARGE_ENABLE" I R 2750 2400 60
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F5 "SYS_VOLTAGE" O R 2750 2200 60
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F6 "FPGA_ENABLE_N" I R 2750 2500 60
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2016-02-22 08:53:49 +01:00
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F7 "BACKLIGHT_EN_N" I L 1750 2850 60
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2015-10-29 20:36:54 +01:00
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$EndSheet
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$Sheet
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2016-02-21 16:50:27 +01:00
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S 1750 3400 1000 1100
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2015-10-29 20:36:54 +01:00
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U 56337D98
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F0 "debug" 60
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F1 "debug.sch" 60
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2016-02-21 16:50:27 +01:00
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F2 "JTDI" O R 2750 3750 60
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F3 "JTMS" O R 2750 3550 60
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F4 "JTDO" I R 2750 4200 60
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F5 "JTCK" O R 2750 3650 60
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F6 "JRST_N" O R 2750 4300 60
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F7 "BOOT1" O R 2750 4400 60
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2015-10-29 20:36:54 +01:00
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$EndSheet
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2016-02-17 10:41:34 +01:00
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$Sheet
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2016-02-21 16:50:27 +01:00
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S 5900 3050 2050 2150
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2016-02-17 10:41:34 +01:00
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U 56C43C85
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F0 "FSMC" 60
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F1 "FSMC.sch" 60
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2016-02-21 16:50:27 +01:00
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F2 "BOOT1" I L 5900 4400 60
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F3 "JTDO" O L 5900 4200 60
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F4 "JRST_N" I L 5900 4300 60
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F5 "BL0_N" O R 7950 4300 60
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F6 "BL1_N" O R 7950 4400 60
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F7 "A[19..23]" O R 7950 4500 60
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F8 "SDIO_CMD" O L 5900 3200 60
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F9 "T_CS" O R 7950 3300 60
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F10 "T_CLK" O R 7950 3200 60
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F11 "T_DOUT" I R 7950 3500 60
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F12 "T_DIN" O R 7950 3400 60
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2016-02-22 08:53:49 +01:00
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F13 "BACKLIGHT_EN_N" O L 5900 4700 60
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2016-02-17 10:41:34 +01:00
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$EndSheet
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2016-02-18 15:59:42 +01:00
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$Sheet
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2016-02-21 16:50:27 +01:00
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S 8100 3050 1750 800
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2016-02-18 15:59:42 +01:00
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U 56C579FC
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F0 "display" 60
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F1 "display.sch" 60
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2016-02-21 16:50:27 +01:00
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F2 "T_CLK" I L 8100 3200 60
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F3 "T_CS" I L 8100 3300 60
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F4 "T_DIN" I L 8100 3400 60
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F5 "T_DOUT" O L 8100 3500 60
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F6 "T_BUSY" O R 9850 3300 60
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F7 "T_IRQ" O R 9850 3200 60
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2016-02-18 15:59:42 +01:00
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$EndSheet
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2016-02-19 11:53:31 +01:00
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$Sheet
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2016-02-21 16:50:27 +01:00
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S 8100 4150 1350 800
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2016-02-19 11:53:31 +01:00
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U 56C6F777
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F0 "sdram" 60
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F1 "sdram.sch" 60
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2016-02-21 16:50:27 +01:00
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F2 "A[19..23]" I L 8100 4500 60
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F3 "BL0_N" I L 8100 4300 60
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F4 "BL1_N" I L 8100 4400 60
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F5 "AWS" O R 9450 4250 60
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F6 "ABCK" O R 9450 4350 60
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F7 "L3MODE" O R 9450 4750 60
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F8 "L3DATA" O R 9450 4650 60
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F9 "ADATA" O R 9450 4550 60
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F10 "ACLK" O R 9450 4450 60
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2016-02-19 19:27:18 +01:00
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$EndSheet
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Wire Bus Line
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2016-02-21 16:50:27 +01:00
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8100 4500 7950 4500
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2016-02-19 19:27:18 +01:00
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Wire Wire Line
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2016-02-21 16:50:27 +01:00
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7950 4300 8100 4300
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2016-02-19 19:27:18 +01:00
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Wire Wire Line
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2016-02-21 16:50:27 +01:00
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8100 4400 7950 4400
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2016-02-19 19:27:18 +01:00
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$Sheet
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2016-02-21 16:50:27 +01:00
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S 4350 3050 1400 850
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2016-02-19 19:27:18 +01:00
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U 56C7DD81
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F0 "sdcard" 60
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F1 "sdcard.sch" 60
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2016-02-21 16:50:27 +01:00
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F2 "SDIO_CMD" I R 5750 3200 60
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F3 "T_IRQ" I L 4350 3200 60
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F4 "T_BUSY" I L 4350 3300 60
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F5 "SW_B" I L 4350 3600 60
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F6 "SW_A" I L 4350 3500 60
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F7 "SW_D" I L 4350 3800 60
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F8 "SW_C" I L 4350 3700 60
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F9 "SDCARD_DETECT" O L 4350 3400 60
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2016-02-19 11:53:31 +01:00
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$EndSheet
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2016-02-19 21:35:21 +01:00
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Wire Wire Line
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2016-02-21 16:50:27 +01:00
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7950 3200 8100 3200
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2016-02-19 21:35:21 +01:00
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Wire Wire Line
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2016-02-21 16:50:27 +01:00
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8100 3300 7950 3300
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2016-02-19 21:35:21 +01:00
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Wire Wire Line
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2016-02-21 16:50:27 +01:00
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7950 3400 8100 3400
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2016-02-19 21:35:21 +01:00
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Wire Wire Line
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2016-02-21 16:50:27 +01:00
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8100 3500 7950 3500
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2016-02-19 21:35:21 +01:00
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Wire Wire Line
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2016-02-21 16:50:27 +01:00
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9850 3200 9950 3200
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2016-02-19 21:35:21 +01:00
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Wire Wire Line
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2016-02-21 16:50:27 +01:00
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9950 3200 9950 2900
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2016-02-19 21:35:21 +01:00
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Wire Wire Line
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2016-02-21 16:50:27 +01:00
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9950 2900 4250 2900
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2016-02-19 21:35:21 +01:00
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Wire Wire Line
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2016-02-21 16:50:27 +01:00
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4200 2850 10000 2850
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2016-02-19 21:35:21 +01:00
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Wire Wire Line
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2016-02-21 16:50:27 +01:00
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10000 2850 10000 3300
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2016-02-19 21:35:21 +01:00
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Wire Wire Line
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2016-02-21 16:50:27 +01:00
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10000 3300 9850 3300
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2016-02-19 21:35:21 +01:00
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Wire Wire Line
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2016-02-21 16:50:27 +01:00
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5900 3200 5750 3200
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2016-02-19 21:35:21 +01:00
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Wire Wire Line
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2016-02-21 16:50:27 +01:00
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4250 2900 4250 3200
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2016-02-19 21:35:21 +01:00
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Wire Wire Line
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2016-02-21 16:50:27 +01:00
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4250 3200 4350 3200
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2016-02-20 22:50:36 +01:00
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Wire Wire Line
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2016-02-21 16:50:27 +01:00
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4350 3300 4200 3300
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2016-02-20 22:50:36 +01:00
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Wire Wire Line
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2016-02-21 16:50:27 +01:00
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4200 3300 4200 2850
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2016-02-20 22:50:36 +01:00
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Wire Wire Line
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2016-02-21 16:50:27 +01:00
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2750 4400 5900 4400
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2016-02-20 22:50:36 +01:00
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Wire Wire Line
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2016-02-21 16:50:27 +01:00
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5900 4300 2750 4300
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2016-02-20 22:50:36 +01:00
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Wire Wire Line
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2016-02-21 16:50:27 +01:00
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2750 4200 5900 4200
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$Sheet
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S 9600 4150 600 800
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U 56CA5D53
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F0 "audio" 60
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F1 "audio.sch" 60
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F2 "ACLK" I L 9600 4450 60
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F3 "ABCK" I L 9600 4350 60
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F4 "AWS" I L 9600 4250 60
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F5 "ADATA" I L 9600 4550 60
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F6 "L3MODE" I L 9600 4750 60
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F7 "L3DATA" I L 9600 4650 60
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$EndSheet
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2016-02-20 22:50:36 +01:00
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Wire Wire Line
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2016-02-21 16:50:27 +01:00
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9450 4250 9600 4250
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2016-02-20 22:50:36 +01:00
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Wire Wire Line
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2016-02-21 16:50:27 +01:00
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9450 4350 9600 4350
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2016-02-20 22:50:36 +01:00
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Wire Wire Line
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2016-02-21 16:50:27 +01:00
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9600 4450 9450 4450
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2016-02-20 22:50:36 +01:00
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Wire Wire Line
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2016-02-21 16:50:27 +01:00
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9450 4550 9600 4550
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2016-02-20 22:50:36 +01:00
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Wire Wire Line
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2016-02-21 16:50:27 +01:00
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9600 4650 9450 4650
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2016-02-20 22:50:36 +01:00
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Wire Wire Line
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2016-02-21 16:50:27 +01:00
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9450 4750 9600 4750
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2016-02-20 22:50:36 +01:00
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$Sheet
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2016-02-21 16:50:27 +01:00
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S 2900 2100 1200 1800
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U 56C86141
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F0 "userif" 60
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F1 "userif.sch" 60
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F2 "SW_A" O R 4100 3500 60
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F3 "SW_D" O R 4100 3800 60
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F4 "SW_B" O R 4100 3600 60
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F5 "SW_C" O R 4100 3700 60
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F6 "JTMS" I L 2900 3550 60
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F7 "JTCK" I L 2900 3650 60
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F8 "SYS_VOLTAGE" I L 2900 2200 60
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F9 "JTDI" I L 2900 3750 60
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F10 "CHG_ACTIVE_N" I L 2900 2300 60
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F11 "CHARGE_ENABLE" O L 2900 2400 60
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F12 "USB_PRESENT_N" I L 2900 2600 60
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F13 "FPGA_ENABLE_N" O L 2900 2500 60
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F14 "SDCARD_DETECT" I R 4100 3400 60
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2016-02-20 22:50:36 +01:00
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$EndSheet
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Wire Wire Line
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2016-02-21 16:50:27 +01:00
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2900 2200 2750 2200
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Wire Wire Line
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2750 2300 2900 2300
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Wire Wire Line
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2900 2400 2750 2400
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Wire Wire Line
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2900 2500 2750 2500
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Wire Wire Line
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2750 2600 2900 2600
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Wire Wire Line
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4100 3500 4350 3500
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Wire Wire Line
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4350 3600 4100 3600
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2016-02-20 22:50:36 +01:00
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Wire Wire Line
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2016-02-21 16:50:27 +01:00
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4100 3700 4350 3700
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2016-02-20 22:50:36 +01:00
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Wire Wire Line
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2016-02-21 16:50:27 +01:00
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4350 3800 4100 3800
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2016-02-19 22:33:42 +01:00
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Wire Wire Line
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2016-02-21 16:50:27 +01:00
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2900 3550 2750 3550
|
2016-02-19 22:33:42 +01:00
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Wire Wire Line
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2016-02-21 16:50:27 +01:00
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|
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2750 3650 2900 3650
|
2016-02-19 22:33:42 +01:00
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Wire Wire Line
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2016-02-21 16:50:27 +01:00
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2900 3750 2750 3750
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2016-02-19 22:33:42 +01:00
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Wire Wire Line
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2016-02-21 16:50:27 +01:00
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4350 3400 4100 3400
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2016-02-22 08:53:49 +01:00
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Wire Wire Line
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5900 4700 1650 4700
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Wire Wire Line
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1650 4700 1650 2850
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Wire Wire Line
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1650 2850 1750 2850
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2015-10-29 20:36:54 +01:00
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$EndSCHEMATC
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