fpgna/fpgna.sch

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2015-10-29 20:36:54 +01:00
EESchema Schematic File Version 2
LIBS:power
LIBS:device
LIBS:transistors
LIBS:conn
LIBS:linear
LIBS:regul
LIBS:74xx
LIBS:cmos4000
LIBS:adc-dac
LIBS:memory
LIBS:xilinx
LIBS:microcontrollers
LIBS:dsp
LIBS:microchip
LIBS:analog_switches
LIBS:motorola
LIBS:texas
LIBS:intel
LIBS:audio
LIBS:interface
LIBS:digital-audio
LIBS:philips
LIBS:display
LIBS:cypress
LIBS:siliconi
LIBS:opto
LIBS:atmel
LIBS:contrib
LIBS:valves
LIBS:lattice
LIBS:Oscillators
LIBS:fpgna-cache
EELAYER 25 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 1 3
Title "FPGna"
Date ""
Rev ""
Comp "Shimatta"
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
$Sheet
S 2800 1100 1300 850
U 563244F7
F0 "powersupply" 60
F1 "power.sch" 60
$EndSheet
$Sheet
S 5600 2300 2250 1800
U 56337D98
F0 "debug" 60
F1 "debug.sch" 60
$EndSheet
$EndSCHEMATC