fpgna/FSMC.sch

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2016-02-17 10:41:34 +01:00
EESchema Schematic File Version 2
LIBS:power
LIBS:device
LIBS:transistors
LIBS:conn
LIBS:linear
LIBS:regul
LIBS:74xx
LIBS:cmos4000
LIBS:adc-dac
LIBS:memory
LIBS:xilinx
LIBS:microcontrollers
LIBS:dsp
LIBS:microchip
LIBS:analog_switches
LIBS:motorola
LIBS:texas
LIBS:intel
LIBS:audio
LIBS:interface
LIBS:digital-audio
LIBS:philips
LIBS:display
LIBS:cypress
LIBS:siliconi
LIBS:opto
LIBS:atmel
LIBS:contrib
LIBS:valves
LIBS:Oscillators
LIBS:lattice
LIBS:pmic
LIBS:specific-powersyms
LIBS:regulators
LIBS:stm32f4
LIBS:fpgna-cache
EELAYER 25 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 4 4
Title ""
Date ""
Rev ""
Comp ""
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Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
$Comp
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$EndComp
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$EndComp
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$EndComp
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$EndComp
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2016-02-17 10:41:34 +01:00
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2016-02-17 20:30:12 +01:00
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2016-02-17 20:30:12 +01:00
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2016-02-17 20:30:12 +01:00
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2016-02-17 20:30:12 +01:00
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2016-02-17 20:30:12 +01:00
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2016-02-17 20:30:12 +01:00
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2016-02-17 20:30:12 +01:00
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2016-02-17 20:30:12 +01:00
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2016-02-17 10:41:34 +01:00
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2016-02-17 20:30:12 +01:00
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2016-02-17 20:30:12 +01:00
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2016-02-17 20:30:12 +01:00
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Connection ~ 7300 3250
Connection ~ 7300 3200
Connection ~ 7300 3100
Connection ~ 7300 3000
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Connection ~ 7300 2600
Connection ~ 7300 2500
Connection ~ 7300 2350
Connection ~ 7300 2400
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Connection ~ 7300 2200
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2016-02-17 20:30:12 +01:00
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$Comp
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2016-02-17 20:30:12 +01:00
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1 5950 6650
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$EndComp
$Comp
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$EndComp
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1 3800 6550
1 0 0 -1
$EndComp
Connection ~ 3800 6800
2016-02-17 20:30:12 +01:00
Wire Wire Line
5950 6650 5950 6750
Connection ~ 5950 6700
Wire Wire Line
5750 7050 5950 7050
Wire Wire Line
5750 6550 5750 6750
Wire Wire Line
5950 6700 5350 6700
Wire Wire Line
5350 6600 5750 6600
Connection ~ 5750 6600
Connection ~ 7400 5350
Wire Bus Line
2650 4200 3250 4200
Wire Bus Line
2900 4200 2900 4300
Wire Bus Line
2900 4300 2650 4300
Wire Bus Line
3250 4200 3250 700
Wire Bus Line
3250 700 3350 700
Text Notes 3400 750 0 118 ~ 0
TODO
2016-02-17 10:41:34 +01:00
$EndSCHEMATC