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Added caps for LED

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This commit is contained in:
Markus Koch 2016-03-06 13:20:25 +01:00
parent 84f44c726f
commit 33c702fafa
3 changed files with 487 additions and 410 deletions
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67
fpgna.kicad_pcb
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@ -1,14 +1,14 @@
(kicad_pcb (version 4) (host pcbnew "(2016-02-12 BZR 6554)-stable")
(general
(links 486)
(links 490)
(no_connects 94)
(area 52.199999 49.949999 202.300001 113.050001)
(thickness 1.6)
(drawings 4)
(tracks 1964)
(tracks 1967)
(zones 0)
(modules 130)
(modules 132)
(nets 208)
)
@ -5344,6 +5344,64 @@
)
)
(module Capacitors_SMD:C_0805 (layer F.Cu) (tedit 5415D6EA) (tstamp 56DC21AA)
(at 184.9 54.75 270)
(descr "Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)")
(tags "capacitor 0805")
(path /56C86141/56DC4BD7)
(attr smd)
(fp_text reference C901 (at 0 -2.1 270) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 100n (at 0 2.1 270) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))
(fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))
(fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))
(pad 1 smd rect (at -1 0 270) (size 1 1.25) (layers F.Cu F.Paste F.Mask)
(net 3 VSTM33))
(pad 2 smd rect (at 1 0 270) (size 1 1.25) (layers F.Cu F.Paste F.Mask)
(net 2 GND))
(model Capacitors_SMD.3dshapes/C_0805.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Capacitors_SMD:C_0805 (layer F.Cu) (tedit 5415D6EA) (tstamp 56DC21B0)
(at 182.85 54.75 270)
(descr "Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)")
(tags "capacitor 0805")
(path /56C86141/56DC530B)
(attr smd)
(fp_text reference C902 (at 0 -2.1 270) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 1u (at 0 2.1 270) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -1.8 -1) (end 1.8 -1) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.8 1) (end 1.8 1) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.8 -1) (end -1.8 1) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.8 -1) (end 1.8 1) (layer F.CrtYd) (width 0.05))
(fp_line (start 0.5 -0.85) (end -0.5 -0.85) (layer F.SilkS) (width 0.15))
(fp_line (start -0.5 0.85) (end 0.5 0.85) (layer F.SilkS) (width 0.15))
(pad 1 smd rect (at -1 0 270) (size 1 1.25) (layers F.Cu F.Paste F.Mask)
(net 3 VSTM33))
(pad 2 smd rect (at 1 0 270) (size 1 1.25) (layers F.Cu F.Paste F.Mask)
(net 2 GND))
(model Capacitors_SMD.3dshapes/C_0805.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(gr_line (start 202.25 113) (end 52.25 113) (layer Edge.Cuts) (width 0.1))
(gr_line (start 52.25 50) (end 202.25 50) (layer Edge.Cuts) (width 0.1))
(gr_line (start 52.25 50) (end 52.25 113) (layer Edge.Cuts) (width 0.1) (tstamp 56D99DD0))
@ -5586,6 +5644,9 @@
(via (at 96.7 71.5) (size 0.8) (drill 0.4) (layers F.Cu B.Cu) (net 2))
(segment (start 98.05 71.5) (end 96.7 71.5) (width 0.3) (layer F.Cu) (net 2))
(segment (start 98.05 77) (end 96.7 77) (width 0.3) (layer F.Cu) (net 2))
(segment (start 186.35 53.5) (end 186.1 53.75) (width 0.3) (layer F.Cu) (net 3))
(segment (start 186.1 53.75) (end 184.9 53.75) (width 0.3) (layer F.Cu) (net 3))
(segment (start 182.85 53.75) (end 184.9 53.75) (width 0.3) (layer F.Cu) (net 3))
(segment (start 176.2 93.5) (end 176.2 67.2) (width 0.3) (layer F.Cu) (net 3))
(segment (start 176.2 66.766118) (end 176.2 67.2) (width 0.3) (layer F.Cu) (net 3))
(segment (start 186.35 56.616118) (end 176.2 66.766118) (width 0.3) (layer F.Cu) (net 3))

814
fpgna.net
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16
userif.sch
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@ -475,22 +475,22 @@ $EndComp
Wire Wire Line
9950 2300 9950 2700
$Comp
L C_Small C?
L C_Small C901
U 1 1 56DC4BD7
P 9950 2800
F 0 "C?" H 9950 2850 50 0000 L CNN
F 0 "C901" H 9950 2850 50 0000 L CNN
F 1 "100n" H 9950 2750 50 0000 L CNN
F 2 "" H 9950 2800 50 0000 C CNN
F 2 "Capacitors_SMD:C_0805" H 9950 2800 50 0001 C CNN
F 3 "" H 9950 2800 50 0000 C CNN
1 9950 2800
1 0 0 -1
$EndComp
Connection ~ 9950 2650
$Comp
L GND #PWR?
L GND #PWR910
U 1 1 56DC4D22
P 9950 2950
F 0 "#PWR?" H 9950 2700 50 0001 C CNN
F 0 "#PWR910" H 9950 2700 50 0001 C CNN
F 1 "GND" H 9958 2776 50 0000 C CNN
F 2 "" H 9950 2950 50 0000 C CNN
F 3 "" H 9950 2950 50 0000 C CNN
@ -500,12 +500,12 @@ $EndComp
Wire Wire Line
9950 2950 9950 2900
$Comp
L C_Small C?
L C_Small C902
U 1 1 56DC530B
P 10150 2800
F 0 "C?" H 10242 2846 50 0000 L CNN
F 0 "C902" H 10242 2846 50 0000 L CNN
F 1 "1u" H 10242 2754 50 0000 L CNN
F 2 "" H 10150 2800 50 0000 C CNN
F 2 "Capacitors_SMD:C_0805" H 10150 2800 50 0001 C CNN
F 3 "" H 10150 2800 50 0000 C CNN
1 10150 2800
1 0 0 -1