From 7ea01f4abbc731e3c089b348fd1e5b9a0f87afb4 Mon Sep 17 00:00:00 2001 From: Makise Kurisu Date: Wed, 17 Feb 2016 20:30:12 +0100 Subject: [PATCH] Gneowmeow --- FSMC.sch | 302 ++++++++++----------- debug.sch | 164 ++++++++++-- fpgna-cache.lib | 71 +++++ fpgna.kicad_pcb | 672 ++++++++++++++++++++++++----------------------- fpgna.pro | 3 +- fpgna.sch | 17 +- power.sch | 682 ++++++++++++++++++++++++------------------------ 7 files changed, 1072 insertions(+), 839 deletions(-) diff --git a/FSMC.sch b/FSMC.sch index 081a0ca..a0df2ec 100644 --- a/FSMC.sch +++ b/FSMC.sch @@ -52,105 +52,105 @@ $EndDescr $Comp L STM32F407VGT U4 U 6 1 56C43C8E -P 2450 4850 -F 0 "U4" H 3228 4053 60 0000 L CNN -F 1 "STM32F407VGT" H 3228 3947 60 0000 L CNN -F 2 "Housings_QFP:LQFP-100_14x14mm_Pitch0.5mm" H 1950 5350 60 0001 C CNN -F 3 "" H 1950 5350 60 0000 C CNN - 6 2450 4850 +P 2000 4150 +F 0 "U4" H 2778 3353 60 0000 L CNN +F 1 "STM32F407VGT" H 2778 3247 60 0000 L CNN +F 2 "Housings_QFP:LQFP-100_14x14mm_Pitch0.5mm" H 1500 4650 60 0001 C CNN +F 3 "" H 1500 4650 60 0000 C CNN + 6 2000 4150 -1 0 0 -1 $EndComp $Comp L STM32F407VGT U4 U 5 1 56C43FCF -P 2450 3050 -F 0 "U4" H 3228 2253 60 0000 L CNN -F 1 "STM32F407VGT" H 3228 2147 60 0000 L CNN -F 2 "Housings_QFP:LQFP-100_14x14mm_Pitch0.5mm" H 1950 3550 60 0001 C CNN -F 3 "" H 1950 3550 60 0000 C CNN - 5 2450 3050 +P 2000 2350 +F 0 "U4" H 2778 1553 60 0000 L CNN +F 1 "STM32F407VGT" H 2778 1447 60 0000 L CNN +F 2 "Housings_QFP:LQFP-100_14x14mm_Pitch0.5mm" H 1500 2850 60 0001 C CNN +F 3 "" H 1500 2850 60 0000 C CNN + 5 2000 2350 -1 0 0 -1 $EndComp -Text Label 3000 5650 2 60 ~ 0 +Text Label 2550 4950 2 60 ~ 0 DA4 -Text Label 3000 5750 2 60 ~ 0 +Text Label 2550 5050 2 60 ~ 0 DA5 -Text Label 3000 5850 2 60 ~ 0 +Text Label 2550 5150 2 60 ~ 0 DA6 -Text Label 3000 5950 2 60 ~ 0 +Text Label 2550 5250 2 60 ~ 0 DA7 -Text Label 3000 6050 2 60 ~ 0 +Text Label 2550 5350 2 60 ~ 0 DA8 -Text Label 3000 6150 2 60 ~ 0 +Text Label 2550 5450 2 60 ~ 0 DA9 -Text Label 3000 6250 2 60 ~ 0 +Text Label 2550 5550 2 60 ~ 0 DA10 -Text Label 3000 6350 2 60 ~ 0 +Text Label 2550 5650 2 60 ~ 0 DA11 -Text Label 3000 6450 2 60 ~ 0 +Text Label 2550 5750 2 60 ~ 0 DA12 -Text Label 3000 4550 2 60 ~ 0 +Text Label 2550 3850 2 60 ~ 0 DA0 -Text Label 3000 4650 2 60 ~ 0 +Text Label 2550 3950 2 60 ~ 0 DA1 -Text Label 3000 3150 2 60 ~ 0 +Text Label 2550 2450 2 60 ~ 0 DA2 -Text Label 3000 3250 2 60 ~ 0 +Text Label 2550 2550 2 60 ~ 0 DA3 -Text Label 3000 3950 2 60 ~ 0 +Text Label 2550 3250 2 60 ~ 0 DA13 -Text Label 3000 4050 2 60 ~ 0 +Text Label 2550 3350 2 60 ~ 0 DA14 -Text Label 3000 4150 2 60 ~ 0 +Text Label 2550 3450 2 60 ~ 0 DA15 -Text Label 3000 4250 2 60 ~ 0 +Text Label 2550 3550 2 60 ~ 0 A16 -Text Label 3000 4350 2 60 ~ 0 +Text Label 2550 3650 2 60 ~ 0 A17 -Text Label 3000 4450 2 60 ~ 0 +Text Label 2550 3750 2 60 ~ 0 A18 -Text Label 3000 5250 2 60 ~ 0 +Text Label 2550 4550 2 60 ~ 0 A19 -Text Label 3000 5350 2 60 ~ 0 +Text Label 2550 4650 2 60 ~ 0 A20 -Text Label 3000 5450 2 60 ~ 0 +Text Label 2550 4750 2 60 ~ 0 A21 -Text Label 3000 5550 2 60 ~ 0 +Text Label 2550 4850 2 60 ~ 0 A22 -Text Label 3000 5150 2 60 ~ 0 +Text Label 2550 4450 2 60 ~ 0 A23 -Text Label 3000 3550 2 60 ~ 0 +Text Label 2550 2850 2 60 ~ 0 OE_N -Text Label 3000 3650 2 60 ~ 0 +Text Label 2550 2950 2 60 ~ 0 WE_N -Text Label 3000 3750 2 60 ~ 0 +Text Label 2550 3050 2 60 ~ 0 WAIT_N -Text Label 3000 3850 2 60 ~ 0 +Text Label 2550 3150 2 60 ~ 0 E1_N -Text Label 3000 4950 2 60 ~ 0 +Text Label 2550 4250 2 60 ~ 0 BL0_N -Text Label 3000 5050 2 60 ~ 0 +Text Label 2550 4350 2 60 ~ 0 BL1_N -Text Label 3000 3450 2 60 ~ 0 +Text Label 2550 2750 2 60 ~ 0 CLK $Comp L STM32F407VGT U4 U 3 1 56C4412A -P 2450 1250 -F 0 "U4" H 3268 453 60 0000 L CNN -F 1 "STM32F407VGT" H 3268 347 60 0000 L CNN -F 2 "Housings_QFP:LQFP-100_14x14mm_Pitch0.5mm" H 1950 1750 60 0001 C CNN -F 3 "" H 1950 1750 60 0000 C CNN - 3 2450 1250 +P 2000 550 +F 0 "U4" H 2818 -247 60 0000 L CNN +F 1 "STM32F407VGT" H 2818 -353 60 0000 L CNN +F 2 "Housings_QFP:LQFP-100_14x14mm_Pitch0.5mm" H 1500 1050 60 0001 C CNN +F 3 "" H 1500 1050 60 0000 C CNN + 3 2000 550 -1 0 0 -1 $EndComp -Text Label 3000 2050 2 60 ~ 0 +Text Label 2550 1350 2 60 ~ 0 ADV_N -Text HLabel 2750 1550 2 60 Input ~ 0 +Text HLabel 2300 850 2 60 Input ~ 0 BOOT1 -Text HLabel 2750 1650 2 60 Input ~ 0 +Text HLabel 2300 950 2 60 Output ~ 0 JTDO -Text HLabel 2750 1750 2 60 Input ~ 0 +Text HLabel 2300 1050 2 60 Input ~ 0 JRST_N $Comp L STM32F407VGT U4 @@ -166,23 +166,12 @@ $EndComp $Comp L STM32F407VGT U4 U 4 1 56C47A60 -P 9100 2500 -F 0 "U4" H 9878 1703 60 0000 L CNN -F 1 "STM32F407VGT" H 9878 1597 60 0000 L CNN -F 2 "Housings_QFP:LQFP-100_14x14mm_Pitch0.5mm" H 8600 3000 60 0001 C CNN -F 3 "" H 8600 3000 60 0000 C CNN - 4 9100 2500 - 1 0 0 -1 -$EndComp -$Comp -L STM32F407VGT U4 -U 7 1 56C47B2B -P 9250 4550 -F 0 "U4" H 9828 4328 60 0000 L CNN -F 1 "STM32F407VGT" H 9828 4222 60 0000 L CNN -F 2 "Housings_QFP:LQFP-100_14x14mm_Pitch0.5mm" H 8750 5050 60 0001 C CNN -F 3 "" H 8750 5050 60 0000 C CNN - 7 9250 4550 +P 9150 2500 +F 0 "U4" H 9928 1703 60 0000 L CNN +F 1 "STM32F407VGT" H 9928 1597 60 0000 L CNN +F 2 "Housings_QFP:LQFP-100_14x14mm_Pitch0.5mm" H 8650 3000 60 0001 C CNN +F 3 "" H 8650 3000 60 0000 C CNN + 4 9150 2500 1 0 0 -1 $EndComp $Comp @@ -252,23 +241,23 @@ B7 $Comp L C C28 U 1 1 56C675D2 -P 6000 6900 -F 0 "C28" H 6050 7000 50 0000 L CNN -F 1 "100n" H 6050 6800 50 0000 L CNN -F 2 "" H 6038 6750 50 0000 C CNN -F 3 "" H 6000 6900 50 0000 C CNN - 1 6000 6900 +P 5750 6900 +F 0 "C28" H 5800 7000 50 0000 L CNN +F 1 "100n" H 5800 6800 50 0000 L CNN +F 2 "" H 5788 6750 50 0000 C CNN +F 3 "" H 5750 6900 50 0000 C CNN + 1 5750 6900 1 0 0 -1 $EndComp $Comp L C C29 U 1 1 56C676A2 -P 6300 6900 -F 0 "C29" H 6350 7000 50 0000 L CNN -F 1 "100n" H 6350 6800 50 0000 L CNN -F 2 "" H 6338 6750 50 0000 C CNN -F 3 "" H 6300 6900 50 0000 C CNN - 1 6300 6900 +P 5950 6900 +F 0 "C29" H 6000 7000 50 0000 L CNN +F 1 "100n" H 6000 6800 50 0000 L CNN +F 2 "" H 5988 6750 50 0000 C CNN +F 3 "" H 5950 6900 50 0000 C CNN + 1 5950 6900 1 0 0 -1 $EndComp $Comp @@ -296,12 +285,12 @@ $EndComp $Comp L GND #PWR57 U 1 1 56C67C80 -P 6150 7200 -F 0 "#PWR57" H 6150 6950 50 0001 C CNN -F 1 "GND" H 6158 7026 50 0000 C CNN -F 2 "" H 6150 7200 50 0000 C CNN -F 3 "" H 6150 7200 50 0000 C CNN - 1 6150 7200 +P 5850 7200 +F 0 "#PWR57" H 5850 6950 50 0001 C CNN +F 1 "GND" H 5858 7026 50 0000 C CNN +F 2 "" H 5850 7200 50 0000 C CNN +F 3 "" H 5850 7200 50 0000 C CNN + 1 5850 7200 1 0 0 -1 $EndComp $Comp @@ -340,75 +329,75 @@ $EndComp Text Label 3700 4900 0 60 ~ 0 CLK Wire Wire Line - 2650 4950 3000 4950 + 2200 4250 2550 4250 Wire Wire Line - 2650 5050 3000 5050 + 2200 4350 2550 4350 Wire Wire Line - 2650 5150 3000 5150 + 2200 4450 2550 4450 Wire Wire Line - 2650 5250 3000 5250 + 2200 4550 2550 4550 Wire Wire Line - 2650 5350 3000 5350 + 2200 4650 2550 4650 Wire Wire Line - 2650 5450 3000 5450 + 2200 4750 2550 4750 Wire Wire Line - 2650 5550 3000 5550 + 2200 4850 2550 4850 Wire Wire Line - 2650 5650 3000 5650 + 2200 4950 2550 4950 Wire Wire Line - 2650 5750 3000 5750 + 2200 5050 2550 5050 Wire Wire Line - 2650 5850 3000 5850 + 2200 5150 2550 5150 Wire Wire Line - 2650 5950 3000 5950 + 2200 5250 2550 5250 Wire Wire Line - 2650 6050 3000 6050 + 2200 5350 2550 5350 Wire Wire Line - 2650 6150 3000 6150 + 2200 5450 2550 5450 Wire Wire Line - 2650 6250 3000 6250 + 2200 5550 2550 5550 Wire Wire Line - 2650 6350 3000 6350 + 2200 5650 2550 5650 Wire Wire Line - 2650 6450 3000 6450 + 2200 5750 2550 5750 Wire Wire Line - 2650 4550 3000 4550 + 2200 3850 2550 3850 Wire Wire Line - 2650 4650 3000 4650 + 2200 3950 2550 3950 Wire Wire Line - 2650 3150 3000 3150 + 2200 2450 2550 2450 Wire Wire Line - 3000 3250 2650 3250 + 2550 2550 2200 2550 Wire Wire Line - 2650 4150 3000 4150 + 2200 3450 2550 3450 Wire Wire Line - 3000 4050 2650 4050 + 2550 3350 2200 3350 Wire Wire Line - 2650 4250 3000 4250 + 2200 3550 2550 3550 Wire Wire Line - 2650 4350 3000 4350 + 2200 3650 2550 3650 Wire Wire Line - 2650 4450 3000 4450 + 2200 3750 2550 3750 Wire Wire Line - 2650 3350 3000 3350 + 2200 2650 2550 2650 Wire Wire Line - 2650 3450 3000 3450 + 2200 2750 2550 2750 Wire Wire Line - 2650 3550 3000 3550 + 2200 2850 2550 2850 Wire Wire Line - 2650 3650 3000 3650 + 2200 2950 2550 2950 Wire Wire Line - 2650 3750 3000 3750 + 2200 3050 2550 3050 Wire Wire Line - 2650 3850 3000 3850 + 2200 3150 2550 3150 Wire Wire Line - 2650 2050 3000 2050 + 2200 1350 2550 1350 Wire Wire Line - 2750 1550 2650 1550 + 2300 850 2200 850 Wire Wire Line - 2750 1650 2650 1650 + 2300 950 2200 950 Wire Wire Line - 2750 1750 2650 1750 + 2300 1050 2200 1050 Wire Wire Line 5600 950 5600 1650 Connection ~ 5600 1050 @@ -444,7 +433,7 @@ Wire Wire Line Wire Wire Line 7400 4650 7400 6350 Wire Wire Line - 3000 3950 2650 3950 + 2550 3250 2200 3250 Connection ~ 7400 4750 Connection ~ 7400 4850 Connection ~ 7400 4950 @@ -487,16 +476,6 @@ Connection ~ 7300 1900 Connection ~ 7300 2000 Connection ~ 6000 2000 Connection ~ 6000 1900 -Wire Wire Line - 5350 6600 6300 6600 -Wire Wire Line - 6300 6550 6300 6750 -Wire Wire Line - 6000 6550 6000 6750 -Wire Wire Line - 6000 6700 5350 6700 -Wire Wire Line - 6000 7050 6300 7050 Wire Wire Line 5400 7200 5400 6900 Wire Wire Line @@ -506,8 +485,8 @@ Wire Wire Line Wire Wire Line 5600 6800 5600 7200 Wire Wire Line - 6150 7200 6150 7050 -Connection ~ 6150 7050 + 5850 7200 5850 7050 +Connection ~ 5850 7050 Wire Wire Line 3800 6550 3800 6850 Wire Wire Line @@ -623,27 +602,25 @@ A19 $Comp L VFPGA33 #PWR58 U 1 1 56C6B01D -P 6300 6550 -F 0 "#PWR58" H 6300 6400 50 0001 C CNN -F 1 "VFPGA33" H 6318 6724 50 0000 C CNN -F 2 "" H 6300 6550 50 0000 C CNN -F 3 "" H 6300 6550 50 0000 C CNN - 1 6300 6550 +P 5950 6650 +F 0 "#PWR58" H 5950 6500 50 0001 C CNN +F 1 "VFPGA33" H 5968 6824 50 0000 C CNN +F 2 "" H 5950 6650 50 0000 C CNN +F 3 "" H 5950 6650 50 0000 C CNN + 1 5950 6650 1 0 0 -1 $EndComp -Connection ~ 6300 6600 $Comp L VFPGA33 #PWR56 U 1 1 56C6B114 -P 6000 6550 -F 0 "#PWR56" H 6000 6400 50 0001 C CNN -F 1 "VFPGA33" H 6018 6724 50 0000 C CNN -F 2 "" H 6000 6550 50 0000 C CNN -F 3 "" H 6000 6550 50 0000 C CNN - 1 6000 6550 +P 5750 6550 +F 0 "#PWR56" H 5750 6400 50 0001 C CNN +F 1 "VFPGA33" H 5768 6724 50 0000 C CNN +F 2 "" H 5750 6550 50 0000 C CNN +F 3 "" H 5750 6550 50 0000 C CNN + 1 5750 6550 1 0 0 -1 $EndComp -Connection ~ 6000 6700 $Comp L VFPGA33 #PWR51 U 1 1 56C6B644 @@ -656,4 +633,29 @@ F 3 "" H 3800 6550 50 0000 C CNN 1 0 0 -1 $EndComp Connection ~ 3800 6800 +Wire Wire Line + 5950 6650 5950 6750 +Connection ~ 5950 6700 +Wire Wire Line + 5750 7050 5950 7050 +Wire Wire Line + 5750 6550 5750 6750 +Wire Wire Line + 5950 6700 5350 6700 +Wire Wire Line + 5350 6600 5750 6600 +Connection ~ 5750 6600 +Connection ~ 7400 5350 +Wire Bus Line + 2650 4200 3250 4200 +Wire Bus Line + 2900 4200 2900 4300 +Wire Bus Line + 2900 4300 2650 4300 +Wire Bus Line + 3250 4200 3250 700 +Wire Bus Line + 3250 700 3350 700 +Text Notes 3400 750 0 118 ~ 0 +TODO $EndSCHEMATC diff --git a/debug.sch b/debug.sch index 226347f..121a82e 100644 --- a/debug.sch +++ b/debug.sch @@ -82,17 +82,6 @@ Wire Wire Line Wire Wire Line 4000 1500 3550 1500 $Comp -L +3V3 #PWR47 -U 1 1 5633932E -P 3550 800 -F 0 "#PWR47" H 3550 650 50 0001 C CNN -F 1 "+3V3" H 3550 940 50 0000 C CNN -F 2 "" H 3550 800 60 0000 C CNN -F 3 "" H 3550 800 60 0000 C CNN - 1 3550 800 - 1 0 0 -1 -$EndComp -$Comp L C C24 U 1 1 56339277 P 3750 1050 @@ -123,17 +112,6 @@ Wire Wire Line Connection ~ 3550 850 Wire Wire Line 3750 1200 3750 1300 -$Comp -L +3V3 #PWR49 -U 1 1 568DA1D5 -P 5150 1400 -F 0 "#PWR49" H 5150 1250 50 0001 C CNN -F 1 "+3V3" H 5150 1540 50 0000 C CNN -F 2 "" H 5150 1400 60 0000 C CNN -F 3 "" H 5150 1400 60 0000 C CNN - 1 5150 1400 - 1 0 0 -1 -$EndComp Wire Wire Line 5150 1400 5150 1600 Wire Wire Line @@ -156,4 +134,146 @@ Wire Wire Line Wire Wire Line 4900 1700 5150 1700 Connection ~ 5150 1800 +$Comp +L STM32F407VGT U? +U 7 1 56C69145 +P 2450 2800 +F 0 "U?" H 3028 2578 60 0000 L CNN +F 1 "STM32F407VGT" H 3028 2472 60 0000 L CNN +F 2 "" H 1950 3300 60 0000 C CNN +F 3 "" H 1950 3300 60 0000 C CNN + 7 2450 2800 + 1 0 0 -1 +$EndComp +Text HLabel 4850 2800 0 60 Output ~ 0 +JTDI +Text HLabel 4850 2700 0 60 Output ~ 0 +JTMS +Text HLabel 4850 2900 0 60 Input ~ 0 +JTDO +Text HLabel 4850 2600 0 60 Output ~ 0 +JTCK +Text HLabel 4850 3000 0 60 Input ~ 0 +JRST_N +Text HLabel 2450 3450 2 60 Output ~ 0 +BOOT1 +$Comp +L VSTM33 #PWR? +U 1 1 56C71229 +P 5150 1400 +F 0 "#PWR?" H 5150 1250 50 0001 C CNN +F 1 "VSTM33" H 5168 1574 50 0000 C CNN +F 2 "" H 5150 1400 50 0000 C CNN +F 3 "" H 5150 1400 50 0000 C CNN + 1 5150 1400 + 1 0 0 -1 +$EndComp +$Comp +L VSTM33 #PWR? +U 1 1 56C71245 +P 3550 800 +F 0 "#PWR?" H 3550 650 50 0001 C CNN +F 1 "VSTM33" H 3568 974 50 0000 C CNN +F 2 "" H 3550 800 50 0000 C CNN +F 3 "" H 3550 800 50 0000 C CNN + 1 3550 800 + 1 0 0 -1 +$EndComp +$Comp +L Crystal_Small Y? +U 1 1 56C71642 +P 1950 2900 +F 0 "Y?" V 1904 2988 50 0000 L CNN +F 1 "8M" V 1996 2988 50 0000 L CNN +F 2 "" H 1950 2900 50 0000 C CNN +F 3 "" H 1950 2900 50 0000 C CNN + 1 1950 2900 + 0 1 1 0 +$EndComp +Wire Wire Line + 1900 3000 2250 3000 +Wire Wire Line + 1900 2800 2200 2800 +Wire Wire Line + 2200 2800 2200 2900 +Wire Wire Line + 2200 2900 2250 2900 +$Comp +L C_Small C? +U 1 1 56C717BF +P 1800 2800 +F 0 "C?" V 1650 2800 50 0000 C CNN +F 1 "5p" V 1700 2800 50 0000 C CNN +F 2 "" H 1800 2800 50 0000 C CNN +F 3 "" H 1800 2800 50 0000 C CNN + 1 1800 2800 + 0 1 1 0 +$EndComp +$Comp +L C_Small C? +U 1 1 56C7180C +P 1800 3000 +F 0 "C?" V 1900 3000 50 0000 C CNN +F 1 "5p" V 1700 3000 50 0000 C CNN +F 2 "" H 1800 3000 50 0000 C CNN +F 3 "" H 1800 3000 50 0000 C CNN + 1 1800 3000 + 0 1 1 0 +$EndComp +Connection ~ 1950 3000 +Connection ~ 1950 2800 +Wire Wire Line + 1700 2800 1700 3000 +Wire Wire Line + 1700 2900 1600 2900 +Wire Wire Line + 1600 2900 1600 3550 +Connection ~ 1700 2900 +$Comp +L GND #PWR? +U 1 1 56C718AB +P 1600 3550 +F 0 "#PWR?" H 1600 3300 50 0001 C CNN +F 1 "GND" H 1608 3376 50 0000 C CNN +F 2 "" H 1600 3550 50 0000 C CNN +F 3 "" H 1600 3550 50 0000 C CNN + 1 1600 3550 + 1 0 0 -1 +$EndComp +$Comp +L CONN_01X06 P? +U 1 1 56C73EAE +P 5250 2850 +F 0 "P?" H 5327 2888 50 0000 L CNN +F 1 "JTAG-STM" H 5327 2796 50 0000 L CNN +F 2 "" H 5250 2850 50 0000 C CNN +F 3 "" H 5250 2850 50 0000 C CNN + 1 5250 2850 + 1 0 0 -1 +$EndComp +Wire Wire Line + 4850 2600 5050 2600 +Wire Wire Line + 5050 2700 4850 2700 +Wire Wire Line + 4850 2800 5050 2800 +Wire Wire Line + 5050 2900 4850 2900 +Wire Wire Line + 4850 3000 5050 3000 +$Comp +L GND #PWR? +U 1 1 56C74066 +P 5000 3150 +F 0 "#PWR?" H 5000 2900 50 0001 C CNN +F 1 "GND" H 5008 2976 50 0000 C CNN +F 2 "" H 5000 3150 50 0000 C CNN +F 3 "" H 5000 3150 50 0000 C CNN + 1 5000 3150 + 1 0 0 -1 +$EndComp +Wire Wire Line + 5000 3150 5000 3100 +Wire Wire Line + 5000 3100 5050 3100 $EndSCHEMATC diff --git a/fpgna-cache.lib b/fpgna-cache.lib index 6efb13b..c4a469d 100644 --- a/fpgna-cache.lib +++ b/fpgna-cache.lib @@ -78,6 +78,36 @@ X P3 3 -200 -100 150 R 50 50 1 1 P ENDDRAW ENDDEF # +# CONN_01X06 +# +DEF CONN_01X06 P 0 40 Y N 1 F N +F0 "P" 0 350 50 H V C CNN +F1 "CONN_01X06" 100 0 50 V V C CNN +F2 "" 0 0 50 H V C CNN +F3 "" 0 0 50 H V C CNN +$FPLIST + Pin_Header_Straight_1X06 + Pin_Header_Angled_1X06 + Socket_Strip_Straight_1X06 + Socket_Strip_Angled_1X06 +$ENDFPLIST +DRAW +S -50 -245 10 -255 0 1 0 N +S -50 -145 10 -155 0 1 0 N +S -50 -45 10 -55 0 1 0 N +S -50 55 10 45 0 1 0 N +S -50 155 10 145 0 1 0 N +S -50 255 10 245 0 1 0 N +S -50 300 50 -300 0 1 0 N +X P1 1 -200 250 150 R 50 50 1 1 P +X P2 2 -200 150 150 R 50 50 1 1 P +X P3 3 -200 50 150 R 50 50 1 1 P +X P4 4 -200 -50 150 R 50 50 1 1 P +X P5 5 -200 -150 150 R 50 50 1 1 P +X P6 6 -200 -250 150 R 50 50 1 1 P +ENDDRAW +ENDDEF +# # CP # DEF CP C 0 10 N Y 1 F N @@ -106,6 +136,47 @@ X ~ 2 0 -150 110 U 40 40 1 1 P ENDDRAW ENDDEF # +# C_Small +# +DEF C_Small C 0 10 N N 1 F N +F0 "C" 10 70 50 H V L CNN +F1 "C_Small" 10 -80 50 H V L CNN +F2 "" 0 0 50 H V C CNN +F3 "" 0 0 50 H V C CNN +$FPLIST + C? + C_????_* + C_???? + SMD*_c + Capacitor* +$ENDFPLIST +DRAW +P 2 0 1 13 -60 -20 60 -20 N +P 2 0 1 12 -60 20 60 20 N +X ~ 1 0 100 75 D 40 40 1 1 P +X ~ 2 0 -100 80 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# Crystal_Small +# +DEF Crystal_Small Y 0 40 N N 1 F N +F0 "Y" 0 100 50 H V C CNN +F1 "Crystal_Small" 0 -100 50 H V C CNN +F2 "" 0 0 50 H V C CNN +F3 "" 0 0 50 H V C CNN +$FPLIST + Crystal_ +$ENDFPLIST +DRAW +S -30 -60 30 60 0 1 0 N +P 2 0 1 0 -50 -30 -50 30 N +P 2 0 1 0 50 -30 50 30 N +X 1 1 -100 0 50 R 40 40 1 1 P +X 2 2 100 0 50 L 40 40 1 1 P +ENDDRAW +ENDDEF +# # D_Schottky_Small # DEF D_Schottky_Small D 0 10 N N 1 F N diff --git a/fpgna.kicad_pcb b/fpgna.kicad_pcb index 46e9e86..8661ac3 100644 --- a/fpgna.kicad_pcb +++ b/fpgna.kicad_pcb @@ -1,14 +1,14 @@ (kicad_pcb (version 4) (host pcbnew "(2016-02-12 BZR 6554)-stable") (general - (links 126) - (no_connects 110) - (area 122.813 57.025999 185.679048 102.478988) + (links 124) + (no_connects 99) + (area 0 0 0 0) (thickness 1.6) (drawings 0) - (tracks 140) + (tracks 193) (zones 0) - (modules 4) + (modules 3) (nets 124) ) @@ -346,6 +346,238 @@ (add_net VSTM33) ) + (module Housings_QFP:LQFP-100_14x14mm_Pitch0.5mm (layer F.Cu) (tedit 54130A77) (tstamp 56C4508F) + (at 162.3 66.104 270) + (descr "LQFP100: plastic low profile quad flat package; 100 leads; body 14 x 14 x 1.4 mm (see NXP sot407-1_po.pdf and sot407-1_fr.pdf)") + (tags "QFP 0.5") + (path /563244F7/56C476C3) + (attr smd) + (fp_text reference U4 (at 0 -9.65 270) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value STM32F407VGT (at 0 9.65 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -8.9 -8.9) (end -8.9 8.9) (layer F.CrtYd) (width 0.05)) + (fp_line (start 8.9 -8.9) (end 8.9 8.9) (layer F.CrtYd) (width 0.05)) + (fp_line (start -8.9 -8.9) (end 8.9 -8.9) (layer F.CrtYd) (width 0.05)) + (fp_line (start -8.9 8.9) (end 8.9 8.9) (layer F.CrtYd) (width 0.05)) + (fp_line (start -7.125 -7.125) (end -7.125 -6.365) (layer F.SilkS) (width 0.15)) + (fp_line (start 7.125 -7.125) (end 7.125 -6.365) (layer F.SilkS) (width 0.15)) + (fp_line (start 7.125 7.125) (end 7.125 6.365) (layer F.SilkS) (width 0.15)) + (fp_line (start -7.125 7.125) (end -7.125 6.365) (layer F.SilkS) (width 0.15)) + (fp_line (start -7.125 -7.125) (end -6.365 -7.125) (layer F.SilkS) (width 0.15)) + (fp_line (start -7.125 7.125) (end -6.365 7.125) (layer F.SilkS) (width 0.15)) + (fp_line (start 7.125 7.125) (end 6.365 7.125) (layer F.SilkS) (width 0.15)) + (fp_line (start 7.125 -7.125) (end 6.365 -7.125) (layer F.SilkS) (width 0.15)) + (fp_line (start -7.125 -6.365) (end -8.65 -6.365) (layer F.SilkS) (width 0.15)) + (pad 1 smd rect (at -7.9 -6 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 32 /FSMC/A23)) + (pad 2 smd rect (at -7.9 -5.5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 33 /FSMC/A19)) + (pad 3 smd rect (at -7.9 -5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 34 /FSMC/A20)) + (pad 4 smd rect (at -7.9 -4.5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 35 /FSMC/A21)) + (pad 5 smd rect (at -7.9 -4 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 36 /FSMC/A22)) + (pad 6 smd rect (at -7.9 -3.5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 120 VSTM33)) + (pad 7 smd rect (at -7.9 -3 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 37 "Net-(U4-Pad7)")) + (pad 8 smd rect (at -7.9 -2.5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 38 "Net-(U4-Pad8)")) + (pad 9 smd rect (at -7.9 -2 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 39 "Net-(U4-Pad9)")) + (pad 10 smd rect (at -7.9 -1.5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 121 GND)) + (pad 11 smd rect (at -7.9 -1 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 120 VSTM33)) + (pad 12 smd rect (at -7.9 -0.5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 40 "Net-(U4-Pad12)")) + (pad 13 smd rect (at -7.9 0 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 41 "Net-(U4-Pad13)")) + (pad 14 smd rect (at -7.9 0.5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 42 "Net-(U4-Pad14)")) + (pad 15 smd rect (at -7.9 1 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 43 "Net-(U4-Pad15)")) + (pad 16 smd rect (at -7.9 1.5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 44 "Net-(U4-Pad16)")) + (pad 17 smd rect (at -7.9 2 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 45 "Net-(U4-Pad17)")) + (pad 18 smd rect (at -7.9 2.5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 46 "Net-(U4-Pad18)")) + (pad 19 smd rect (at -7.9 3 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 120 VSTM33)) + (pad 20 smd rect (at -7.9 3.5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 121 GND)) + (pad 21 smd rect (at -7.9 4 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 120 VSTM33)) + (pad 22 smd rect (at -7.9 4.5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 120 VSTM33)) + (pad 23 smd rect (at -7.9 5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 47 "Net-(U4-Pad23)")) + (pad 24 smd rect (at -7.9 5.5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 48 "Net-(U4-Pad24)")) + (pad 25 smd rect (at -7.9 6 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 49 "Net-(U4-Pad25)")) + (pad 26 smd rect (at -6 7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 50 "Net-(U4-Pad26)")) + (pad 27 smd rect (at -5.5 7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 121 GND)) + (pad 28 smd rect (at -5 7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 120 VSTM33)) + (pad 29 smd rect (at -4.5 7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 51 "Net-(U4-Pad29)")) + (pad 30 smd rect (at -4 7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 52 "Net-(U4-Pad30)")) + (pad 31 smd rect (at -3.5 7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 53 "Net-(U4-Pad31)")) + (pad 32 smd rect (at -3 7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 54 "Net-(U4-Pad32)")) + (pad 33 smd rect (at -2.5 7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 55 "Net-(U4-Pad33)")) + (pad 34 smd rect (at -2 7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 56 "Net-(U4-Pad34)")) + (pad 35 smd rect (at -1.5 7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 57 "Net-(U4-Pad35)")) + (pad 36 smd rect (at -1 7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 58 "Net-(U4-Pad36)")) + (pad 37 smd rect (at -0.5 7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 59 /FSMC/BOOT1)) + (pad 38 smd rect (at 0 7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 60 /FSMC/DA4)) + (pad 39 smd rect (at 0.5 7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 61 /FSMC/DA5)) + (pad 40 smd rect (at 1 7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 62 /FSMC/DA6)) + (pad 41 smd rect (at 1.5 7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 63 /FSMC/DA7)) + (pad 42 smd rect (at 2 7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 64 /FSMC/DA8)) + (pad 43 smd rect (at 2.5 7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 65 /FSMC/DA9)) + (pad 44 smd rect (at 3 7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 66 /FSMC/DA10)) + (pad 45 smd rect (at 3.5 7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 67 /FSMC/DA11)) + (pad 46 smd rect (at 4 7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 68 /FSMC/DA12)) + (pad 47 smd rect (at 4.5 7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 69 "Net-(U4-Pad47)")) + (pad 48 smd rect (at 5 7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 70 "Net-(U4-Pad48)")) + (pad 49 smd rect (at 5.5 7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 122 /powersupply/VCAP1)) + (pad 50 smd rect (at 6 7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 120 VSTM33)) + (pad 51 smd rect (at 7.9 6 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 71 "Net-(U4-Pad51)")) + (pad 52 smd rect (at 7.9 5.5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 72 "Net-(U4-Pad52)")) + (pad 53 smd rect (at 7.9 5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 73 "Net-(U4-Pad53)")) + (pad 54 smd rect (at 7.9 4.5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 74 "Net-(U4-Pad54)")) + (pad 55 smd rect (at 7.9 4 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 1 /FSMC/DA13)) + (pad 56 smd rect (at 7.9 3.5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 75 /FSMC/DA14)) + (pad 57 smd rect (at 7.9 3 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 76 /FSMC/DA15)) + (pad 58 smd rect (at 7.9 2.5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 77 /FSMC/A16)) + (pad 59 smd rect (at 7.9 2 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 78 /FSMC/A17)) + (pad 60 smd rect (at 7.9 1.5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 79 /FSMC/A18)) + (pad 61 smd rect (at 7.9 1 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 80 /FSMC/DA0)) + (pad 62 smd rect (at 7.9 0.5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 81 /FSMC/DA1)) + (pad 63 smd rect (at 7.9 0 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 82 "Net-(U4-Pad63)")) + (pad 64 smd rect (at 7.9 -0.5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 83 "Net-(U4-Pad64)")) + (pad 65 smd rect (at 7.9 -1 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 84 "Net-(U4-Pad65)")) + (pad 66 smd rect (at 7.9 -1.5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 85 "Net-(U4-Pad66)")) + (pad 67 smd rect (at 7.9 -2 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 86 "Net-(U4-Pad67)")) + (pad 68 smd rect (at 7.9 -2.5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 87 "Net-(U4-Pad68)")) + (pad 69 smd rect (at 7.9 -3 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 88 "Net-(U4-Pad69)")) + (pad 70 smd rect (at 7.9 -3.5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 89 "Net-(U4-Pad70)")) + (pad 71 smd rect (at 7.9 -4 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 90 "Net-(U4-Pad71)")) + (pad 72 smd rect (at 7.9 -4.5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 91 "Net-(U4-Pad72)")) + (pad 73 smd rect (at 7.9 -5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 123 /powersupply/VCAP2)) + (pad 74 smd rect (at 7.9 -5.5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 121 GND)) + (pad 75 smd rect (at 7.9 -6 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 120 VSTM33)) + (pad 76 smd rect (at 6 -7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 92 "Net-(U4-Pad76)")) + (pad 77 smd rect (at 5.5 -7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 93 "Net-(U4-Pad77)")) + (pad 78 smd rect (at 5 -7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 94 "Net-(U4-Pad78)")) + (pad 79 smd rect (at 4.5 -7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 95 "Net-(U4-Pad79)")) + (pad 80 smd rect (at 4 -7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 96 "Net-(U4-Pad80)")) + (pad 81 smd rect (at 3.5 -7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 97 /FSMC/DA2)) + (pad 82 smd rect (at 3 -7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 98 /FSMC/DA3)) + (pad 83 smd rect (at 2.5 -7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 99 "Net-(U4-Pad83)")) + (pad 84 smd rect (at 2 -7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 100 /FSMC/CLK)) + (pad 85 smd rect (at 1.5 -7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 101 /FSMC/OE_N)) + (pad 86 smd rect (at 1 -7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 102 /FSMC/WE_N)) + (pad 87 smd rect (at 0.5 -7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 103 /FSMC/WAIT_N)) + (pad 88 smd rect (at 0 -7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 2 /FSMC/E1_N)) + (pad 89 smd rect (at -0.5 -7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 104 /FSMC/JTDO)) + (pad 90 smd rect (at -1 -7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 105 /FSMC/JRST_N)) + (pad 91 smd rect (at -1.5 -7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 106 "Net-(U4-Pad91)")) + (pad 92 smd rect (at -2 -7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 107 "Net-(U4-Pad92)")) + (pad 93 smd rect (at -2.5 -7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 108 /FSMC/ADV_N)) + (pad 94 smd rect (at -3 -7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 109 "Net-(U4-Pad94)")) + (pad 95 smd rect (at -3.5 -7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 110 "Net-(U4-Pad95)")) + (pad 96 smd rect (at -4 -7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 111 "Net-(U4-Pad96)")) + (pad 97 smd rect (at -4.5 -7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 112 /FSMC/BL0_N)) + (pad 98 smd rect (at -5 -7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 113 /FSMC/BL1_N)) + (pad 99 smd rect (at -5.5 -7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 121 GND)) + (pad 100 smd rect (at -6 -7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 120 VSTM33)) + (model Housings_QFP.3dshapes/LQFP-100_14x14mm_Pitch0.5mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + (module Housings_QFP:LQFP-144_20x20mm_Pitch0.5mm (layer F.Cu) (tedit 54130A77) (tstamp 56C45027) (at 136.366 70.354 270) (descr "144-Lead Plastic Low Profile Quad Flatpack (PL) - 20x20x1.40 mm Body [LQFP], 2.00 mm Footprint (see Microchip Packaging Specification 00000049BS.pdf)") @@ -666,35 +898,6 @@ ) ) - (module Capacitors_SMD:C_2220_HandSoldering (layer F.Cu) (tedit 541A9D48) (tstamp 56C44F8B) - (at 129.978905 97.550988) - (descr "Capacitor SMD 2220, hand soldering") - (tags "capacitor 2220") - (path /56C43C85/56C46796) - (attr smd) - (fp_text reference R13 (at 0 -4) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value R (at 0 4) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start -5 -2.85) (end 5 -2.85) (layer F.CrtYd) (width 0.05)) - (fp_line (start -5 2.85) (end 5 2.85) (layer F.CrtYd) (width 0.05)) - (fp_line (start -5 -2.85) (end -5 2.85) (layer F.CrtYd) (width 0.05)) - (fp_line (start 5 -2.85) (end 5 2.85) (layer F.CrtYd) (width 0.05)) - (fp_line (start 2.3 -2.725) (end -2.3 -2.725) (layer F.SilkS) (width 0.15)) - (fp_line (start -2.3 2.725) (end 2.3 2.725) (layer F.SilkS) (width 0.15)) - (pad 1 smd rect (at -3.5 0) (size 2.4 5) (layers F.Cu F.Paste F.Mask) - (net 1 /FSMC/DA13)) - (pad 2 smd rect (at 3.5 0) (size 2.4 5) (layers F.Cu F.Paste F.Mask) - (net 2 /FSMC/E1_N)) - (model Capacitors_SMD.3dshapes/C_2220_HandSoldering.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 0)) - ) - ) - (module TO_SOT_Packages_SMD:SOT-223 (layer F.Cu) (tedit 0) (tstamp 56C44F93) (at 179.832 62.23) (descr "module CMS SOT223 4 pins") @@ -729,249 +932,19 @@ ) ) - (module Housings_QFP:LQFP-100_14x14mm_Pitch0.5mm (layer F.Cu) (tedit 54130A77) (tstamp 56C4508F) - (at 162.332 66.104 270) - (descr "LQFP100: plastic low profile quad flat package; 100 leads; body 14 x 14 x 1.4 mm (see NXP sot407-1_po.pdf and sot407-1_fr.pdf)") - (tags "QFP 0.5") - (path /563244F7/56C476C3) - (attr smd) - (fp_text reference U4 (at 0 -9.65 270) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value STM32F407VGT (at 0 9.65 270) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start -8.9 -8.9) (end -8.9 8.9) (layer F.CrtYd) (width 0.05)) - (fp_line (start 8.9 -8.9) (end 8.9 8.9) (layer F.CrtYd) (width 0.05)) - (fp_line (start -8.9 -8.9) (end 8.9 -8.9) (layer F.CrtYd) (width 0.05)) - (fp_line (start -8.9 8.9) (end 8.9 8.9) (layer F.CrtYd) (width 0.05)) - (fp_line (start -7.125 -7.125) (end -7.125 -6.365) (layer F.SilkS) (width 0.15)) - (fp_line (start 7.125 -7.125) (end 7.125 -6.365) (layer F.SilkS) (width 0.15)) - (fp_line (start 7.125 7.125) (end 7.125 6.365) (layer F.SilkS) (width 0.15)) - (fp_line (start -7.125 7.125) (end -7.125 6.365) (layer F.SilkS) (width 0.15)) - (fp_line (start -7.125 -7.125) (end -6.365 -7.125) (layer F.SilkS) (width 0.15)) - (fp_line (start -7.125 7.125) (end -6.365 7.125) (layer F.SilkS) (width 0.15)) - (fp_line (start 7.125 7.125) (end 6.365 7.125) (layer F.SilkS) (width 0.15)) - (fp_line (start 7.125 -7.125) (end 6.365 -7.125) (layer F.SilkS) (width 0.15)) - (fp_line (start -7.125 -6.365) (end -8.65 -6.365) (layer F.SilkS) (width 0.15)) - (pad 1 smd rect (at -7.9 -6 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) - (net 32 /FSMC/A23)) - (pad 2 smd rect (at -7.9 -5.5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) - (net 33 /FSMC/A19)) - (pad 3 smd rect (at -7.9 -5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) - (net 34 /FSMC/A20)) - (pad 4 smd rect (at -7.9 -4.5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) - (net 35 /FSMC/A21)) - (pad 5 smd rect (at -7.9 -4 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) - (net 36 /FSMC/A22)) - (pad 6 smd rect (at -7.9 -3.5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) - (net 120 VSTM33)) - (pad 7 smd rect (at -7.9 -3 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) - (net 37 "Net-(U4-Pad7)")) - (pad 8 smd rect (at -7.9 -2.5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) - (net 38 "Net-(U4-Pad8)")) - (pad 9 smd rect (at -7.9 -2 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) - (net 39 "Net-(U4-Pad9)")) - (pad 10 smd rect (at -7.9 -1.5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) - (net 121 GND)) - (pad 11 smd rect (at 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(net 108)) + (segment (start 166.673477 77.1) (end 150.953553 77.1) (width 0.153) (layer B.Cu) (net 108)) (segment (start 170.232 63.604) (end 171.296 63.604) (width 0.153) (layer F.Cu) (net 108)) (segment (start 171.296 63.604) (end 171.3 63.6) (width 0.153) (layer F.Cu) (net 108)) (via (at 171.3 63.6) (size 0.5) (drill 0.3) (layers F.Cu B.Cu) (net 108)) diff --git a/fpgna.pro b/fpgna.pro index c4655ad..a990854 100644 --- a/fpgna.pro +++ b/fpgna.pro @@ -1,4 +1,4 @@ -update=Tue 16 Feb 2016 12:07:24 PM CET +update=Mi 17 Feb 2016 20:01:19 CET version=1 last_client=kicad [pcbnew] @@ -64,3 +64,4 @@ LibName32=power/pmic LibName33=libs/specific-powersyms LibName34=power/regulators LibName35=stm/stm32f4 +LibName36=shields/itead-displays diff --git a/fpgna.sch b/fpgna.sch index f71c615..d0a2f5e 100644 --- a/fpgna.sch +++ b/fpgna.sch @@ -50,21 +50,36 @@ Comment3 "" Comment4 "" $EndDescr $Sheet -S 2800 1100 1300 850 +S 1100 1700 2050 1400 U 563244F7 F0 "powersupply" 60 F1 "power.sch" 60 +F2 "CHG_ACTIVE_N" O R 3150 2050 60 +F3 "USB_PRESENT_N" O R 3150 1950 60 +F4 "CHARGE_ENABLE" I R 3150 2150 60 +F5 "SYS_VOLTAGE" O R 3150 2350 60 +F6 "CLK_50M" O L 1100 1950 60 +F7 "FPGA_ENABLE_N" I R 3150 2450 60 $EndSheet $Sheet S 4450 1100 2250 1800 U 56337D98 F0 "debug" 60 F1 "debug.sch" 60 +F2 "JTDI" O R 6700 1300 60 +F3 "JTMS" O R 6700 1400 60 +F4 "JTDO" I R 6700 1500 60 +F5 "JTCK" O R 6700 1600 60 +F6 "JRST_N" I R 6700 1700 60 +F7 "BOOT1" O R 6700 1900 60 $EndSheet $Sheet S 7250 1100 2050 2150 U 56C43C85 F0 "FSMC" 60 F1 "FSMC.sch" 60 +F2 "BOOT1" I R 9300 1300 60 +F3 "JTDO" O R 9300 1400 60 +F4 "JRST_N" I R 9300 1500 60 $EndSheet $EndSCHEMATC diff --git a/power.sch b/power.sch index 251d0da..fabdf76 100644 --- a/power.sch +++ b/power.sch @@ -52,91 +52,91 @@ $EndDescr $Comp L LFXP2-5E-6TN144C U3 U 1 1 56323459 -P 1650 5500 -F 0 "U3" H 1650 6400 60 0000 C CNN -F 1 "LFXP2-5E-6TN144C" H 1650 6300 60 0000 C CNN -F 2 "Housings_QFP:LQFP-144_20x20mm_Pitch0.5mm" H 950 5850 60 0001 C CNN -F 3 "http://www.latticesemi.com/~/media/LatticeSemi/Documents/DataSheets/LatticeXP2/LatticeXP2FamilyDataSheet.pdf" H 600 6750 60 0001 C CNN -F 4 "1.0" H -2000 6650 60 0001 C CNN "Version" -F 5 "Makise Kurisu " H -1200 6550 60 0001 C CNN "Author" - 1 1650 5500 +P 1650 5550 +F 0 "U3" H 1650 6450 60 0000 C CNN +F 1 "LFXP2-5E-6TN144C" H 1650 6350 60 0000 C CNN +F 2 "Housings_QFP:LQFP-144_20x20mm_Pitch0.5mm" H 950 5900 60 0001 C CNN +F 3 "http://www.latticesemi.com/~/media/LatticeSemi/Documents/DataSheets/LatticeXP2/LatticeXP2FamilyDataSheet.pdf" H 600 6800 60 0001 C CNN +F 4 "1.0" H -2000 6700 60 0001 C CNN "Version" +F 5 "Makise Kurisu " H -1200 6600 60 0001 C CNN "Author" + 1 1650 5550 1 0 0 -1 $EndComp $Comp L +1V2 #PWR8 U 1 1 56323D6C -P 950 4800 -F 0 "#PWR8" H 950 4650 50 0001 C CNN -F 1 "+1V2" H 950 4940 50 0000 C CNN -F 2 "" H 950 4800 60 0000 C CNN -F 3 "" H 950 4800 60 0000 C CNN - 1 950 4800 +P 950 4850 +F 0 "#PWR8" H 950 4700 50 0001 C CNN +F 1 "+1V2" H 950 4990 50 0000 C CNN +F 2 "" H 950 4850 60 0000 C CNN +F 3 "" H 950 4850 60 0000 C CNN + 1 950 4850 1 0 0 -1 $EndComp $Comp L +3V3 #PWR3 U 1 1 56323E2C -P 700 4800 -F 0 "#PWR3" H 700 4650 50 0001 C CNN -F 1 "+3V3" H 700 4940 50 0000 C CNN -F 2 "" H 700 4800 60 0000 C CNN -F 3 "" H 700 4800 60 0000 C CNN - 1 700 4800 +P 700 4850 +F 0 "#PWR3" H 700 4700 50 0001 C CNN +F 1 "+3V3" H 700 4990 50 0000 C CNN +F 2 "" H 700 4850 60 0000 C CNN +F 3 "" H 700 4850 60 0000 C CNN + 1 700 4850 1 0 0 -1 $EndComp $Comp L GNDD #PWR7 U 1 1 56323EF3 -P 900 6200 -F 0 "#PWR7" H 900 5950 50 0001 C CNN -F 1 "GNDD" H 900 6050 50 0000 C CNN -F 2 "" H 900 6200 60 0000 C CNN -F 3 "" H 900 6200 60 0000 C CNN - 1 900 6200 +P 900 6250 +F 0 "#PWR7" H 900 6000 50 0001 C CNN +F 1 "GNDD" H 900 6100 50 0000 C CNN +F 2 "" H 900 6250 60 0000 C CNN +F 3 "" H 900 6250 60 0000 C CNN + 1 900 6250 1 0 0 -1 $EndComp $Comp L GNDD #PWR14 U 1 1 56323F5A -P 2350 4900 -F 0 "#PWR14" H 2350 4650 50 0001 C CNN -F 1 "GNDD" H 2350 4750 50 0000 C CNN -F 2 "" H 2350 4900 60 0000 C CNN -F 3 "" H 2350 4900 60 0000 C CNN - 1 2350 4900 +P 2350 4950 +F 0 "#PWR14" H 2350 4700 50 0001 C CNN +F 1 "GNDD" H 2350 4800 50 0000 C CNN +F 2 "" H 2350 4950 60 0000 C CNN +F 3 "" H 2350 4950 60 0000 C CNN + 1 2350 4950 1 0 0 -1 $EndComp $Comp L R R2 U 1 1 56323FAE -P 2550 5100 -F 0 "R2" V 2630 5100 50 0000 C CNN -F 1 "10k" V 2550 5100 50 0000 C CNN -F 2 "" V 2480 5100 30 0001 C CNN -F 3 "" H 2550 5100 30 0000 C CNN - 1 2550 5100 +P 2550 5150 +F 0 "R2" V 2630 5150 50 0000 C CNN +F 1 "10k" V 2550 5150 50 0000 C CNN +F 2 "" V 2480 5150 30 0001 C CNN +F 3 "" H 2550 5150 30 0000 C CNN + 1 2550 5150 1 0 0 -1 $EndComp $Comp L R R3 U 1 1 56324015 -P 2700 5100 -F 0 "R3" V 2780 5100 50 0000 C CNN -F 1 "10k" V 2700 5100 50 0000 C CNN -F 2 "" V 2630 5100 30 0001 C CNN -F 3 "" H 2700 5100 30 0000 C CNN - 1 2700 5100 +P 2700 5150 +F 0 "R3" V 2780 5150 50 0000 C CNN +F 1 "10k" V 2700 5150 50 0000 C CNN +F 2 "" V 2630 5150 30 0001 C CNN +F 3 "" H 2700 5150 30 0000 C CNN + 1 2700 5150 1 0 0 -1 $EndComp $Comp L +3V3 #PWR15 U 1 1 5632425D -P 2550 4800 -F 0 "#PWR15" H 2550 4650 50 0001 C CNN -F 1 "+3V3" H 2550 4940 50 0000 C CNN -F 2 "" H 2550 4800 60 0000 C CNN -F 3 "" H 2550 4800 60 0000 C CNN - 1 2550 4800 +P 2550 4850 +F 0 "#PWR15" H 2550 4700 50 0001 C CNN +F 1 "+3V3" H 2550 4990 50 0000 C CNN +F 2 "" H 2550 4850 60 0000 C CNN +F 3 "" H 2550 4850 60 0000 C CNN + 1 2550 4850 1 0 0 -1 $EndComp $Comp @@ -153,276 +153,276 @@ $EndComp $Comp L LD1117S12CTR U1 U 1 1 5632574B -P 1250 1950 -F 0 "U1" H 1250 2200 40 0000 C CNN -F 1 "LD1117S12CTR" H 1250 2150 40 0000 C CNN -F 2 "TO_SOT_Packages_SMD:SOT-223" H 1250 2050 40 0000 C CNN -F 3 "" H 1250 1950 60 0000 C CNN - 1 1250 1950 +P 1250 1900 +F 0 "U1" H 1250 2150 40 0000 C CNN +F 1 "LD1117S12CTR" H 1250 2100 40 0000 C CNN +F 2 "TO_SOT_Packages_SMD:SOT-223" H 1250 2000 40 0000 C CNN +F 3 "" H 1250 1900 60 0000 C CNN + 1 1250 1900 1 0 0 -1 $EndComp $Comp L C C2 U 1 1 56325A6A -P 700 2100 -F 0 "C2" H 725 2200 50 0000 L CNN -F 1 "10u" H 725 2000 50 0000 L CNN -F 2 "" H 738 1950 30 0001 C CNN -F 3 "" H 700 2100 60 0000 C CNN - 1 700 2100 +P 700 2050 +F 0 "C2" H 725 2150 50 0000 L CNN +F 1 "10u" H 725 1950 50 0000 L CNN +F 2 "" H 738 1900 30 0001 C CNN +F 3 "" H 700 2050 60 0000 C CNN + 1 700 2050 1 0 0 -1 $EndComp $Comp L GNDD #PWR10 U 1 1 56325A76 -P 1250 2350 -F 0 "#PWR10" H 1250 2100 50 0001 C CNN -F 1 "GNDD" H 1250 2200 50 0000 C CNN -F 2 "" H 1250 2350 60 0000 C CNN -F 3 "" H 1250 2350 60 0000 C CNN - 1 1250 2350 +P 1250 2300 +F 0 "#PWR10" H 1250 2050 50 0001 C CNN +F 1 "GNDD" H 1250 2150 50 0000 C CNN +F 2 "" H 1250 2300 60 0000 C CNN +F 3 "" H 1250 2300 60 0000 C CNN + 1 1250 2300 1 0 0 -1 $EndComp $Comp L C C5 U 1 1 56325A82 -P 2000 2100 -F 0 "C5" H 2025 2200 50 0000 L CNN -F 1 "100n" H 2025 2000 50 0000 L CNN -F 2 "" H 2038 1950 30 0001 C CNN -F 3 "" H 2000 2100 60 0000 C CNN - 1 2000 2100 +P 2000 2050 +F 0 "C5" H 2025 2150 50 0000 L CNN +F 1 "100n" H 2025 1950 50 0000 L CNN +F 2 "" H 2038 1900 30 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3950 30 0001 C CNN -F 3 "" H 750 4100 60 0000 C CNN - 1 750 4100 +P 1000 4050 +F 0 "C9" H 1025 4150 50 0000 L CNN +F 1 "10u" H 1025 3950 50 0000 L CNN +F 2 "" H 1038 3900 30 0001 C CNN +F 3 "" H 1000 4050 60 0000 C CNN + 1 1000 4050 1 0 0 -1 $EndComp $Comp L C C11 U 1 1 56326C38 -P 1000 4100 -F 0 "C11" H 1025 4200 50 0000 L CNN -F 1 "1u" H 1025 4000 50 0000 L CNN -F 2 "" H 1038 3950 30 0001 C CNN -F 3 "" H 1000 4100 60 0000 C CNN - 1 1000 4100 +P 1250 4050 +F 0 "C11" H 1275 4150 50 0000 L CNN +F 1 "1u" H 1275 3950 50 0000 L CNN +F 2 "" H 1288 3900 30 0001 C CNN +F 3 "" H 1250 4050 60 0000 C CNN + 1 1250 4050 1 0 0 -1 $EndComp $Comp L C C13 U 1 1 56326CB4 -P 1250 4100 -F 0 "C13" H 1275 4200 50 0000 L CNN -F 1 "100n" H 1275 4000 50 0000 L CNN -F 2 "" H 1288 3950 30 0001 C CNN -F 3 "" H 1250 4100 60 0000 C CNN - 1 1250 4100 +P 1500 4050 +F 0 "C13" H 1525 4150 50 0000 L CNN +F 1 "100n" H 1525 3950 50 0000 L CNN +F 2 "" H 1538 3900 30 0001 C CNN +F 3 "" H 1500 4050 60 0000 C CNN + 1 1500 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"" H 2750 3100 60 0000 C CNN - 1 2750 3100 +P 2750 3050 +F 0 "C23" H 2775 3150 50 0000 L CNN +F 1 "10n" H 2775 2950 50 0000 L CNN +F 2 "" H 2788 2900 30 0001 C CNN +F 3 "" H 2750 3050 60 0000 C CNN + 1 2750 3050 1 0 0 -1 $EndComp $Comp @@ -458,7 +458,7 @@ F 3 "" H 9500 5550 60 0000 C CNN 1 9500 5550 1 0 0 -1 $EndComp -Text HLabel 9550 5150 2 60 Input ~ 0 +Text HLabel 9550 5150 2 60 Output ~ 0 CLK_50M $Comp L USB_OTG P1 @@ -548,9 +548,9 @@ F 3 "" H 7500 2750 50 0000 C CNN 1 7500 2750 1 0 0 -1 $EndComp -Text HLabel 7200 3150 0 60 Input ~ 0 +Text HLabel 7200 3150 0 60 Output ~ 0 CHG_ACTIVE_N -Text HLabel 7200 3350 0 60 Input ~ 0 +Text HLabel 7200 3350 0 60 Output ~ 0 USB_PRESENT_N $Comp L CONN_01X03 P2 @@ -852,7 +852,7 @@ F 3 "" H 9900 1550 50 0000 C CNN 1 9900 1550 0 1 1 0 $EndComp -Text HLabel 10100 1350 2 60 Input ~ 0 +Text HLabel 10100 1350 2 60 Output ~ 0 SYS_VOLTAGE $Comp L R R7 @@ -1000,59 +1000,59 @@ $EndComp $Comp L VFPGA33 #PWR2 U 1 1 56C350CF -P 700 1800 -F 0 "#PWR2" H 700 1650 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