From f7edc8dacc4750c3ee218c80e1038d5963aff080 Mon Sep 17 00:00:00 2001 From: Makise Kurisu Date: Wed, 17 Feb 2016 16:32:48 +0100 Subject: [PATCH] Continued schematic, testing some layout stuff --- FSMC.sch | 585 +++++++++++++++--- debug.sch | 16 +- fpgna-cache.lib | 13 + fpgna.kicad_pcb | 990 +++++++++++++++++++++++++++++++ fpgna.kicad_pcb-bak | 1011 +++++++++++++++++++++++++++++++ fpgna.net | 1378 +++++++++++++++++++++++++++++++++++++++++++ power.sch | 252 +++++--- 7 files changed, 4087 insertions(+), 158 deletions(-) create mode 100644 fpgna.kicad_pcb create mode 100644 fpgna.kicad_pcb-bak create mode 100644 fpgna.net diff --git a/FSMC.sch b/FSMC.sch index b5456fb..081a0ca 100644 --- a/FSMC.sch +++ b/FSMC.sch @@ -50,23 +50,23 @@ Comment3 "" Comment4 "" $EndDescr $Comp -L STM32F407VGT U5 +L STM32F407VGT U4 U 6 1 56C43C8E P 2450 4850 -F 0 "U5" H 3228 4053 60 0000 L CNN +F 0 "U4" H 3228 4053 60 0000 L CNN F 1 "STM32F407VGT" H 3228 3947 60 0000 L CNN -F 2 "Housings_QFP:TQFP-48_7x7mm_Pitch0.5mm" H 1950 5350 60 0001 C CNN +F 2 "Housings_QFP:LQFP-100_14x14mm_Pitch0.5mm" H 1950 5350 60 0001 C CNN F 3 "" H 1950 5350 60 0000 C CNN 6 2450 4850 -1 0 0 -1 $EndComp $Comp -L STM32F407VGT U5 +L STM32F407VGT U4 U 5 1 56C43FCF P 2450 3050 -F 0 "U5" H 3228 2253 60 0000 L CNN +F 0 "U4" H 3228 2253 60 0000 L CNN F 1 "STM32F407VGT" H 3228 2147 60 0000 L CNN -F 2 "Housings_QFP:TQFP-48_7x7mm_Pitch0.5mm" H 1950 3550 60 0001 C CNN +F 2 "Housings_QFP:LQFP-100_14x14mm_Pitch0.5mm" H 1950 3550 60 0001 C CNN F 3 "" H 1950 3550 60 0000 C CNN 5 2450 3050 -1 0 0 -1 @@ -89,6 +89,256 @@ Text Label 3000 6350 2 60 ~ 0 DA11 Text Label 3000 6450 2 60 ~ 0 DA12 +Text Label 3000 4550 2 60 ~ 0 +DA0 +Text Label 3000 4650 2 60 ~ 0 +DA1 +Text Label 3000 3150 2 60 ~ 0 +DA2 +Text Label 3000 3250 2 60 ~ 0 +DA3 +Text Label 3000 3950 2 60 ~ 0 +DA13 +Text Label 3000 4050 2 60 ~ 0 +DA14 +Text Label 3000 4150 2 60 ~ 0 +DA15 +Text Label 3000 4250 2 60 ~ 0 +A16 +Text Label 3000 4350 2 60 ~ 0 +A17 +Text Label 3000 4450 2 60 ~ 0 +A18 +Text Label 3000 5250 2 60 ~ 0 +A19 +Text Label 3000 5350 2 60 ~ 0 +A20 +Text Label 3000 5450 2 60 ~ 0 +A21 +Text Label 3000 5550 2 60 ~ 0 +A22 +Text Label 3000 5150 2 60 ~ 0 +A23 +Text Label 3000 3550 2 60 ~ 0 +OE_N +Text Label 3000 3650 2 60 ~ 0 +WE_N +Text Label 3000 3750 2 60 ~ 0 +WAIT_N +Text Label 3000 3850 2 60 ~ 0 +E1_N +Text Label 3000 4950 2 60 ~ 0 +BL0_N +Text Label 3000 5050 2 60 ~ 0 +BL1_N +Text Label 3000 3450 2 60 ~ 0 +CLK +$Comp +L STM32F407VGT U4 +U 3 1 56C4412A +P 2450 1250 +F 0 "U4" H 3268 453 60 0000 L CNN +F 1 "STM32F407VGT" H 3268 347 60 0000 L CNN +F 2 "Housings_QFP:LQFP-100_14x14mm_Pitch0.5mm" H 1950 1750 60 0001 C CNN +F 3 "" H 1950 1750 60 0000 C CNN + 3 2450 1250 + -1 0 0 -1 +$EndComp +Text Label 3000 2050 2 60 ~ 0 +ADV_N +Text HLabel 2750 1550 2 60 Input ~ 0 +BOOT1 +Text HLabel 2750 1650 2 60 Input ~ 0 +JTDO +Text HLabel 2750 1750 2 60 Input ~ 0 +JRST_N +$Comp +L STM32F407VGT U4 +U 2 1 56C47A20 +P 9150 750 +F 0 "U4" H 9969 -47 60 0000 L CNN +F 1 "STM32F407VGT" H 9969 -153 60 0000 L CNN +F 2 "Housings_QFP:LQFP-100_14x14mm_Pitch0.5mm" H 8650 1250 60 0001 C CNN +F 3 "" H 8650 1250 60 0000 C CNN + 2 9150 750 + 1 0 0 -1 +$EndComp +$Comp +L STM32F407VGT U4 +U 4 1 56C47A60 +P 9100 2500 +F 0 "U4" H 9878 1703 60 0000 L CNN +F 1 "STM32F407VGT" H 9878 1597 60 0000 L CNN +F 2 "Housings_QFP:LQFP-100_14x14mm_Pitch0.5mm" H 8600 3000 60 0001 C CNN +F 3 "" H 8600 3000 60 0000 C CNN + 4 9100 2500 + 1 0 0 -1 +$EndComp +$Comp +L STM32F407VGT U4 +U 7 1 56C47B2B +P 9250 4550 +F 0 "U4" H 9828 4328 60 0000 L CNN +F 1 "STM32F407VGT" H 9828 4222 60 0000 L CNN +F 2 "Housings_QFP:LQFP-100_14x14mm_Pitch0.5mm" H 8750 5050 60 0001 C CNN +F 3 "" H 8750 5050 60 0000 C CNN + 7 9250 4550 + 1 0 0 -1 +$EndComp +$Comp +L LFXP2-5E-6TN144C U3 +U 2 1 56C48ABA +P 4700 4900 +F 0 "U3" H 4700 5837 60 0000 C CNN +F 1 "LFXP2-5E-6TN144C" H 4700 5731 60 0000 C CNN +F 2 "Housings_QFP:LQFP-144_20x20mm_Pitch0.5mm" H 4000 5250 60 0001 C CNN +F 3 "http://www.latticesemi.com/~/media/LatticeSemi/Documents/DataSheets/LatticeXP2/LatticeXP2FamilyDataSheet.pdf" H 3650 6150 60 0001 C CNN +F 4 "1.0" H 1050 6050 60 0001 C CNN "Version" +F 5 "Makise Kurisu " H 1850 5950 60 0001 C CNN "Author" + 2 4700 4900 + 1 0 0 -1 +$EndComp +$Comp +L LFXP2-5E-6TN144C U3 +U 3 1 56C48B2B +P 6650 2300 +F 0 "U3" H 6650 3237 60 0000 C CNN +F 1 "LFXP2-5E-6TN144C" H 6650 3131 60 0000 C CNN +F 2 "Housings_QFP:LQFP-144_20x20mm_Pitch0.5mm" H 5950 2650 60 0001 C CNN +F 3 "http://www.latticesemi.com/~/media/LatticeSemi/Documents/DataSheets/LatticeXP2/LatticeXP2FamilyDataSheet.pdf" H 5600 3550 60 0001 C CNN +F 4 "1.0" H 3000 3450 60 0001 C CNN "Version" +F 5 "Makise Kurisu " H 3800 3350 60 0001 C CNN "Author" + 3 6650 2300 + 1 0 0 -1 +$EndComp +$Comp +L LFXP2-5E-6TN144C U3 +U 4 1 56C48B85 +P 4950 1450 +F 0 "U3" H 4950 2387 60 0000 C CNN +F 1 "LFXP2-5E-6TN144C" H 4950 2281 60 0000 C CNN +F 2 "Housings_QFP:LQFP-144_20x20mm_Pitch0.5mm" H 4250 1800 60 0001 C CNN +F 3 "http://www.latticesemi.com/~/media/LatticeSemi/Documents/DataSheets/LatticeXP2/LatticeXP2FamilyDataSheet.pdf" H 3900 2700 60 0001 C CNN +F 4 "1.0" H 1300 2600 60 0001 C CNN "Version" +F 5 "Makise Kurisu " H 2100 2500 60 0001 C CNN "Author" + 4 4950 1450 + 1 0 0 -1 +$EndComp +$Comp +L LFXP2-5E-6TN144C U3 +U 5 1 56C48C1B +P 8050 5150 +F 0 "U3" H 8050 6087 60 0000 C CNN +F 1 "LFXP2-5E-6TN144C" H 8050 5981 60 0000 C CNN +F 2 "Housings_QFP:LQFP-144_20x20mm_Pitch0.5mm" H 7350 5500 60 0001 C CNN +F 3 "http://www.latticesemi.com/~/media/LatticeSemi/Documents/DataSheets/LatticeXP2/LatticeXP2FamilyDataSheet.pdf" H 7000 6400 60 0001 C CNN +F 4 "1.0" H 4400 6300 60 0001 C CNN "Version" +F 5 "Makise Kurisu " H 5200 6200 60 0001 C CNN "Author" + 5 8050 5150 + 1 0 0 -1 +$EndComp +Text Label 5600 1050 0 60 ~ 0 +B4 +Text Label 4300 1550 2 60 ~ 0 +B5 +Text Label 7300 2450 0 60 ~ 0 +B2 +Text Label 6000 1900 2 60 ~ 0 +B3 +Text Label 8700 5150 0 60 ~ 0 +B6 +Text Label 7400 5350 2 60 ~ 0 +B7 +$Comp +L C C28 +U 1 1 56C675D2 +P 6000 6900 +F 0 "C28" H 6050 7000 50 0000 L CNN +F 1 "100n" H 6050 6800 50 0000 L CNN +F 2 "" H 6038 6750 50 0000 C CNN +F 3 "" H 6000 6900 50 0000 C CNN + 1 6000 6900 + 1 0 0 -1 +$EndComp +$Comp +L C C29 +U 1 1 56C676A2 +P 6300 6900 +F 0 "C29" H 6350 7000 50 0000 L CNN +F 1 "100n" H 6350 6800 50 0000 L CNN +F 2 "" H 6338 6750 50 0000 C CNN +F 3 "" H 6300 6900 50 0000 C CNN + 1 6300 6900 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR54 +U 1 1 56C67B1F +P 5400 7200 +F 0 "#PWR54" H 5400 6950 50 0001 C CNN +F 1 "GND" H 5408 7026 50 0000 C CNN +F 2 "" H 5400 7200 50 0000 C CNN +F 3 "" H 5400 7200 50 0000 C CNN + 1 5400 7200 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR55 +U 1 1 56C67B55 +P 5600 7200 +F 0 "#PWR55" H 5600 6950 50 0001 C CNN +F 1 "GND" H 5608 7026 50 0000 C CNN +F 2 "" H 5600 7200 50 0000 C CNN +F 3 "" H 5600 7200 50 0000 C CNN + 1 5600 7200 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR57 +U 1 1 56C67C80 +P 6150 7200 +F 0 "#PWR57" H 6150 6950 50 0001 C CNN +F 1 "GND" H 6158 7026 50 0000 C CNN +F 2 "" H 6150 7200 50 0000 C CNN +F 3 "" H 6150 7200 50 0000 C CNN + 1 6150 7200 + 1 0 0 -1 +$EndComp +$Comp +L C C27 +U 1 1 56C67EC9 +P 3800 7000 +F 0 "C27" H 3850 7100 50 0000 L CNN +F 1 "100n" H 3850 6900 50 0000 L CNN +F 2 "" H 3838 6850 50 0000 C CNN +F 3 "" H 3800 7000 50 0000 C CNN + 1 3800 7000 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR53 +U 1 1 56C680A6 +P 4000 7200 +F 0 "#PWR53" H 4000 6950 50 0001 C CNN +F 1 "GND" H 4008 7026 50 0000 C CNN +F 2 "" H 4000 7200 50 0000 C CNN +F 3 "" H 4000 7200 50 0000 C CNN + 1 4000 7200 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR52 +U 1 1 56C6815E +P 3800 7200 +F 0 "#PWR52" H 3800 6950 50 0001 C CNN +F 1 "GND" H 3808 7026 50 0000 C CNN +F 2 "" H 3800 7200 50 0000 C CNN +F 3 "" H 3800 7200 50 0000 C CNN + 1 3800 7200 + 1 0 0 -1 +$EndComp +Text Label 3700 4900 0 60 ~ 0 +CLK Wire Wire Line 2650 4950 3000 4950 Wire Wire Line @@ -125,26 +375,10 @@ Wire Wire Line 2650 4550 3000 4550 Wire Wire Line 2650 4650 3000 4650 -Text Label 3000 4550 2 60 ~ 0 -DA0 -Text Label 3000 4650 2 60 ~ 0 -DA1 Wire Wire Line 2650 3150 3000 3150 -Text Label 3000 3150 2 60 ~ 0 -DA2 -Text Label 3000 3250 2 60 ~ 0 -DA3 Wire Wire Line 3000 3250 2650 3250 -Wire Wire Line - 2650 3950 3300 3950 -Text Label 3000 3950 2 60 ~ 0 -DA13 -Text Label 3000 4050 2 60 ~ 0 -DA14 -Text Label 3000 4150 2 60 ~ 0 -DA15 Wire Wire Line 2650 4150 3000 4150 Wire Wire Line @@ -155,22 +389,6 @@ Wire Wire Line 2650 4350 3000 4350 Wire Wire Line 2650 4450 3000 4450 -Text Label 3000 4250 2 60 ~ 0 -A16 -Text Label 3000 4350 2 60 ~ 0 -A17 -Text Label 3000 4450 2 60 ~ 0 -A18 -Text Label 3000 5250 2 60 ~ 0 -A19 -Text Label 3000 5350 2 60 ~ 0 -A20 -Text Label 3000 5450 2 60 ~ 0 -A21 -Text Label 3000 5550 2 60 ~ 0 -A22 -Text Label 3000 5150 2 60 ~ 0 -A23 Wire Wire Line 2650 3350 3000 3350 Wire Wire Line @@ -183,58 +401,259 @@ Wire Wire Line 2650 3750 3000 3750 Wire Wire Line 2650 3850 3000 3850 -Text Label 3000 3550 2 60 ~ 0 -OE_N -Text Label 3000 3650 2 60 ~ 0 -WE_N -Text Label 3000 3750 2 60 ~ 0 -WAIT_N -Text Label 3000 3850 2 60 ~ 0 -E1_N -Text Label 3000 4950 2 60 ~ 0 -BL0_N -Text Label 3000 5050 2 60 ~ 0 -BL1_N -Text Label 3000 3450 2 60 ~ 0 -CLK -$Comp -L STM32F407VGT U5 -U 3 1 56C4412A -P 2450 1250 -F 0 "U5" H 3268 453 60 0000 L CNN -F 1 "STM32F407VGT" H 3268 347 60 0000 L CNN -F 2 "Housings_QFP:TQFP-48_7x7mm_Pitch0.5mm" H 1950 1750 60 0001 C CNN -F 3 "" H 1950 1750 60 0000 C CNN - 3 2450 1250 - -1 0 0 -1 -$EndComp Wire Wire Line 2650 2050 3000 2050 -Text Label 3000 2050 2 60 ~ 0 -ADV_N -Text HLabel 2750 1550 2 60 Input ~ 0 -BOOT1 -Text HLabel 2750 1650 2 60 Input ~ 0 -JTDO -Text HLabel 2750 1750 2 60 Input ~ 0 -JRST_N Wire Wire Line 2750 1550 2650 1550 Wire Wire Line 2750 1650 2650 1650 Wire Wire Line 2750 1750 2650 1750 -$Comp -L R R? -U 1 1 56C46796 -P 3150 3850 -F 0 "R?" V 2942 3850 50 0000 C CNN -F 1 "R" V 3034 3850 50 0000 C CNN -F 2 "" V 3080 3850 50 0000 C CNN -F 3 "" H 3150 3850 50 0000 C CNN - 1 3150 3850 - 0 1 1 0 -$EndComp Wire Wire Line - 3300 3950 3300 3850 + 5600 950 5600 1650 +Connection ~ 5600 1050 +Connection ~ 5600 1150 +Connection ~ 5600 1250 +Connection ~ 5600 1350 +Connection ~ 5600 1450 +Connection ~ 5600 1550 +Wire Wire Line + 4300 950 4300 2650 +Connection ~ 4300 1050 +Connection ~ 4300 1150 +Connection ~ 4300 1250 +Connection ~ 4300 1350 +Connection ~ 4300 1450 +Connection ~ 4300 1550 +Connection ~ 4300 1750 +Connection ~ 4300 1650 +Connection ~ 4300 1850 +Connection ~ 4300 1950 +Connection ~ 4300 2050 +Connection ~ 4300 2150 +Connection ~ 4300 2250 +Connection ~ 4300 2350 +Connection ~ 4300 2450 +Connection ~ 4300 2550 +Wire Wire Line + 7300 1800 7300 3500 +Wire Wire Line + 6000 1800 6000 2100 +Wire Wire Line + 8700 4650 8700 5350 +Wire Wire Line + 7400 4650 7400 6350 +Wire Wire Line + 3000 3950 2650 3950 +Connection ~ 7400 4750 +Connection ~ 7400 4850 +Connection ~ 7400 4950 +Connection ~ 7400 5050 +Connection ~ 7400 5150 +Connection ~ 7400 5250 +Connection ~ 7400 5450 +Connection ~ 7400 5550 +Connection ~ 7400 5650 +Connection ~ 7400 5750 +Connection ~ 7400 5850 +Connection ~ 7400 5950 +Connection ~ 7400 6050 +Connection ~ 7400 6150 +Connection ~ 7400 6250 +Connection ~ 8700 4950 +Connection ~ 8700 5050 +Connection ~ 8700 5250 +Connection ~ 8700 4850 +Connection ~ 8700 4750 +Connection ~ 7300 3350 +Connection ~ 7300 3400 +Connection ~ 7300 3300 +Connection ~ 7300 3250 +Connection ~ 7300 3200 +Connection ~ 7300 3100 +Connection ~ 7300 3000 +Connection ~ 7300 2900 +Connection ~ 7300 2800 +Connection ~ 7300 2700 +Connection ~ 7300 2600 +Connection ~ 7300 2500 +Connection ~ 7300 2350 +Connection ~ 7300 2400 +Connection ~ 7300 2300 +Connection ~ 7300 2200 +Connection ~ 7300 2100 +Connection ~ 7300 1950 +Connection ~ 7300 1900 +Connection ~ 7300 2000 +Connection ~ 6000 2000 +Connection ~ 6000 1900 +Wire Wire Line + 5350 6600 6300 6600 +Wire Wire Line + 6300 6550 6300 6750 +Wire Wire Line + 6000 6550 6000 6750 +Wire Wire Line + 6000 6700 5350 6700 +Wire Wire Line + 6000 7050 6300 7050 +Wire Wire Line + 5400 7200 5400 6900 +Wire Wire Line + 5400 6900 5350 6900 +Wire Wire Line + 5350 6800 5600 6800 +Wire Wire Line + 5600 6800 5600 7200 +Wire Wire Line + 6150 7200 6150 7050 +Connection ~ 6150 7050 +Wire Wire Line + 3800 6550 3800 6850 +Wire Wire Line + 3800 6800 4050 6800 +Wire Wire Line + 4000 7200 4000 6900 +Wire Wire Line + 4000 6900 4050 6900 +Wire Wire Line + 3800 7200 3800 7150 +Wire Wire Line + 4050 4900 3700 4900 +Wire Wire Line + 5350 4400 5750 4400 +Wire Wire Line + 5350 4500 5750 4500 +Wire Wire Line + 5350 4800 5750 4800 +Wire Wire Line + 5350 4900 5750 4900 +Wire Wire Line + 5350 5000 5750 5000 +Wire Wire Line + 5350 5100 5750 5100 +Wire Wire Line + 5350 5200 5750 5200 +Wire Wire Line + 5350 5300 5750 5300 +Wire Wire Line + 5350 5400 5750 5400 +Wire Wire Line + 5350 5500 5750 5500 +Wire Wire Line + 5350 5600 5750 5600 +Wire Wire Line + 5350 5700 5750 5700 +Wire Wire Line + 5350 5800 5750 5800 +Wire Wire Line + 5350 5900 5750 5900 +Wire Wire Line + 5350 6000 5750 6000 +Wire Wire Line + 5350 6100 5750 6100 +Wire Wire Line + 5350 6200 5750 6200 +Wire Wire Line + 5350 6300 5750 6300 +Wire Wire Line + 5350 4600 5750 4600 +Wire Wire Line + 5350 4700 5750 4700 +Text Label 5750 4400 2 60 ~ 0 +DA1 +Text Label 5750 4500 2 60 ~ 0 +DA0 +Text Label 5750 4800 2 60 ~ 0 +DA15 +Text Label 5750 4900 2 60 ~ 0 +DA14 +Text Label 5750 5000 2 60 ~ 0 +DA13 +Text Label 5750 5100 2 60 ~ 0 +DA12 +Text Label 5750 5200 2 60 ~ 0 +DA11 +Text Label 5750 5300 2 60 ~ 0 +DA10 +Text Label 5750 5400 2 60 ~ 0 +DA9 +Text Label 5750 5500 2 60 ~ 0 +DA8 +Text Label 5750 5600 2 60 ~ 0 +DA7 +Text Label 5750 5700 2 60 ~ 0 +DA6 +Text Label 5750 5800 2 60 ~ 0 +DA5 +Text Label 5750 5900 2 60 ~ 0 +DA4 +Text Label 5750 4600 2 60 ~ 0 +DA2 +Text Label 5750 4700 2 60 ~ 0 +DA3 +Wire Wire Line + 4050 4400 3700 4400 +Wire Wire Line + 4050 4500 3700 4500 +Wire Wire Line + 4050 4600 3700 4600 +Wire Wire Line + 4050 4700 3700 4700 +Wire Wire Line + 4050 4800 3700 4800 +Text Label 3700 4800 0 60 ~ 0 +OE_N +Text Label 3700 4700 0 60 ~ 0 +WE_N +Text Label 3700 4600 0 60 ~ 0 +WAIT_N +Text Label 3700 4500 0 60 ~ 0 +E1_N +Text Label 3700 4400 0 60 ~ 0 +ADV_N +Text Label 5750 6000 2 60 ~ 0 +A16 +Text Label 5750 6100 2 60 ~ 0 +A17 +Text Label 5750 6200 2 60 ~ 0 +A18 +Text Label 5750 6300 2 60 ~ 0 +A19 +$Comp +L VFPGA33 #PWR58 +U 1 1 56C6B01D +P 6300 6550 +F 0 "#PWR58" H 6300 6400 50 0001 C CNN +F 1 "VFPGA33" H 6318 6724 50 0000 C CNN +F 2 "" H 6300 6550 50 0000 C CNN +F 3 "" H 6300 6550 50 0000 C CNN + 1 6300 6550 + 1 0 0 -1 +$EndComp +Connection ~ 6300 6600 +$Comp +L VFPGA33 #PWR56 +U 1 1 56C6B114 +P 6000 6550 +F 0 "#PWR56" H 6000 6400 50 0001 C CNN +F 1 "VFPGA33" H 6018 6724 50 0000 C CNN +F 2 "" H 6000 6550 50 0000 C CNN +F 3 "" H 6000 6550 50 0000 C CNN + 1 6000 6550 + 1 0 0 -1 +$EndComp +Connection ~ 6000 6700 +$Comp +L VFPGA33 #PWR51 +U 1 1 56C6B644 +P 3800 6550 +F 0 "#PWR51" H 3800 6400 50 0001 C CNN +F 1 "VFPGA33" H 3818 6724 50 0000 C CNN +F 2 "" H 3800 6550 50 0000 C CNN +F 3 "" H 3800 6550 50 0000 C CNN + 1 3800 6550 + 1 0 0 -1 +$EndComp +Connection ~ 3800 6800 $EndSCHEMATC diff --git a/debug.sch b/debug.sch index c059c59..226347f 100644 --- a/debug.sch +++ b/debug.sch @@ -82,10 +82,10 @@ Wire Wire Line Wire Wire Line 4000 1500 3550 1500 $Comp -L +3V3 #PWR44 +L +3V3 #PWR47 U 1 1 5633932E P 3550 800 -F 0 "#PWR44" H 3550 650 50 0001 C CNN +F 0 "#PWR47" H 3550 650 50 0001 C CNN F 1 "+3V3" H 3550 940 50 0000 C CNN F 2 "" H 3550 800 60 0000 C CNN F 3 "" H 3550 800 60 0000 C CNN @@ -104,10 +104,10 @@ F 3 "" H 3750 1050 60 0000 C CNN 1 0 0 -1 $EndComp $Comp -L GNDD #PWR45 +L GNDD #PWR48 U 1 1 5633954D P 3750 1300 -F 0 "#PWR45" H 3750 1050 50 0001 C CNN +F 0 "#PWR48" H 3750 1050 50 0001 C CNN F 1 "GNDD" H 3750 1150 50 0000 C CNN F 2 "" H 3750 1300 60 0000 C CNN F 3 "" H 3750 1300 60 0000 C CNN @@ -124,10 +124,10 @@ Connection ~ 3550 850 Wire Wire Line 3750 1200 3750 1300 $Comp -L +3V3 #PWR46 +L +3V3 #PWR49 U 1 1 568DA1D5 P 5150 1400 -F 0 "#PWR46" H 5150 1250 50 0001 C CNN +F 0 "#PWR49" H 5150 1250 50 0001 C CNN F 1 "+3V3" H 5150 1540 50 0000 C CNN F 2 "" H 5150 1400 60 0000 C CNN F 3 "" H 5150 1400 60 0000 C CNN @@ -139,10 +139,10 @@ Wire Wire Line Wire Wire Line 5150 1600 4900 1600 $Comp -L GNDD #PWR47 +L GNDD #PWR50 U 1 1 568DA1F8 P 5150 1900 -F 0 "#PWR47" H 5150 1650 50 0001 C CNN +F 0 "#PWR50" H 5150 1650 50 0001 C CNN F 1 "GNDD" H 5150 1750 50 0000 C CNN F 2 "" H 5150 1900 60 0000 C CNN F 3 "" H 5150 1900 60 0000 C CNN diff --git a/fpgna-cache.lib b/fpgna-cache.lib index 8cde3bf..6efb13b 100644 --- a/fpgna-cache.lib +++ b/fpgna-cache.lib @@ -130,6 +130,19 @@ X A 2 100 0 70 L 50 50 1 1 P ENDDRAW ENDDEF # +# GND +# +DEF GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -250 50 H I C CNN +F1 "GND" 0 -150 50 H V C CNN +F2 "" 0 0 50 H V C CNN +F3 "" 0 0 50 H V C CNN +DRAW +P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N +X GND 1 0 0 0 D 50 50 1 1 W N +ENDDRAW +ENDDEF +# # GNDD # DEF GNDD #PWR 0 0 Y Y 1 F P diff --git a/fpgna.kicad_pcb b/fpgna.kicad_pcb new file mode 100644 index 0000000..3a9f051 --- /dev/null +++ b/fpgna.kicad_pcb @@ -0,0 +1,990 @@ +(kicad_pcb (version 4) (host pcbnew "(2016-02-12 BZR 6554)-stable") + + (general + (links 126) + (no_connects 119) + (area 0 0 0 0) + (thickness 1.6) + (drawings 0) + (tracks 25) + (zones 0) + (modules 4) + (nets 124) + ) + + (page A4) + (layers + (0 F.Cu signal) + (31 B.Cu signal) + (32 B.Adhes user) + (33 F.Adhes user) + (34 B.Paste user) + (35 F.Paste user) + (36 B.SilkS user) + (37 F.SilkS user) + (38 B.Mask user) + (39 F.Mask user) + (40 Dwgs.User user) + (41 Cmts.User user) + (42 Eco1.User user) + (43 Eco2.User user) + (44 Edge.Cuts user) + (45 Margin user) + (46 B.CrtYd user) + (47 F.CrtYd user) + (48 B.Fab user) + (49 F.Fab user) + ) + + (setup + (last_trace_width 0.153) + (trace_clearance 0.153) + (zone_clearance 0.508) + (zone_45_only no) + (trace_min 0.153) + (segment_width 0.2) + (edge_width 0.1) + (via_size 0.5) + (via_drill 0.3) + (via_min_size 0.4) + (via_min_drill 0.3) + (uvia_size 0.3) + (uvia_drill 0.1) + (uvias_allowed no) + (uvia_min_size 0.2) + (uvia_min_drill 0.1) + (pcb_text_width 0.3) + (pcb_text_size 1.5 1.5) + (mod_edge_width 0.15) + (mod_text_size 1 1) + (mod_text_width 0.15) + (pad_size 1.5 1.5) + (pad_drill 0.6) + (pad_to_mask_clearance 0) + (aux_axis_origin 0 0) + (visible_elements FFFFFF7F) + (pcbplotparams + (layerselection 0x00030_ffffffff) + (usegerberextensions false) + (excludeedgelayer true) + (linewidth 0.100000) + (plotframeref false) + (viasonmask false) + (mode 1) + (useauxorigin false) + (hpglpennumber 1) + (hpglpenspeed 20) + (hpglpendiameter 15) + (psnegative false) + (psa4output false) + (plotreference true) + (plotvalue true) + (plotinvisibletext false) + (padsonsilk false) + (subtractmaskfromsilk false) + (outputformat 1) + (mirror false) + (drillshape 1) + (scaleselection 1) + (outputdirectory "")) + ) + + (net 0 "") + (net 1 /FSMC/DA13) + (net 2 /FSMC/E1_N) + (net 3 "Net-(C4-Pad1)") + (net 4 VFPGA33) + (net 5 GNDD) + (net 6 "Net-(U3-Pad3)") + (net 7 "Net-(U3-Pad4)") + (net 8 "Net-(U3-Pad12)") + (net 9 "Net-(U3-Pad14)") + (net 10 +3V3) + (net 11 +1V2) + (net 12 "Net-(R2-Pad2)") + (net 13 "Net-(R3-Pad2)") + (net 14 "Net-(U3-Pad33)") + (net 15 "Net-(U3-Pad34)") + (net 16 "Net-(U3-Pad41)") + (net 17 "Net-(U3-Pad42)") + (net 18 "Net-(U3-Pad49)") + (net 19 "Net-(U3-Pad51)") + (net 20 "Net-(U3-Pad63)") + (net 21 "Net-(U3-Pad64)") + (net 22 "Net-(U3-Pad75)") + (net 23 "Net-(U3-Pad76)") + (net 24 "Net-(P3-Pad3)") + (net 25 "Net-(P3-Pad5)") + (net 26 "Net-(P3-Pad1)") + (net 27 "Net-(P3-Pad7)") + (net 28 "Net-(U3-Pad95)") + (net 29 "Net-(U3-Pad97)") + (net 30 "Net-(U3-Pad105)") + (net 31 "Net-(U3-Pad106)") + (net 32 /FSMC/A23) + (net 33 /FSMC/A19) + (net 34 /FSMC/A20) + (net 35 /FSMC/A21) + (net 36 /FSMC/A22) + (net 37 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/FSMC/B7) + (net 115 /FSMC/B6) + (net 116 /FSMC/B5) + (net 117 /FSMC/B4) + (net 118 /FSMC/B3) + (net 119 /FSMC/B2) + (net 120 VSTM33) + (net 121 GND) + (net 122 /powersupply/VCAP1) + (net 123 /powersupply/VCAP2) + + (net_class Default "This is the default net class." + (clearance 0.153) + (trace_width 0.153) + (via_dia 0.5) + (via_drill 0.3) + (uvia_dia 0.3) + (uvia_drill 0.1) + (add_net +1V2) + (add_net +3V3) + (add_net /FSMC/A16) + (add_net /FSMC/A17) + (add_net /FSMC/A18) + (add_net /FSMC/A19) + (add_net /FSMC/A20) + (add_net /FSMC/A21) + (add_net /FSMC/A22) + (add_net /FSMC/A23) + (add_net /FSMC/ADV_N) + (add_net /FSMC/B2) + (add_net /FSMC/B3) + (add_net /FSMC/B4) + (add_net /FSMC/B5) + (add_net /FSMC/B6) + (add_net /FSMC/B7) + (add_net /FSMC/BL0_N) + (add_net /FSMC/BL1_N) + (add_net /FSMC/BOOT1) + (add_net /FSMC/CLK) + (add_net /FSMC/DA0) + (add_net /FSMC/DA1) + (add_net /FSMC/DA10) + (add_net /FSMC/DA11) + (add_net /FSMC/DA12) + (add_net /FSMC/DA13) + (add_net /FSMC/DA14) + (add_net /FSMC/DA15) + (add_net /FSMC/DA2) + (add_net /FSMC/DA3) + (add_net /FSMC/DA4) + (add_net /FSMC/DA5) + (add_net /FSMC/DA6) + (add_net /FSMC/DA7) + (add_net /FSMC/DA8) + (add_net /FSMC/DA9) + (add_net /FSMC/E1_N) + (add_net /FSMC/JRST_N) + (add_net /FSMC/JTDO) + (add_net /FSMC/OE_N) + (add_net /FSMC/WAIT_N) + (add_net /FSMC/WE_N) + (add_net /powersupply/VCAP1) + (add_net /powersupply/VCAP2) + (add_net GND) + (add_net GNDD) + (add_net "Net-(C4-Pad1)") + (add_net "Net-(P3-Pad1)") + (add_net "Net-(P3-Pad3)") + (add_net "Net-(P3-Pad5)") + (add_net "Net-(P3-Pad7)") + (add_net "Net-(R2-Pad2)") + (add_net "Net-(R3-Pad2)") + (add_net "Net-(U3-Pad105)") + (add_net "Net-(U3-Pad106)") + (add_net "Net-(U3-Pad12)") + (add_net "Net-(U3-Pad14)") + (add_net "Net-(U3-Pad3)") + (add_net "Net-(U3-Pad33)") + (add_net "Net-(U3-Pad34)") + (add_net "Net-(U3-Pad4)") + (add_net "Net-(U3-Pad41)") + (add_net "Net-(U3-Pad42)") + (add_net "Net-(U3-Pad49)") + (add_net "Net-(U3-Pad51)") + (add_net "Net-(U3-Pad63)") + (add_net "Net-(U3-Pad64)") + (add_net "Net-(U3-Pad75)") + (add_net "Net-(U3-Pad76)") + (add_net "Net-(U3-Pad95)") + (add_net "Net-(U3-Pad97)") + (add_net "Net-(U4-Pad12)") + (add_net "Net-(U4-Pad13)") + (add_net "Net-(U4-Pad14)") + (add_net "Net-(U4-Pad15)") + (add_net "Net-(U4-Pad16)") + (add_net "Net-(U4-Pad17)") + (add_net "Net-(U4-Pad18)") + (add_net "Net-(U4-Pad23)") + (add_net "Net-(U4-Pad24)") + (add_net "Net-(U4-Pad25)") + (add_net "Net-(U4-Pad26)") + (add_net "Net-(U4-Pad29)") + (add_net "Net-(U4-Pad30)") + (add_net "Net-(U4-Pad31)") + (add_net "Net-(U4-Pad32)") + (add_net "Net-(U4-Pad33)") + (add_net "Net-(U4-Pad34)") + (add_net "Net-(U4-Pad35)") + (add_net "Net-(U4-Pad36)") + (add_net "Net-(U4-Pad47)") + (add_net "Net-(U4-Pad48)") + (add_net "Net-(U4-Pad51)") + (add_net "Net-(U4-Pad52)") + (add_net "Net-(U4-Pad53)") + (add_net "Net-(U4-Pad54)") + (add_net "Net-(U4-Pad63)") + (add_net "Net-(U4-Pad64)") + (add_net "Net-(U4-Pad65)") + (add_net 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(layers F.Cu F.Paste F.Mask) + (net 21 "Net-(U3-Pad64)")) + (pad 65 smd rect (at 5.25 10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 117 /FSMC/B4)) + (pad 66 smd rect (at 5.75 10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 117 /FSMC/B4)) + (pad 67 smd rect (at 6.25 10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 10 +3V3)) + (pad 68 smd rect (at 6.75 10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 5 GNDD)) + (pad 69 smd rect (at 7.25 10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 117 /FSMC/B4)) + (pad 70 smd rect (at 7.75 10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 117 /FSMC/B4)) + (pad 71 smd rect (at 8.25 10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 117 /FSMC/B4)) + (pad 72 smd rect (at 8.75 10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 117 /FSMC/B4)) + (pad 73 smd rect (at 10.7 8.75 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 118 /FSMC/B3)) + (pad 74 smd rect (at 10.7 8.25 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 118 /FSMC/B3)) + (pad 75 smd rect (at 10.7 7.75 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 22 "Net-(U3-Pad75)")) + (pad 76 smd rect (at 10.7 7.25 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 23 "Net-(U3-Pad76)")) + (pad 77 smd rect (at 10.7 6.75 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 118 /FSMC/B3)) + (pad 78 smd rect (at 10.7 6.25 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 118 /FSMC/B3)) + (pad 79 smd rect (at 10.7 5.75 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 24 "Net-(P3-Pad3)")) + (pad 80 smd rect (at 10.7 5.25 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 25 "Net-(P3-Pad5)")) + (pad 81 smd rect (at 10.7 4.75 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 26 "Net-(P3-Pad1)")) + (pad 82 smd rect (at 10.7 4.25 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 27 "Net-(P3-Pad7)")) + (pad 83 smd rect (at 10.7 3.75 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 10 +3V3)) + (pad 84 smd rect (at 10.7 3.25 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 11 +1V2)) + (pad 85 smd rect (at 10.7 2.75 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 10 +3V3)) + (pad 86 smd rect (at 10.7 2.25 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 5 GNDD)) + (pad 87 smd rect (at 10.7 1.75 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 119 /FSMC/B2)) + (pad 88 smd rect (at 10.7 1.25 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 119 /FSMC/B2)) + (pad 89 smd rect (at 10.7 0.75 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 119 /FSMC/B2)) + (pad 90 smd rect (at 10.7 0.25 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 119 /FSMC/B2)) + (pad 91 smd rect (at 10.7 -0.25 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 119 /FSMC/B2)) + (pad 92 smd rect (at 10.7 -0.75 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 119 /FSMC/B2)) + (pad 93 smd rect (at 10.7 -1.25 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 119 /FSMC/B2)) + (pad 94 smd rect (at 10.7 -1.75 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 119 /FSMC/B2)) + (pad 95 smd rect (at 10.7 -2.25 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 28 "Net-(U3-Pad95)")) + (pad 96 smd rect (at 10.7 -2.75 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 119 /FSMC/B2)) + (pad 97 smd rect (at 10.7 -3.25 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 29 "Net-(U3-Pad97)")) + (pad 98 smd rect (at 10.7 -3.75 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 119 /FSMC/B2)) + (pad 99 smd rect (at 10.7 -4.25 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 119 /FSMC/B2)) + (pad 100 smd rect (at 10.7 -4.75 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 119 /FSMC/B2)) + (pad 101 smd rect (at 10.7 -5.25 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 119 /FSMC/B2)) + (pad 102 smd rect (at 10.7 -5.75 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 119 /FSMC/B2)) + (pad 103 smd rect (at 10.7 -6.25 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 119 /FSMC/B2)) + (pad 104 smd rect (at 10.7 -6.75 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 119 /FSMC/B2)) + (pad 105 smd rect (at 10.7 -7.25 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 30 "Net-(U3-Pad105)")) + (pad 106 smd rect (at 10.7 -7.75 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 31 "Net-(U3-Pad106)")) + (pad 107 smd rect (at 10.7 -8.25 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 119 /FSMC/B2)) + (pad 108 smd rect (at 10.7 -8.75 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 119 /FSMC/B2)) + (pad 109 smd rect (at 8.75 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 108 /FSMC/ADV_N)) + (pad 110 smd rect (at 8.25 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 2 /FSMC/E1_N)) + (pad 111 smd rect (at 7.75 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 121 GND)) + (pad 112 smd rect (at 7.25 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 4 VFPGA33)) + (pad 113 smd rect (at 6.75 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 103 /FSMC/WAIT_N)) + (pad 114 smd rect (at 6.25 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 102 /FSMC/WE_N)) + (pad 115 smd rect (at 5.75 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 101 /FSMC/OE_N)) + (pad 116 smd rect (at 5.25 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 100 /FSMC/CLK)) + (pad 117 smd rect (at 4.75 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 10 +3V3)) + (pad 118 smd rect (at 4.25 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 11 +1V2)) + (pad 119 smd rect (at 3.75 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 81 /FSMC/DA1)) + (pad 120 smd rect (at 3.25 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 80 /FSMC/DA0)) + (pad 121 smd rect (at 2.75 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 97 /FSMC/DA2)) + (pad 122 smd rect (at 2.25 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 98 /FSMC/DA3)) + (pad 123 smd rect (at 1.75 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 76 /FSMC/DA15)) + (pad 124 smd rect (at 1.25 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 75 /FSMC/DA14)) + (pad 125 smd rect (at 0.75 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 1 /FSMC/DA13)) + (pad 126 smd rect (at 0.25 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 121 GND)) + (pad 127 smd rect (at -0.25 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 68 /FSMC/DA12)) + (pad 128 smd rect (at -0.75 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 4 VFPGA33)) + (pad 129 smd rect (at -1.25 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 67 /FSMC/DA11)) + (pad 130 smd rect (at -1.75 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 66 /FSMC/DA10)) + (pad 131 smd rect (at -2.25 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 65 /FSMC/DA9)) + (pad 132 smd rect (at -2.75 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 64 /FSMC/DA8)) + (pad 133 smd rect (at -3.25 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 63 /FSMC/DA7)) + (pad 134 smd rect (at -3.75 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 62 /FSMC/DA6)) + (pad 135 smd rect (at -4.25 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 121 GND)) + (pad 136 smd rect (at -4.75 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 4 VFPGA33)) + (pad 137 smd rect (at -5.25 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 61 /FSMC/DA5)) + (pad 138 smd rect (at -5.75 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 60 /FSMC/DA4)) + (pad 139 smd rect (at -6.25 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 5 GNDD)) + (pad 140 smd rect (at -6.75 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 10 +3V3)) + (pad 141 smd rect (at -7.25 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 77 /FSMC/A16)) + (pad 142 smd rect (at -7.75 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 78 /FSMC/A17)) + (pad 143 smd rect (at -8.25 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 79 /FSMC/A18)) + (pad 144 smd rect (at -8.75 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 33 /FSMC/A19)) + (model Housings_QFP.3dshapes/LQFP-144_20x20mm_Pitch0.5mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitors_SMD:C_2220_HandSoldering (layer F.Cu) (tedit 541A9D48) (tstamp 56C44F8B) + (at 129.978905 97.550988) + (descr "Capacitor SMD 2220, hand soldering") + (tags "capacitor 2220") + (path /56C43C85/56C46796) + (attr smd) + (fp_text reference R13 (at 0 -4) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value R (at 0 4) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -5 -2.85) (end 5 -2.85) (layer F.CrtYd) (width 0.05)) + (fp_line (start -5 2.85) (end 5 2.85) (layer F.CrtYd) (width 0.05)) + (fp_line (start -5 -2.85) (end -5 2.85) (layer F.CrtYd) (width 0.05)) + (fp_line (start 5 -2.85) (end 5 2.85) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.3 -2.725) (end -2.3 -2.725) (layer F.SilkS) (width 0.15)) + (fp_line (start -2.3 2.725) (end 2.3 2.725) (layer F.SilkS) (width 0.15)) + (pad 1 smd rect (at -3.5 0) (size 2.4 5) (layers F.Cu F.Paste F.Mask) + (net 1 /FSMC/DA13)) + (pad 2 smd rect (at 3.5 0) (size 2.4 5) (layers F.Cu F.Paste F.Mask) + (net 2 /FSMC/E1_N)) + (model Capacitors_SMD.3dshapes/C_2220_HandSoldering.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module TO_SOT_Packages_SMD:SOT-223 (layer F.Cu) (tedit 0) (tstamp 56C44F93) + (at 179.832 62.23) + (descr "module CMS SOT223 4 pins") + (tags "CMS SOT") + (path /563244F7/5632574B) + (attr smd) + (fp_text reference U1 (at 0 -0.762) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value LD1117S12CTR (at 0 0.762) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -3.556 1.524) (end -3.556 4.572) (layer F.SilkS) (width 0.15)) + (fp_line (start -3.556 4.572) (end 3.556 4.572) (layer F.SilkS) (width 0.15)) + (fp_line (start 3.556 4.572) (end 3.556 1.524) (layer F.SilkS) (width 0.15)) + (fp_line (start -3.556 -1.524) (end -3.556 -2.286) (layer F.SilkS) (width 0.15)) + (fp_line (start -3.556 -2.286) (end -2.032 -4.572) (layer F.SilkS) (width 0.15)) + (fp_line (start -2.032 -4.572) (end 2.032 -4.572) (layer F.SilkS) (width 0.15)) + (fp_line (start 2.032 -4.572) (end 3.556 -2.286) (layer F.SilkS) (width 0.15)) + (fp_line (start 3.556 -2.286) (end 3.556 -1.524) (layer F.SilkS) (width 0.15)) + (pad 4 smd rect (at 0 -3.302) (size 3.6576 2.032) (layers F.Cu F.Paste F.Mask)) + (pad 2 smd rect (at 0 3.302) (size 1.016 2.032) (layers F.Cu F.Paste F.Mask) + (net 3 "Net-(C4-Pad1)")) + (pad 3 smd rect (at 2.286 3.302) (size 1.016 2.032) (layers F.Cu F.Paste F.Mask) + (net 4 VFPGA33)) + (pad 1 smd rect (at -2.286 3.302) (size 1.016 2.032) (layers F.Cu F.Paste F.Mask) + (net 5 GNDD)) + (model TO_SOT_Packages_SMD.3dshapes/SOT-223.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.4 0.4 0.4)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Housings_QFP:LQFP-100_14x14mm_Pitch0.5mm (layer F.Cu) (tedit 54130A77) (tstamp 56C4508F) + (at 162.332 66.104 270) + (descr "LQFP100: plastic low profile quad flat package; 100 leads; body 14 x 14 x 1.4 mm (see NXP sot407-1_po.pdf and sot407-1_fr.pdf)") + (tags "QFP 0.5") + (path /563244F7/56C476C3) + (attr smd) + (fp_text reference U4 (at 0 -9.65 270) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value STM32F407VGT (at 0 9.65 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -8.9 -8.9) (end -8.9 8.9) (layer F.CrtYd) (width 0.05)) + (fp_line (start 8.9 -8.9) (end 8.9 8.9) (layer F.CrtYd) (width 0.05)) + (fp_line (start -8.9 -8.9) (end 8.9 -8.9) (layer F.CrtYd) (width 0.05)) + (fp_line (start -8.9 8.9) (end 8.9 8.9) (layer F.CrtYd) (width 0.05)) + (fp_line (start -7.125 -7.125) (end -7.125 -6.365) (layer F.SilkS) (width 0.15)) + (fp_line (start 7.125 -7.125) (end 7.125 -6.365) (layer F.SilkS) (width 0.15)) + (fp_line (start 7.125 7.125) (end 7.125 6.365) (layer F.SilkS) (width 0.15)) + (fp_line (start -7.125 7.125) (end -7.125 6.365) (layer F.SilkS) (width 0.15)) + (fp_line (start -7.125 -7.125) (end -6.365 -7.125) (layer F.SilkS) (width 0.15)) + (fp_line (start -7.125 7.125) (end -6.365 7.125) (layer F.SilkS) (width 0.15)) + (fp_line (start 7.125 7.125) (end 6.365 7.125) (layer F.SilkS) (width 0.15)) + (fp_line (start 7.125 -7.125) (end 6.365 -7.125) (layer F.SilkS) (width 0.15)) + (fp_line (start -7.125 -6.365) (end -8.65 -6.365) (layer F.SilkS) (width 0.15)) + (pad 1 smd rect (at -7.9 -6 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 32 /FSMC/A23)) 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68.604) (width 0.153) (layer F.Cu) (net 65)) + (segment (start 148.404102 68.604) (end 147.904102 68.104) (width 0.153) (layer F.Cu) (net 65)) + (segment (start 147.904102 68.104) (end 147.066 68.104) (width 0.153) (layer F.Cu) (net 65)) + (segment (start 154.432 69.104) (end 148.336864 69.104) (width 0.153) (layer F.Cu) (net 66)) + (segment (start 148.336864 69.104) (end 147.836864 68.604) (width 0.153) (layer F.Cu) (net 66)) + (segment (start 147.836864 68.604) (end 147.066 68.604) (width 0.153) (layer F.Cu) (net 66)) + (segment (start 154.432 69.604) (end 148.404102 69.604) (width 0.153) (layer F.Cu) (net 67)) + (segment (start 148.404102 69.604) (end 147.904102 69.104) (width 0.153) (layer F.Cu) (net 67)) + (segment (start 147.904102 69.104) (end 147.066 69.104) (width 0.153) (layer F.Cu) (net 67)) + (segment (start 154.432 70.104) (end 147.066 70.104) (width 0.153) (layer F.Cu) (net 68)) + +) diff --git a/fpgna.kicad_pcb-bak b/fpgna.kicad_pcb-bak new file mode 100644 index 0000000..795bcf9 --- /dev/null +++ b/fpgna.kicad_pcb-bak @@ -0,0 +1,1011 @@ +(kicad_pcb (version 4) (host pcbnew "(2016-02-12 BZR 6554)-stable") + + (general + (links 106) + (no_connects 106) + (area 124.753904 58.805988 178.742 102.525988) + (thickness 1.6) + (drawings 0) + (tracks 6) + (zones 0) + (modules 4) + (nets 144) + ) + + (page A4) + (layers + (0 F.Cu signal) + (31 B.Cu signal) + (32 B.Adhes user) + (33 F.Adhes user) + (34 B.Paste user) + (35 F.Paste user) + (36 B.SilkS user) + (37 F.SilkS user) + (38 B.Mask user) + (39 F.Mask user) + (40 Dwgs.User user) + (41 Cmts.User user) + (42 Eco1.User user) + (43 Eco2.User user) + (44 Edge.Cuts user) + (45 Margin user) + (46 B.CrtYd user) + (47 F.CrtYd user) + (48 B.Fab user) + (49 F.Fab user) + ) + + (setup + (last_trace_width 0.153) + (trace_clearance 0.153) + (zone_clearance 0.508) + (zone_45_only no) + (trace_min 0.153) + (segment_width 0.2) + (edge_width 0.1) + (via_size 0.5) + (via_drill 0.3) + (via_min_size 0.4) + (via_min_drill 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(layers F.Cu F.Paste F.Mask) + (net 138 /FSMC/B5)) + (pad 55 smd rect (at 0.25 10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 138 /FSMC/B5)) + (pad 56 smd rect (at 0.75 10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 138 /FSMC/B5)) + (pad 57 smd rect (at 1.25 10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 138 /FSMC/B5)) + (pad 58 smd rect (at 1.75 10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 138 /FSMC/B5)) + (pad 59 smd rect (at 2.25 10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 11 +1V2)) + (pad 60 smd rect (at 2.75 10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 10 +3V3)) + (pad 61 smd rect (at 3.25 10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 139 /FSMC/B4)) + (pad 62 smd rect (at 3.75 10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 139 /FSMC/B4)) + (pad 63 smd rect (at 4.25 10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 20 "Net-(U3-Pad63)")) + (pad 64 smd rect (at 4.75 10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 21 "Net-(U3-Pad64)")) + (pad 65 smd rect (at 5.25 10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 139 /FSMC/B4)) + (pad 66 smd rect (at 5.75 10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 139 /FSMC/B4)) + (pad 67 smd rect (at 6.25 10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 10 +3V3)) + (pad 68 smd rect (at 6.75 10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 5 GNDD)) + (pad 69 smd rect (at 7.25 10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 139 /FSMC/B4)) + (pad 70 smd rect (at 7.75 10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 139 /FSMC/B4)) + (pad 71 smd rect (at 8.25 10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 139 /FSMC/B4)) + (pad 72 smd rect (at 8.75 10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 139 /FSMC/B4)) + (pad 73 smd rect (at 10.7 8.75 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 140 /FSMC/B3)) + (pad 74 smd rect (at 10.7 8.25 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 140 /FSMC/B3)) + (pad 75 smd rect (at 10.7 7.75 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 22 "Net-(U3-Pad75)")) + (pad 76 smd rect (at 10.7 7.25 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 23 "Net-(U3-Pad76)")) + (pad 77 smd rect (at 10.7 6.75 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 140 /FSMC/B3)) + (pad 78 smd rect (at 10.7 6.25 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 140 /FSMC/B3)) + (pad 79 smd rect (at 10.7 5.75 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 24 "Net-(P3-Pad3)")) + (pad 80 smd rect (at 10.7 5.25 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 25 "Net-(P3-Pad5)")) + (pad 81 smd rect (at 10.7 4.75 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 26 "Net-(P3-Pad1)")) + (pad 82 smd rect (at 10.7 4.25 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 27 "Net-(P3-Pad7)")) + (pad 83 smd rect (at 10.7 3.75 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 10 +3V3)) + (pad 84 smd rect (at 10.7 3.25 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 11 +1V2)) + (pad 85 smd rect (at 10.7 2.75 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 10 +3V3)) + (pad 86 smd rect (at 10.7 2.25 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 5 GNDD)) + (pad 87 smd rect (at 10.7 1.75 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 141 /FSMC/B2)) + (pad 88 smd rect (at 10.7 1.25 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 141 /FSMC/B2)) + (pad 89 smd rect (at 10.7 0.75 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 141 /FSMC/B2)) + (pad 90 smd rect (at 10.7 0.25 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 141 /FSMC/B2)) + (pad 91 smd rect (at 10.7 -0.25 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 141 /FSMC/B2)) + (pad 92 smd rect (at 10.7 -0.75 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 141 /FSMC/B2)) + (pad 93 smd rect (at 10.7 -1.25 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 141 /FSMC/B2)) + (pad 94 smd rect (at 10.7 -1.75 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 141 /FSMC/B2)) + (pad 95 smd rect (at 10.7 -2.25 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 28 "Net-(U3-Pad95)")) + (pad 96 smd rect (at 10.7 -2.75 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 141 /FSMC/B2)) + (pad 97 smd rect (at 10.7 -3.25 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 29 "Net-(U3-Pad97)")) + (pad 98 smd rect (at 10.7 -3.75 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 141 /FSMC/B2)) + (pad 99 smd rect (at 10.7 -4.25 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 141 /FSMC/B2)) + (pad 100 smd rect (at 10.7 -4.75 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 141 /FSMC/B2)) + (pad 101 smd rect (at 10.7 -5.25 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 141 /FSMC/B2)) + (pad 102 smd rect (at 10.7 -5.75 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 141 /FSMC/B2)) + (pad 103 smd rect (at 10.7 -6.25 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 141 /FSMC/B2)) + (pad 104 smd rect (at 10.7 -6.75 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 141 /FSMC/B2)) + (pad 105 smd rect (at 10.7 -7.25 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 30 "Net-(U3-Pad105)")) + (pad 106 smd rect (at 10.7 -7.75 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 31 "Net-(U3-Pad106)")) + (pad 107 smd rect (at 10.7 -8.25 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 141 /FSMC/B2)) + (pad 108 smd rect (at 10.7 -8.75 270) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 141 /FSMC/B2)) + (pad 109 smd rect (at 8.75 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 142 /FSMC/B1)) + (pad 110 smd rect (at 8.25 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 142 /FSMC/B1)) + (pad 111 smd rect (at 7.75 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 32 "Net-(U3-Pad111)")) + (pad 112 smd rect (at 7.25 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 33 "Net-(U3-Pad112)")) + (pad 113 smd rect (at 6.75 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 142 /FSMC/B1)) + (pad 114 smd rect (at 6.25 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 142 /FSMC/B1)) + (pad 115 smd rect (at 5.75 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 142 /FSMC/B1)) + (pad 116 smd rect (at 5.25 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 142 /FSMC/B1)) + (pad 117 smd rect (at 4.75 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 10 +3V3)) + (pad 118 smd rect (at 4.25 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 11 +1V2)) + (pad 119 smd rect (at 3.75 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 143 /FSMC/B0)) + (pad 120 smd rect (at 3.25 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 143 /FSMC/B0)) + (pad 121 smd rect (at 2.75 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 143 /FSMC/B0)) + (pad 122 smd rect (at 2.25 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 143 /FSMC/B0)) + (pad 123 smd rect (at 1.75 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 143 /FSMC/B0)) + (pad 124 smd rect (at 1.25 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 143 /FSMC/B0)) + (pad 125 smd rect (at 0.75 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 143 /FSMC/B0)) + (pad 126 smd rect (at 0.25 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 34 "Net-(U3-Pad126)")) + (pad 127 smd rect (at -0.25 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 143 /FSMC/B0)) + (pad 128 smd rect (at -0.75 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 35 "Net-(U3-Pad128)")) + (pad 129 smd rect (at -1.25 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 143 /FSMC/B0)) + (pad 130 smd rect (at -1.75 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 143 /FSMC/B0)) + (pad 131 smd rect (at -2.25 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 143 /FSMC/B0)) + (pad 132 smd rect (at -2.75 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 143 /FSMC/B0)) + (pad 133 smd rect (at -3.25 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 143 /FSMC/B0)) + (pad 134 smd rect (at -3.75 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 143 /FSMC/B0)) + (pad 135 smd rect (at -4.25 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 36 "Net-(U3-Pad135)")) + (pad 136 smd rect (at -4.75 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 37 "Net-(U3-Pad136)")) + (pad 137 smd rect (at -5.25 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 143 /FSMC/B0)) + (pad 138 smd rect (at -5.75 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 143 /FSMC/B0)) + (pad 139 smd rect (at -6.25 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 5 GNDD)) + (pad 140 smd rect (at -6.75 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 10 +3V3)) + (pad 141 smd rect (at -7.25 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 143 /FSMC/B0)) + (pad 142 smd rect (at -7.75 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 143 /FSMC/B0)) + (pad 143 smd rect (at -8.25 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 143 /FSMC/B0)) + (pad 144 smd rect (at -8.75 -10.7) (size 1.55 0.3) (layers F.Cu F.Paste F.Mask) + (net 143 /FSMC/B0)) + (model Housings_QFP.3dshapes/LQFP-144_20x20mm_Pitch0.5mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitors_SMD:C_2220_HandSoldering (layer F.Cu) (tedit 541A9D48) (tstamp 56C44F8B) + (at 129.978905 97.550988) + (descr "Capacitor SMD 2220, hand soldering") + (tags "capacitor 2220") + (path /56C43C85/56C46796) + (attr smd) + (fp_text reference R13 (at 0 -4) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value R (at 0 4) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -5 -2.85) (end 5 -2.85) (layer F.CrtYd) (width 0.05)) + (fp_line (start -5 2.85) (end 5 2.85) (layer F.CrtYd) (width 0.05)) + (fp_line (start -5 -2.85) (end -5 2.85) (layer F.CrtYd) (width 0.05)) + (fp_line (start 5 -2.85) (end 5 2.85) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.3 -2.725) (end -2.3 -2.725) (layer F.SilkS) (width 0.15)) + (fp_line (start -2.3 2.725) (end 2.3 2.725) (layer F.SilkS) (width 0.15)) + (pad 1 smd rect (at -3.5 0) (size 2.4 5) (layers F.Cu F.Paste F.Mask) + (net 1 /FSMC/DA13)) + (pad 2 smd rect (at 3.5 0) (size 2.4 5) (layers F.Cu F.Paste F.Mask) + (net 2 /FSMC/E1_N)) + (model Capacitors_SMD.3dshapes/C_2220_HandSoldering.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module TO_SOT_Packages_SMD:SOT-223 (layer F.Cu) (tedit 0) (tstamp 56C44F93) + (at 179.832 62.23) + (descr "module CMS SOT223 4 pins") + (tags "CMS SOT") + (path /563244F7/5632574B) + (attr smd) + (fp_text reference U1 (at 0 -0.762) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value LD1117S12CTR (at 0 0.762) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -3.556 1.524) (end -3.556 4.572) (layer F.SilkS) (width 0.15)) + (fp_line (start -3.556 4.572) (end 3.556 4.572) (layer F.SilkS) (width 0.15)) + (fp_line (start 3.556 4.572) (end 3.556 1.524) (layer F.SilkS) (width 0.15)) + (fp_line (start -3.556 -1.524) (end -3.556 -2.286) (layer F.SilkS) (width 0.15)) + (fp_line (start -3.556 -2.286) (end -2.032 -4.572) (layer F.SilkS) (width 0.15)) + (fp_line (start -2.032 -4.572) (end 2.032 -4.572) (layer F.SilkS) (width 0.15)) + (fp_line (start 2.032 -4.572) (end 3.556 -2.286) (layer F.SilkS) (width 0.15)) + (fp_line (start 3.556 -2.286) (end 3.556 -1.524) (layer F.SilkS) (width 0.15)) + (pad 4 smd rect (at 0 -3.302) (size 3.6576 2.032) (layers F.Cu F.Paste F.Mask)) + (pad 2 smd rect (at 0 3.302) (size 1.016 2.032) (layers F.Cu F.Paste F.Mask) + (net 3 "Net-(C4-Pad1)")) + (pad 3 smd rect (at 2.286 3.302) (size 1.016 2.032) (layers F.Cu F.Paste F.Mask) + (net 4 VFPGA33)) + (pad 1 smd rect (at -2.286 3.302) (size 1.016 2.032) (layers F.Cu F.Paste F.Mask) + (net 5 GNDD)) + (model TO_SOT_Packages_SMD.3dshapes/SOT-223.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.4 0.4 0.4)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Housings_QFP:LQFP-100_14x14mm_Pitch0.5mm (layer F.Cu) (tedit 54130A77) (tstamp 56C4508F) + (at 160.554 66.644 270) + (descr "LQFP100: plastic low profile quad flat package; 100 leads; body 14 x 14 x 1.4 mm (see NXP sot407-1_po.pdf and sot407-1_fr.pdf)") + (tags "QFP 0.5") + (path /563244F7/56C476C3) + (attr smd) + (fp_text reference U4 (at 0 -9.65 270) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value STM32F407VGT (at 0 9.65 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -8.9 -8.9) (end -8.9 8.9) (layer F.CrtYd) (width 0.05)) + (fp_line (start 8.9 -8.9) (end 8.9 8.9) (layer F.CrtYd) (width 0.05)) + (fp_line (start -8.9 -8.9) (end 8.9 -8.9) (layer F.CrtYd) (width 0.05)) + (fp_line (start -8.9 8.9) (end 8.9 8.9) (layer F.CrtYd) (width 0.05)) + (fp_line (start -7.125 -7.125) (end -7.125 -6.365) (layer F.SilkS) (width 0.15)) + (fp_line (start 7.125 -7.125) (end 7.125 -6.365) (layer F.SilkS) (width 0.15)) + (fp_line (start 7.125 7.125) (end 7.125 6.365) (layer F.SilkS) (width 0.15)) + (fp_line (start -7.125 7.125) (end -7.125 6.365) (layer F.SilkS) (width 0.15)) + (fp_line (start -7.125 -7.125) (end -6.365 -7.125) (layer F.SilkS) (width 0.15)) + (fp_line (start -7.125 7.125) (end -6.365 7.125) (layer F.SilkS) (width 0.15)) + (fp_line (start 7.125 7.125) (end 6.365 7.125) (layer F.SilkS) (width 0.15)) + (fp_line (start 7.125 -7.125) (end 6.365 -7.125) (layer F.SilkS) (width 0.15)) + (fp_line (start -7.125 -6.365) (end -8.65 -6.365) (layer F.SilkS) (width 0.15)) + (pad 1 smd rect (at -7.9 -6 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 38 /FSMC/A23)) + (pad 2 smd rect (at -7.9 -5.5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 39 /FSMC/A19)) + (pad 3 smd rect (at -7.9 -5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 40 /FSMC/A20)) + (pad 4 smd rect (at -7.9 -4.5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 41 /FSMC/A21)) + (pad 5 smd rect (at -7.9 -4 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 42 /FSMC/A22)) + (pad 6 smd rect (at -7.9 -3.5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 43 "Net-(U4-Pad6)")) + (pad 7 smd rect (at -7.9 -3 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 44 "Net-(U4-Pad7)")) + (pad 8 smd rect (at -7.9 -2.5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 45 "Net-(U4-Pad8)")) + (pad 9 smd rect (at -7.9 -2 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 46 "Net-(U4-Pad9)")) + (pad 10 smd rect (at -7.9 -1.5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + 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"Net-(U4-Pad19)")) + (pad 20 smd rect (at -7.9 3.5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 57 "Net-(U4-Pad20)")) + (pad 21 smd rect (at -7.9 4 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 58 "Net-(U4-Pad21)")) + (pad 22 smd rect (at -7.9 4.5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 59 "Net-(U4-Pad22)")) + (pad 23 smd rect (at -7.9 5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 60 "Net-(U4-Pad23)")) + (pad 24 smd rect (at -7.9 5.5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 61 "Net-(U4-Pad24)")) + (pad 25 smd rect (at -7.9 6 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 62 "Net-(U4-Pad25)")) + (pad 26 smd rect (at -6 7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 63 "Net-(U4-Pad26)")) + (pad 27 smd rect (at -5.5 7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 64 "Net-(U4-Pad27)")) + (pad 28 smd rect (at -5 7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 65 "Net-(U4-Pad28)")) + (pad 29 smd rect (at -4.5 7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 66 "Net-(U4-Pad29)")) + (pad 30 smd rect (at -4 7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 67 "Net-(U4-Pad30)")) + (pad 31 smd rect (at -3.5 7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 68 "Net-(U4-Pad31)")) + (pad 32 smd rect (at -3 7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 69 "Net-(U4-Pad32)")) + (pad 33 smd rect (at -2.5 7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 70 "Net-(U4-Pad33)")) + (pad 34 smd rect (at -2 7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 71 "Net-(U4-Pad34)")) + (pad 35 smd rect (at -1.5 7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 72 "Net-(U4-Pad35)")) + (pad 36 smd rect (at -1 7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 73 "Net-(U4-Pad36)")) + (pad 37 smd rect (at -0.5 7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 74 /FSMC/BOOT1)) + (pad 38 smd rect (at 0 7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 75 /FSMC/DA4)) + (pad 39 smd rect (at 0.5 7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 76 /FSMC/DA5)) + (pad 40 smd rect (at 1 7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 77 /FSMC/DA6)) + (pad 41 smd rect (at 1.5 7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 78 /FSMC/DA7)) + (pad 42 smd rect (at 2 7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 79 /FSMC/DA8)) + (pad 43 smd rect (at 2.5 7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 80 /FSMC/DA9)) + (pad 44 smd rect (at 3 7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 81 /FSMC/DA10)) + (pad 45 smd rect (at 3.5 7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 82 /FSMC/DA11)) + (pad 46 smd rect (at 4 7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 83 /FSMC/DA12)) + (pad 47 smd rect (at 4.5 7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 84 "Net-(U4-Pad47)")) + (pad 48 smd rect (at 5 7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 85 "Net-(U4-Pad48)")) + (pad 49 smd rect (at 5.5 7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 86 "Net-(U4-Pad49)")) + (pad 50 smd rect (at 6 7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 87 "Net-(U4-Pad50)")) + (pad 51 smd rect (at 7.9 6 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 88 "Net-(U4-Pad51)")) + (pad 52 smd rect (at 7.9 5.5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 89 "Net-(U4-Pad52)")) + (pad 53 smd rect (at 7.9 5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 90 "Net-(U4-Pad53)")) + (pad 54 smd rect (at 7.9 4.5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 91 "Net-(U4-Pad54)")) + (pad 55 smd rect (at 7.9 4 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 1 /FSMC/DA13)) + (pad 56 smd rect (at 7.9 3.5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 92 /FSMC/DA14)) + (pad 57 smd rect (at 7.9 3 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 93 /FSMC/DA15)) + (pad 58 smd rect (at 7.9 2.5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 94 /FSMC/A16)) + (pad 59 smd rect (at 7.9 2 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 95 /FSMC/A17)) + (pad 60 smd rect (at 7.9 1.5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 96 /FSMC/A18)) + (pad 61 smd rect (at 7.9 1 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 97 /FSMC/DA0)) + (pad 62 smd rect (at 7.9 0.5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 98 /FSMC/DA1)) + (pad 63 smd rect (at 7.9 0 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 99 "Net-(U4-Pad63)")) + (pad 64 smd rect (at 7.9 -0.5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 100 "Net-(U4-Pad64)")) + (pad 65 smd rect (at 7.9 -1 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 101 "Net-(U4-Pad65)")) + (pad 66 smd rect (at 7.9 -1.5 270) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 102 "Net-(U4-Pad66)")) + (pad 67 smd rect (at 7.9 -2 270) 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1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 112 "Net-(U4-Pad76)")) + (pad 77 smd rect (at 5.5 -7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 113 "Net-(U4-Pad77)")) + (pad 78 smd rect (at 5 -7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 114 "Net-(U4-Pad78)")) + (pad 79 smd rect (at 4.5 -7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 115 "Net-(U4-Pad79)")) + (pad 80 smd rect (at 4 -7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 116 "Net-(U4-Pad80)")) + (pad 81 smd rect (at 3.5 -7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 117 /FSMC/DA2)) + (pad 82 smd rect (at 3 -7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 118 /FSMC/DA3)) + (pad 83 smd rect (at 2.5 -7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 119 "Net-(U4-Pad83)")) + (pad 84 smd rect (at 2 -7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 120 /FSMC/CLK)) + (pad 85 smd rect (at 1.5 -7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 121 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(layers F.Cu F.Paste F.Mask) + (net 130 "Net-(U4-Pad95)")) + (pad 96 smd rect (at -4 -7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 131 "Net-(U4-Pad96)")) + (pad 97 smd rect (at -4.5 -7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 132 /FSMC/BL0_N)) + (pad 98 smd rect (at -5 -7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 133 /FSMC/BL1_N)) + (pad 99 smd rect (at -5.5 -7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 134 "Net-(U4-Pad99)")) + (pad 100 smd rect (at -6 -7.9) (size 1.5 0.28) (layers F.Cu F.Paste F.Mask) + (net 135 "Net-(U4-Pad100)")) + (model Housings_QFP.3dshapes/LQFP-100_14x14mm_Pitch0.5mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (segment (start 156.554 74.544) (end 156.554 73.641) (width 0.153) (layer F.Cu) (net 1)) + (segment (start 156.554 73.641) (end 156.477499 73.564499) (width 0.153) (layer F.Cu) (net 1)) + (segment (start 156.477499 73.564499) (end 149.955501 73.564499) (width 0.153) (layer F.Cu) (net 1)) + (segment (start 157.054 74.544) (end 157.054 73.641) (width 0.153) (layer F.Cu) (net 92)) + (segment (start 157.054 73.641) (end 156.671489 73.258489) (width 0.153) (layer F.Cu) (net 92)) + (segment (start 156.671489 73.258489) (end 149.828748 73.258489) (width 0.153) (layer F.Cu) (net 92)) + +) diff --git a/fpgna.net b/fpgna.net new file mode 100644 index 0000000..ba0f07f --- /dev/null +++ b/fpgna.net @@ -0,0 +1,1378 @@ +(export (version D) + (design + (source /home/kurisu/projects/kicad/fpgna/fpgna.sch) + (date "Wed 17 Feb 2016 03:43:00 PM CET") + (tool "Eeschema (2016-02-12 BZR 6554)-stable") + (sheet (number 1) (name /) (tstamps /) + (title_block + (title FPGna) + (company Shimatta) + (rev) + (date) + (source fpgna.sch) + (comment (number 1) (value "")) + (comment (number 2) (value "")) + (comment (number 3) (value "")) + (comment (number 4) (value "")))) + (sheet (number 2) (name /powersupply/) (tstamps /563244F7/) + (title_block + (title FPGna) + (company Shimatta) + (rev) + (date) + (source power.sch) + (comment (number 1) (value "Power supply, clock and JTAG")) + (comment (number 2) (value "")) + (comment (number 3) (value "")) + (comment (number 4) (value "")))) + (sheet (number 3) (name /debug/) (tstamps /56337D98/) + (title_block + (title) + (company) + (rev) + (date) + (source debug.sch) + (comment (number 1) (value "")) + (comment (number 2) (value "")) + (comment (number 3) (value "")) + (comment (number 4) (value "")))) + (sheet (number 4) (name /FSMC/) (tstamps /56C43C85/) + (title_block + (title) + (company) + (rev) + (date) + (source FSMC.sch) + (comment (number 1) (value "")) + (comment (number 2) (value "")) + (comment (number 3) (value "")) + (comment (number 4) (value ""))))) + (components + (comp (ref U3) + (value LFXP2-5E-6TN144C) + (footprint Housings_QFP:LQFP-144_20x20mm_Pitch0.5mm) + (datasheet http://www.latticesemi.com/~/media/LatticeSemi/Documents/DataSheets/LatticeXP2/LatticeXP2FamilyDataSheet.pdf) + (fields + (field (name Version) 1.0) + (field (name Author) "Makise Kurisu ")) + (libsource (lib lattice) (part LFXP2-5E-6TN144C)) + (sheetpath (names /powersupply/) (tstamps /563244F7/)) + (tstamp 56323459)) + (comp (ref R2) + (value 10k) + (libsource (lib device) (part R)) + (sheetpath (names /powersupply/) (tstamps /563244F7/)) + (tstamp 56323FAE)) + (comp (ref R3) + (value 10k) + (libsource (lib device) (part R)) + (sheetpath (names /powersupply/) (tstamps /563244F7/)) + (tstamp 56324015)) + (comp (ref C3) + (value 10u) + (libsource (lib device) (part C)) + (sheetpath (names /powersupply/) (tstamps /563244F7/)) + (tstamp 56324973)) + (comp (ref U1) + (value LD1117S12CTR) + (footprint TO_SOT_Packages_SMD:SOT-223) + (libsource (lib regul) (part LD1117S12CTR)) + (sheetpath (names /powersupply/) (tstamps /563244F7/)) + (tstamp 5632574B)) + (comp (ref C2) + (value 10u) + (libsource (lib device) (part C)) + (sheetpath (names /powersupply/) (tstamps /563244F7/)) + (tstamp 56325A6A)) + (comp (ref C5) + (value 100n) + (libsource (lib device) (part C)) + (sheetpath (names /powersupply/) (tstamps /563244F7/)) + (tstamp 56325A82)) + (comp (ref L2) + (value INDUCTOR) + (libsource (lib device) (part INDUCTOR)) + (sheetpath (names /powersupply/) (tstamps /563244F7/)) + (tstamp 56325A95)) + (comp (ref C9) + (value 10u) + (libsource (lib device) (part C)) + (sheetpath (names /powersupply/) (tstamps /563244F7/)) + (tstamp 56326B84)) + (comp (ref C11) + (value 1u) + (libsource (lib device) (part C)) + (sheetpath (names /powersupply/) (tstamps /563244F7/)) + (tstamp 56326C38)) + (comp (ref C13) + (value 100n) + (libsource (lib device) (part C)) + (sheetpath (names /powersupply/) (tstamps /563244F7/)) + (tstamp 56326CB4)) + (comp (ref C15) + (value 100n) + (libsource (lib device) (part C)) + (sheetpath (names /powersupply/) (tstamps /563244F7/)) + (tstamp 56326D36)) + (comp (ref C17) + (value 100n) + (libsource (lib device) (part C)) + (sheetpath (names /powersupply/) (tstamps /563244F7/)) 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+ (libsource (lib device) (part INDUCTOR)) + (sheetpath (names /powersupply/) (tstamps /563244F7/)) + (tstamp 56331D46)) + (comp (ref C7) + (value 100n) + (libsource (lib device) (part C)) + (sheetpath (names /powersupply/) (tstamps /563244F7/)) + (tstamp 563362A8)) + (comp (ref U5) + (value MCP73833) + (libsource (lib pmic) (part MCP73833)) + (sheetpath (names /powersupply/) (tstamps /563244F7/)) + (tstamp 56C1D285)) + (comp (ref P2) + (value BAT) + (fields + (field (name TODO) "TODO: Verify pinout")) + (libsource (lib conn) (part CONN_01X03)) + (sheetpath (names /powersupply/) (tstamps /563244F7/)) + (tstamp 56C22F77)) + (comp (ref R8) + (value 2.2k) + (libsource (lib device) (part R)) + (sheetpath (names /powersupply/) (tstamps /563244F7/)) + (tstamp 56C24FD6)) + (comp (ref Q3) + (value 3.3LogicLv-2A) + (libsource (lib device) (part Q_PMOS_DGS)) + (sheetpath (names /powersupply/) (tstamps /563244F7/)) + (tstamp 56C2F230)) + (comp (ref R10) + (value 10k) + (libsource (lib device) (part R)) + (sheetpath (names /powersupply/) (tstamps /563244F7/)) + (tstamp 56C2F66F)) + (comp (ref D3) + (value Schottky) + (libsource (lib device) (part D_Schottky_Small)) + (sheetpath (names /powersupply/) (tstamps /563244F7/)) + (tstamp 56C35CB0)) + (comp (ref R4) + (value 10k) + (libsource (lib device) (part R)) + (sheetpath (names /powersupply/) (tstamps /563244F7/)) + (tstamp 56C403C0)) + (comp (ref R9) + (value 10k) + (libsource (lib device) (part R)) + (sheetpath (names /powersupply/) (tstamps /563244F7/)) + (tstamp 56C4F34C)) + (comp (ref R12) + (value 500) + (libsource (lib device) (part R)) + (sheetpath (names /powersupply/) (tstamps /563244F7/)) + (tstamp 56C590A7)) + (comp (ref R11) + (value 10k) + (libsource (lib device) (part R)) + (sheetpath (names /powersupply/) (tstamps /563244F7/)) + (tstamp 56C592CD)) + (comp (ref R5) + (value 10k) + (libsource (lib device) (part R)) + (sheetpath (names /powersupply/) (tstamps /563244F7/)) + (tstamp 56C1FB0E)) + (comp (ref R6) + (value 10k) + (libsource (lib device) (part R)) + (sheetpath (names /powersupply/) (tstamps /563244F7/)) + (tstamp 56C20160)) + (comp (ref D2) + (value 3.3V) + (libsource (lib device) (part ZENERsmall)) + (sheetpath (names /powersupply/) (tstamps /563244F7/)) + (tstamp 56C21EC8)) + (comp (ref R7) + (value 10k) + (libsource (lib device) (part R)) + (sheetpath (names /powersupply/) (tstamps /563244F7/)) + (tstamp 56C292A1)) + (comp (ref U2) + (value LM2596/33) + (libsource (lib regulators) (part LM2596)) + (sheetpath (names /powersupply/) (tstamps /563244F7/)) + (tstamp 56C35664)) + (comp (ref D1) + (value Schottky) + (libsource (lib device) (part D_Schottky_Small)) + (sheetpath (names /powersupply/) (tstamps /563244F7/)) + (tstamp 56C2CCFA)) + (comp (ref L1) + (value 15u) + (libsource (lib device) (part INDUCTOR)) + (sheetpath (names /powersupply/) (tstamps /563244F7/)) + (tstamp 56C2DF1B)) + (comp (ref C6) + (value 220u) + (libsource (lib device) (part CP)) + (sheetpath (names /powersupply/) (tstamps /563244F7/)) + (tstamp 56C2E260)) + (comp (ref C1) + (value 220u) + (libsource (lib device) (part CP)) + (sheetpath (names /powersupply/) (tstamps /563244F7/)) + (tstamp 56C2EA4B)) + (comp (ref Q1) + (value 3.3LogicLv-2A) + (datasheet http://www.digikey.com/product-search/en/discrete-semiconductor-products/fets-single/1376381) + (libsource (lib device) (part Q_PMOS_DGS)) + (sheetpath (names /powersupply/) (tstamps /563244F7/)) + (tstamp 56C35C12)) + (comp (ref R1) + (value 10k) + (libsource (lib device) (part R)) + (sheetpath (names /powersupply/) (tstamps /563244F7/)) + (tstamp 56C37B0F)) + (comp (ref Q2) + (value NMOS-LPLL) + (libsource (lib device) (part Q_NMOS_DGS)) + (sheetpath (names /powersupply/) (tstamps /563244F7/)) + (tstamp 56C543A2)) + (comp (ref Q4) + (value NMOS-LPLL) + (libsource (lib device) (part Q_NMOS_DGS)) + (sheetpath (names /powersupply/) (tstamps /563244F7/)) + (tstamp 56C56373)) + (comp (ref U4) + (value STM32F407VGT) + (footprint Housings_QFP:LQFP-100_14x14mm_Pitch0.5mm) + (libsource (lib stm32f4) (part STM32F407VGT)) + (sheetpath (names /powersupply/) (tstamps /563244F7/)) + (tstamp 56C476C3)) + (comp (ref C26) + (value 2.2u) + (libsource (lib device) (part C)) + (sheetpath (names /powersupply/) (tstamps /563244F7/)) + (tstamp 56C5C319)) + (comp (ref C25) + (value 2.2u) + (libsource (lib device) (part C)) + (sheetpath (names /powersupply/) (tstamps /563244F7/)) + (tstamp 56C5D114)) + (comp (ref C4) + (value 10u) + (libsource (lib device) (part CP)) + (sheetpath (names /powersupply/) (tstamps /563244F7/)) + (tstamp 56C62D98)) + (comp (ref P3) + (value Lattice-JTAG) + (libsource (lib lattice) (part Lattice-JTAG)) + (sheetpath (names /debug/) (tstamps /56337D98/)) + (tstamp 56338EF4)) + (comp (ref C24) + (value 10n) + (libsource (lib device) (part C)) + (sheetpath (names /debug/) (tstamps /56337D98/)) + (tstamp 56339277)) + (comp (ref C28) + (value 100n) + (libsource (lib device) (part C)) + (sheetpath (names /FSMC/) (tstamps /56C43C85/)) + (tstamp 56C675D2)) + (comp (ref C29) + (value 100n) + (libsource (lib device) (part C)) + (sheetpath (names /FSMC/) (tstamps /56C43C85/)) + (tstamp 56C676A2)) + (comp (ref C27) + (value 100n) + (libsource (lib device) (part C)) + (sheetpath (names /FSMC/) (tstamps /56C43C85/)) + (tstamp 56C67EC9))) + (libparts + (libpart (lib device) (part C) + (description "Unpolarized capacitor") + (footprints + (fp C?) + (fp C_????_*) + (fp C_????) + (fp SMD*_c) + (fp Capacitor*)) + (fields + (field (name Reference) C) + (field (name Value) C)) + (pins + (pin (num 1) (name ~) (type passive)) + (pin (num 2) (name ~) (type passive)))) + (libpart (lib conn) (part CONN_01X03) + (description "Connector 01x03") + (footprints + (fp Pin_Header_Straight_1X03) + (fp Pin_Header_Angled_1X03) + (fp Socket_Strip_Straight_1X03) + (fp Socket_Strip_Angled_1X03)) + (fields + (field (name Reference) P) + (field (name Value) CONN_01X03)) + (pins + (pin (num 1) (name P1) (type passive)) + (pin (num 2) (name P2) (type passive)) + (pin (num 3) (name P3) (type passive)))) + (libpart (lib device) (part CP) + (description "Polarised capacitor") + (footprints + (fp CP*) + (fp Elko*) + (fp TantalC*) + (fp C*elec) + (fp c_elec*) + (fp SMD*_Pol)) + (fields + (field (name Reference) C) + (field (name Value) CP)) + (pins + (pin (num 1) (name ~) (type passive)) + (pin (num 2) (name ~) (type passive)))) + (libpart (lib device) (part D_Schottky_Small) + (description "Diode Schottky") + (footprints + (fp Diode_*) + (fp D-Pak_TO252AA) + (fp *SingleDiode) + (fp *SingleDiode*) + (fp *_Diode_*)) + (fields + (field (name Reference) D) + (field (name Value) D_Schottky_Small)) + (pins + (pin (num 1) (name K) (type passive)) + (pin (num 2) (name A) (type passive)))) + (libpart (lib device) (part INDUCTOR) + (fields + (field (name Reference) L) + (field (name Value) INDUCTOR)) + (pins + (pin (num 1) (name 1) (type passive)) + (pin (num 2) (name 2) (type passive)))) + (libpart (lib regul) (part LD1117S33TR) + (aliases + (alias LD1117S33CTR) + (alias LD1117S12TR) + (alias LD1117S12CTR) + (alias LD1117S18TR) + (alias LD1117S18CTR) + (alias LD1117S25TR) + (alias LD1117S25CTR) + (alias LD1117S50TR) + (alias LD1117S50CTR)) + (description "800mA Fixed Low Drop Positive Voltage Regulator, Fixed Output 3.3V, SOT223") + (docs http://www.st.com/st-web-ui/static/active/en/resource/technical/document/datasheet/CD00000544.pdf) + (footprints + (fp SOT223)) + (fields + (field (name Reference) U) + (field (name Value) LD1117S33TR) + (field (name Footprint) SOT-223)) + (pins + (pin (num 1) (name GND) (type power_in)) + (pin (num 2) (name VO) (type power_out)) + (pin (num 3) (name VI) (type power_in)))) + (libpart (lib lattice) (part LFXP2-5E-6TN144C) + (description "Lattice XP2-5E FPGA (TQFP144, Speedgrade -6)") + (docs http://www.latticesemi.com/en/Products/FPGAandCPLD/LatticeXP2.aspx) + (footprints + (fp TQFP-144)) + (fields + (field (name Reference) U) + (field (name Value) LFXP2-5E-6TN144C) + (field (name Datasheet) http://www.latticesemi.com/~/media/LatticeSemi/Documents/DataSheets/LatticeXP2/LatticeXP2FamilyDataSheet.pdf) + (field (name Version) 1.0) + (field (name Author) "Makise Kurisu ")) + (pins + (pin (num 1) (name PL2A) (type BiDi)) + (pin (num 2) (name PL2B) (type BiDi)) + (pin (num 3) (name GNDIO72) (type power_in)) + (pin (num 4) (name VCCIO72) (type power_in)) + (pin (num 5) (name PL5A) (type BiDi)) + (pin (num 6) (name PL5B) (type BiDi)) + (pin (num 7) (name PL6A) (type BiDi)) + (pin (num 8) (name PL6B) (type BiDi)) + (pin (num 9) (name PL7A) (type BiDi)) + (pin (num 10) (name PL7B) (type BiDi)) + (pin (num 11) (name PL8A) (type BiDi)) + (pin (num 12) (name GNDIO71) (type power_in)) + (pin (num 13) (name PL8B) (type BiDi)) + (pin (num 14) (name VCCIO71) (type power_in)) + (pin (num 15) (name PL9A) (type BiDi)) + (pin (num 16) (name PL10A) (type BiDi)) + (pin (num 17) (name PL9B) (type BiDi)) + (pin (num 18) (name PL10B) (type BiDi)) + (pin (num 19) (name PL11A) (type BiDi)) + (pin (num 20) (name PL11B) (type BiDi)) + (pin (num 21) (name PL12A) (type BiDi)) + (pin (num 22) (name PL12B) (type BiDi)) + (pin (num 23) (name VCCAUX1) (type power_in)) + (pin (num 24) (name VCC1) (type power_in)) + (pin (num 25) (name TOE) (type input)) + (pin (num 26) (name CFG0) (type input)) + (pin (num 27) (name PL15A) (type BiDi)) + (pin (num 28) (name PL14A) (type BiDi)) + (pin (num 29) (name PL15B) (type BiDi)) + (pin (num 30) (name PL14B) (type BiDi)) + (pin (num 31) (name PL16B) (type BiDi)) + (pin (num 32) (name PL16A) (type BiDi)) + (pin (num 33) (name VCCIO6) (type power_in)) + (pin (num 34) (name GNDIO6) (type power_in)) + (pin (num 35) (name PL25A) (type BiDi)) + (pin (num 36) (name PL25B) (type BiDi)) + (pin (num 37) (name PB8A) (type BiDi)) + (pin (num 38) (name PB7A) (type BiDi)) + (pin (num 39) (name PB8B) (type BiDi)) + (pin (num 40) (name PB7B) (type BiDi)) + (pin (num 41) (name GNDIO51) (type power_in)) + (pin (num 42) (name VCCIO51) (type power_in)) + (pin (num 43) (name PB13B) (type input)) + (pin (num 44) (name PB13A) (type input)) + (pin (num 45) (name PB15A) (type input)) + (pin (num 46) (name PB14A) (type input)) + (pin (num 47) (name PB15B) (type input)) + (pin (num 48) (name PB14B) (type input)) + (pin (num 49) (name VCCIO52) (type power_in)) + (pin (num 50) (name PB16A) (type input)) + (pin (num 51) (name GNDIO52) (type power_in)) + (pin (num 52) (name PB16B) (type input)) + (pin (num 53) (name PB17A) (type input)) + (pin (num 54) (name PB17B) (type input)) + (pin (num 55) (name PB18A) (type input)) + (pin (num 56) (name PB19A) (type input)) + (pin (num 57) (name PB18B) (type input)) + (pin (num 58) (name PB19B) (type input)) + (pin (num 59) (name VCC2) (type power_in)) + (pin (num 60) (name VCCAUX2) (type power_in)) + (pin (num 61) (name PB20A) (type BiDi)) + (pin (num 62) (name PB20B) (type BiDi)) + (pin (num 63) (name VCCIO4) (type power_in)) + (pin (num 64) (name GNDIO4) (type power_in)) + (pin (num 65) (name PB26A) (type BiDi)) + (pin (num 66) (name PB26B) (type BiDi)) + (pin (num 67) (name LRC_VCCPLL) (type power_in)) + (pin (num 68) (name LRC_GNDPLL) (type power_in)) + (pin (num 69) (name PB27A) (type BiDi)) + (pin (num 70) (name PB28A) (type BiDi)) + (pin (num 71) (name PB27B) (type BiDi)) + (pin (num 72) (name PB28B) (type BiDi)) + (pin (num 73) (name PR24A) (type BiDi)) + (pin (num 74) (name PR24B) (type BiDi)) + (pin (num 75) (name GNDIO3) (type power_in)) + (pin (num 76) (name VCCIO3) (type power_in)) + (pin (num 77) (name PR14B) (type BiDi)) + (pin (num 78) (name PR14A) (type BiDi)) + (pin (num 79) (name TMS) (type input)) + (pin (num 80) (name TDI) (type input)) + (pin (num 81) (name TCK) (type input)) + (pin (num 82) (name TDO) (type output)) + (pin (num 83) (name VCCJ) (type power_in)) + (pin (num 84) (name VCC3) (type power_in)) + (pin (num 85) (name VCCAUX3) (type power_in)) + (pin (num 86) (name GND) (type power_in)) + (pin (num 87) (name PR12B) (type BiDi)) + (pin (num 88) (name PR12A) (type BiDi)) + (pin (num 89) (name PR11B) (type BiDi)) + (pin (num 90) (name PR11A) (type BiDi)) + (pin (num 91) (name PR10B) (type BiDi)) + (pin (num 92) (name PR9B) (type BiDi)) + (pin (num 93) (name PR10A) (type BiDi)) + (pin (num 94) (name PR9A) (type BiDi)) + (pin (num 95) (name VCCIO21) (type power_in)) + (pin (num 96) (name PR8B) (type BiDi)) + (pin (num 97) (name GNDIO21) (type power_in)) + (pin (num 98) (name PR8A) (type BiDi)) + (pin (num 99) (name PR7B) (type BiDi)) + (pin (num 100) (name PR6B) (type BiDi)) + (pin (num 101) (name PR7A) (type BiDi)) + (pin (num 102) (name PR6A) (type BiDi)) + (pin (num 103) (name PR5B) (type BiDi)) + (pin (num 104) (name PR5A) (type BiDi)) + (pin (num 105) (name VCCIO22) (type power_in)) + (pin (num 106) (name GNDIO22) (type power_in)) + (pin (num 107) (name PR2B) (type BiDi)) + (pin (num 108) (name PR2A) (type BiDi)) + (pin (num 109) (name PT28B) (type BiDi)) + (pin (num 110) (name PT28A) (type BiDi)) + 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(name /FSMC/A19) + (node (ref U3) (pin 144)) + (node (ref U4) (pin 2))) + (net (code 69) (name /FSMC/DA7) + (node (ref U4) (pin 41)) + (node (ref U3) (pin 133))) + (net (code 70) (name /FSMC/A17) + (node (ref U3) (pin 142)) + (node (ref U4) (pin 59))) + (net (code 71) (name /FSMC/A16) + (node (ref U4) (pin 58)) + (node (ref U3) (pin 141))) + (net (code 72) (name /FSMC/DA4) + (node (ref U4) (pin 38)) + (node (ref U3) (pin 138))) + (net (code 73) (name /FSMC/DA5) + (node (ref U4) (pin 39)) + (node (ref U3) (pin 137))) + (net (code 74) (name /FSMC/DA6) + (node (ref U3) (pin 134)) + (node (ref U4) (pin 40))) + (net (code 75) (name /FSMC/E1_N) + (node (ref U3) (pin 110)) + (node (ref U4) (pin 88))) + (net (code 76) (name /FSMC/ADV_N) + (node (ref U4) (pin 93)) + (node (ref U3) (pin 109))) + (net (code 77) (name /FSMC/WAIT_N) + (node (ref U3) (pin 113)) + (node (ref U4) (pin 87))) + (net (code 78) (name /FSMC/WE_N) + (node (ref U4) (pin 86)) + (node (ref U3) (pin 114))) + (net (code 79) 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(net (code 122) (name "Net-(U3-Pad42)") + (node (ref U3) (pin 42))) + (net (code 123) (name "Net-(U3-Pad51)") + (node (ref U3) (pin 51))) + (net (code 124) (name "Net-(U3-Pad41)") + (node (ref U3) (pin 41))) + (net (code 125) (name "Net-(U3-Pad64)") + (node (ref U3) (pin 64))) + (net (code 126) (name "Net-(U3-Pad106)") + (node (ref U3) (pin 106))) + (net (code 127) (name "Net-(U3-Pad105)") + (node (ref U3) (pin 105))) + (net (code 128) (name "Net-(U3-Pad49)") + (node (ref U3) (pin 49))) + (net (code 129) (name /FSMC/B6) + (node (ref U3) (pin 29)) + (node (ref U3) (pin 28)) + (node (ref U3) (pin 27)) + (node (ref U3) (pin 36)) + (node (ref U3) (pin 35)) + (node (ref U3) (pin 32)) + (node (ref U3) (pin 31)) + (node (ref U3) (pin 30))) + (net (code 130) (name "Net-(U3-Pad4)") + (node (ref U3) (pin 4))) + (net (code 131) (name "Net-(U3-Pad3)") + (node (ref U3) (pin 3))) + (net (code 132) (name /FSMC/B4) + (node (ref U3) (pin 61)) + (node (ref U3) (pin 65)) + (node (ref U3) (pin 69)) + (node (ref U3) (pin 71)) + (node (ref U3) (pin 66)) + (node (ref U3) (pin 70)) + (node (ref U3) (pin 72)) + (node (ref U3) (pin 62))) + (net (code 133) (name /FSMC/B5) + (node (ref U3) (pin 50)) + (node (ref U3) (pin 45)) + (node (ref U3) (pin 55)) + (node (ref U3) (pin 46)) + (node (ref U3) (pin 56)) + (node (ref U3) (pin 37)) + (node (ref U3) (pin 47)) + (node (ref U3) (pin 57)) + (node (ref U3) (pin 38)) + (node (ref U3) (pin 58)) + (node (ref U3) (pin 39)) + (node (ref U3) (pin 40)) + (node (ref U3) (pin 48)) + (node (ref U3) (pin 54)) + (node (ref U3) (pin 44)) + (node (ref U3) (pin 53)) + (node (ref U3) (pin 43)) + (node (ref U3) (pin 52))) + (net (code 134) (name "Net-(U4-Pad94)") + (node (ref U4) (pin 94))) + (net (code 135) (name "Net-(U4-Pad14)") + (node (ref U4) (pin 14))) + (net (code 136) (name "Net-(U4-Pad13)") + (node (ref U4) (pin 13))) + (net (code 137) (name "Net-(U4-Pad12)") + (node (ref U4) (pin 12))) + (net (code 138) (name "Net-(U4-Pad79)") + (node (ref U4) (pin 79))) + (net (code 139) (name "Net-(U4-Pad78)") + (node (ref U4) (pin 78))) + (net (code 140) (name "Net-(U4-Pad18)") + (node (ref U4) (pin 18))) + (net (code 141) (name "Net-(U3-Pad97)") + (node (ref U3) (pin 97))) + (net (code 142) (name "Net-(U3-Pad76)") + (node (ref U3) (pin 76))) + (net (code 143) (name "Net-(U3-Pad95)") + (node (ref U3) (pin 95))) + (net (code 144) (name "Net-(U3-Pad75)") + (node (ref U3) (pin 75))) + (net (code 145) (name /FSMC/B3) + (node (ref U3) (pin 77)) + (node (ref U3) (pin 78)) + (node (ref U3) (pin 74)) + (node (ref U3) (pin 73))) + (net (code 146) (name /FSMC/B7) + (node (ref U3) (pin 19)) + (node (ref U3) (pin 17)) + (node (ref U3) (pin 18)) + (node (ref U3) (pin 16)) + (node (ref U3) (pin 15)) + (node (ref U3) (pin 13)) + (node (ref U3) (pin 11)) + (node (ref U3) (pin 20)) + (node (ref U3) (pin 10)) + (node (ref U3) (pin 9)) + (node (ref U3) (pin 8)) + (node (ref U3) (pin 7)) + (node (ref U3) (pin 6)) + (node (ref U3) (pin 5)) + (node (ref U3) (pin 2)) + (node (ref U3) (pin 1)) + (node (ref U3) (pin 21)) + (node (ref U3) (pin 22))) + (net (code 147) (name /FSMC/B2) + (node (ref U3) (pin 93)) + (node (ref U3) (pin 94)) + (node (ref U3) (pin 91)) + (node (ref U3) (pin 90)) + (node (ref U3) (pin 92)) + (node (ref U3) (pin 88)) + (node (ref U3) (pin 87)) + (node (ref U3) (pin 96)) + (node (ref U3) (pin 108)) + (node (ref U3) (pin 107)) + (node (ref U3) (pin 104)) + (node (ref U3) (pin 103)) + (node (ref U3) (pin 102)) + (node (ref U3) (pin 101)) + (node (ref U3) (pin 100)) + (node (ref U3) (pin 99)) + (node (ref U3) (pin 89)) + (node (ref U3) (pin 98))))) \ No newline at end of file diff --git a/power.sch b/power.sch index 6d35b78..17bea0b 100644 --- a/power.sch +++ b/power.sch @@ -173,17 +173,6 @@ F 3 "" H 900 3900 60 0000 C CNN 1 0 0 -1 $EndComp $Comp -L C C4 -U 1 1 56325A70 -P 1900 3900 -F 0 "C4" H 1925 4000 50 0000 L CNN -F 1 "22u" H 1925 3800 50 0000 L CNN -F 2 "" H 1938 3750 30 0001 C CNN -F 3 "" H 1900 3900 60 0000 C CNN - 1 1900 3900 - 1 0 0 -1 -$EndComp -$Comp L GNDD #PWR10 U 1 1 56325A76 P 1450 4150 @@ -415,17 +404,6 @@ F 3 "" H 4200 1550 60 0000 C CNN 1 0 0 -1 $EndComp $Comp -L +3V3 #PWR21 -U 1 1 563275AE -P 4200 1050 -F 0 "#PWR21" H 4200 900 50 0001 C CNN -F 1 "+3V3" H 4200 1190 50 0000 C CNN -F 2 "" H 4200 1050 60 0000 C CNN -F 3 "" H 4200 1050 60 0000 C CNN - 1 4200 1050 - 1 0 0 -1 -$EndComp -$Comp L C C22 U 1 1 563277BE P 5200 1300 @@ -527,10 +505,10 @@ F 3 "" H 3400 5350 60 0000 C CNN 1 0 0 -1 $EndComp $Comp -L MCP73833 U4 +L MCP73833 U5 U 1 1 56C1D285 P 8150 1300 -F 0 "U4" H 8150 1787 60 0000 C CNN +F 0 "U5" H 8150 1787 60 0000 C CNN F 1 "MCP73833" H 8150 1681 60 0000 C CNN F 2 "" H 7850 1250 60 0001 C CNN F 3 "" H 7850 1250 60 0000 C CNN @@ -549,10 +527,10 @@ F 3 "" H 3650 5000 50 0000 C CNN 1 0 0 -1 $EndComp $Comp -L VBAT #PWR32 +L VBAT #PWR35 U 1 1 56C1ED5D P 8700 950 -F 0 "#PWR32" H 8700 800 50 0001 C CNN +F 0 "#PWR35" H 8700 800 50 0001 C CNN F 1 "VBAT" H 8700 1090 50 0000 C CNN F 2 "" H 8700 950 50 0000 C CNN F 3 "" H 8700 950 50 0000 C CNN @@ -560,10 +538,10 @@ F 3 "" H 8700 950 50 0000 C CNN 1 0 0 -1 $EndComp $Comp -L VUSB #PWR30 +L VUSB #PWR32 U 1 1 56C1F811 P 7600 950 -F 0 "#PWR30" H 7600 800 50 0001 C CNN +F 0 "#PWR32" H 7600 800 50 0001 C CNN F 1 "VUSB" H 7600 1090 50 0000 C CNN F 2 "" H 7600 950 50 0000 C CNN F 3 "" H 7600 950 50 0000 C CNN @@ -587,10 +565,10 @@ F 4 "TODO: Verify pinout" H 10227 1350 60 0000 L CNN "TODO" 1 0 0 -1 $EndComp $Comp -L VBAT #PWR42 +L VBAT #PWR45 U 1 1 56C23113 P 9900 950 -F 0 "#PWR42" H 9900 800 50 0001 C CNN +F 0 "#PWR45" H 9900 800 50 0001 C CNN F 1 "VBAT" H 9900 1090 50 0000 C CNN F 2 "" H 9900 950 50 0000 C CNN F 3 "" H 9900 950 50 0000 C CNN @@ -598,10 +576,10 @@ F 3 "" H 9900 950 50 0000 C CNN 1 0 0 -1 $EndComp $Comp -L GNDD #PWR31 +L GNDD #PWR33 U 1 1 56C23816 P 7600 2150 -F 0 "#PWR31" H 7600 1900 50 0001 C CNN +F 0 "#PWR33" H 7600 1900 50 0001 C CNN F 1 "GNDD" H 7600 2000 50 0000 C CNN F 2 "" H 7600 2150 60 0000 C CNN F 3 "" H 7600 2150 60 0000 C CNN @@ -609,10 +587,10 @@ F 3 "" H 7600 2150 60 0000 C CNN 1 0 0 -1 $EndComp $Comp -L GNDD #PWR43 +L GNDD #PWR46 U 1 1 56C23E07 P 9900 2150 -F 0 "#PWR43" H 9900 1900 50 0001 C CNN +F 0 "#PWR46" H 9900 1900 50 0001 C CNN F 1 "GNDD" H 9900 2000 50 0000 C CNN F 2 "" H 9900 2150 60 0000 C CNN F 3 "" H 9900 2150 60 0000 C CNN @@ -631,10 +609,10 @@ F 3 "" H 8700 1900 30 0000 C CNN 1 0 0 -1 $EndComp $Comp -L GNDD #PWR33 +L GNDD #PWR36 U 1 1 56C253CE P 8700 2150 -F 0 "#PWR33" H 8700 1900 50 0001 C CNN +F 0 "#PWR36" H 8700 1900 50 0001 C CNN F 1 "GNDD" H 8700 2000 50 0000 C CNN F 2 "" H 8700 2150 60 0000 C CNN F 3 "" H 8700 2150 60 0000 C CNN @@ -642,10 +620,10 @@ F 3 "" H 8700 2150 60 0000 C CNN 1 0 0 -1 $EndComp $Comp -L VUSB #PWR36 +L VUSB #PWR39 U 1 1 56C2BB98 P 9000 2850 -F 0 "#PWR36" H 9000 2700 50 0001 C CNN +F 0 "#PWR39" H 9000 2700 50 0001 C CNN F 1 "VUSB" H 9000 2990 50 0000 C CNN F 2 "" H 9000 2850 50 0000 C CNN F 3 "" H 9000 2850 50 0000 C CNN @@ -653,10 +631,10 @@ F 3 "" H 9000 2850 50 0000 C CNN 1 0 0 -1 $EndComp $Comp -L VBAT #PWR34 +L VBAT #PWR37 U 1 1 56C2D4CD P 8800 2850 -F 0 "#PWR34" H 8800 2700 50 0001 C CNN +F 0 "#PWR37" H 8800 2700 50 0001 C CNN F 1 "VBAT" H 8800 2990 50 0000 C CNN F 2 "" H 8800 2850 50 0000 C CNN F 3 "" H 8800 2850 50 0000 C CNN @@ -686,10 +664,10 @@ F 3 "" H 9300 3850 30 0000 C CNN 1 0 0 -1 $EndComp $Comp -L GNDD #PWR39 +L GNDD #PWR42 U 1 1 56C307A1 P 9300 4050 -F 0 "#PWR39" H 9300 3800 50 0001 C CNN +F 0 "#PWR42" H 9300 3800 50 0001 C CNN F 1 "GNDD" H 9300 3900 50 0000 C CNN F 2 "" H 9300 4050 60 0000 C CNN F 3 "" H 9300 4050 60 0000 C CNN @@ -719,10 +697,10 @@ F 3 "" H 1000 1100 50 0000 C CNN 1 0 0 -1 $EndComp $Comp -L VSYS #PWR41 +L VSYS #PWR44 U 1 1 56C39AFF P 9750 2850 -F 0 "#PWR41" H 9750 2700 50 0001 C CNN +F 0 "#PWR44" H 9750 2700 50 0001 C CNN F 1 "VSYS" H 9750 2990 50 0000 C CNN F 2 "" H 9750 2850 50 0000 C CNN F 3 "" H 9750 2850 50 0000 C CNN @@ -741,21 +719,10 @@ F 3 "" H 7350 1150 30 0000 C CNN 1 0 0 -1 $EndComp $Comp -L +3V3 #PWR27 -U 1 1 56C41958 -P 7350 950 -F 0 "#PWR27" H 7350 800 50 0001 C CNN -F 1 "+3V3" H 7350 1090 50 0000 C CNN -F 2 "" H 7350 950 60 0000 C CNN -F 3 "" H 7350 950 60 0000 C CNN - 1 7350 950 - 1 0 0 -1 -$EndComp -$Comp -L GNDD #PWR35 +L GNDD #PWR38 U 1 1 56C4E595 P 8950 2150 -F 0 "#PWR35" H 8950 1900 50 0001 C CNN +F 0 "#PWR38" H 8950 1900 50 0001 C CNN F 1 "GNDD" H 8950 2000 50 0000 C CNN F 2 "" H 8950 2150 60 0000 C CNN F 3 "" H 8950 2150 60 0000 C CNN @@ -763,10 +730,10 @@ F 3 "" H 8950 2150 60 0000 C CNN 1 0 0 -1 $EndComp $Comp -L VUSB #PWR37 +L VUSB #PWR40 U 1 1 56C4F548 P 9300 950 -F 0 "#PWR37" H 9300 800 50 0001 C CNN +F 0 "#PWR40" H 9300 800 50 0001 C CNN F 1 "VUSB" H 9300 1090 50 0000 C CNN F 2 "" H 9300 950 50 0000 C CNN F 3 "" H 9300 950 50 0000 C CNN @@ -774,10 +741,10 @@ F 3 "" H 9300 950 50 0000 C CNN 1 0 0 -1 $EndComp $Comp -L GNDD #PWR38 +L GNDD #PWR41 U 1 1 56C4FA15 P 9300 2150 -F 0 "#PWR38" H 9300 1900 50 0001 C CNN +F 0 "#PWR41" H 9300 1900 50 0001 C CNN F 1 "GNDD" H 9300 2000 50 0000 C CNN F 2 "" H 9300 2150 60 0000 C CNN F 3 "" H 9300 2150 60 0000 C CNN @@ -818,10 +785,10 @@ F 3 "" H 9650 1950 30 0000 C CNN -1 0 0 1 $EndComp $Comp -L GNDD #PWR40 +L GNDD #PWR43 U 1 1 56C59A2E P 9650 2150 -F 0 "#PWR40" H 9650 1900 50 0001 C CNN +F 0 "#PWR43" H 9650 1900 50 0001 C CNN F 1 "GNDD" H 9650 2000 50 0000 C CNN F 2 "" H 9650 2150 60 0000 C CNN F 3 "" H 9650 2150 60 0000 C CNN @@ -853,10 +820,10 @@ F 3 "" H 7400 3500 30 0000 C CNN 1 0 0 -1 $EndComp $Comp -L VSYS #PWR28 +L VSYS #PWR30 U 1 1 56C208D6 P 7400 2900 -F 0 "#PWR28" H 7400 2750 50 0001 C CNN +F 0 "#PWR30" H 7400 2750 50 0001 C CNN F 1 "VSYS" H 7400 3040 50 0000 C CNN F 2 "" H 7400 2900 50 0000 C CNN F 3 "" H 7400 2900 50 0000 C CNN @@ -864,10 +831,10 @@ F 3 "" H 7400 2900 50 0000 C CNN 1 0 0 -1 $EndComp $Comp -L GNDD #PWR29 +L GNDD #PWR31 U 1 1 56C20CEB P 7400 3750 -F 0 "#PWR29" H 7400 3500 50 0001 C CNN +F 0 "#PWR31" H 7400 3500 50 0001 C CNN F 1 "GNDD" H 7400 3600 50 0000 C CNN F 2 "" H 7400 3750 60 0000 C CNN F 3 "" H 7400 3750 60 0000 C CNN @@ -1109,6 +1076,29 @@ F 3 "" H 9400 1750 50 0000 C CNN 1 9400 1750 -1 0 0 -1 $EndComp +$Comp +L STM32F407VGT U4 +U 1 1 56C476C3 +P 7250 4650 +F 0 "U4" H 7500 4837 60 0000 C CNN +F 1 "STM32F407VGT" H 7500 4731 60 0000 C CNN +F 2 "Housings_QFP:LQFP-100_14x14mm_Pitch0.5mm" H 6750 5150 60 0001 C CNN +F 3 "" H 6750 5150 60 0000 C CNN + 1 7250 4650 + 1 0 0 -1 +$EndComp +NoConn ~ 7650 1450 +$Comp +L GND #PWR34 +U 1 1 56C4E388 +P 7950 6150 +F 0 "#PWR34" H 7950 5900 50 0001 C CNN +F 1 "GND" H 7958 5976 50 0000 C CNN +F 2 "" H 7950 6150 50 0000 C CNN +F 3 "" H 7950 6150 50 0000 C CNN + 1 7950 6150 + 1 0 0 -1 +$EndComp Wire Wire Line 1150 4900 1150 5250 Wire Wire Line @@ -1449,4 +1439,132 @@ Wire Notes Line Connection ~ 9300 1550 Wire Wire Line 9300 1550 9300 1500 +Wire Wire Line + 7000 5250 7050 5250 +Wire Wire Line + 7000 4400 7000 5900 +Wire Wire Line + 7000 4750 7050 4750 +Wire Wire Line + 7050 4850 7000 4850 +Connection ~ 7000 4850 +Wire Wire Line + 7050 4950 7000 4950 +Connection ~ 7000 4950 +Wire Wire Line + 7050 5050 7000 5050 +Connection ~ 7000 5050 +Wire Wire Line + 7050 5150 7000 5150 +Connection ~ 7000 5150 +Wire Wire Line + 7000 5400 7050 5400 +Connection ~ 7000 5250 +Wire Wire Line + 7000 5500 7050 5500 +Connection ~ 7000 5400 +Wire Wire Line + 7950 4750 7950 6150 +Connection ~ 7950 4850 +Connection ~ 7950 4950 +Connection ~ 7950 5050 +Connection ~ 7950 5400 +$Comp +L VSTM33 #PWR21 +U 1 1 56C53DAC +P 4200 1050 +F 0 "#PWR21" H 4200 900 50 0001 C CNN +F 1 "VSTM33" H 4200 1190 50 0000 C CNN +F 2 "" H 4200 1050 50 0000 C CNN +F 3 "" H 4200 1050 50 0000 C CNN + 1 4200 1050 + 1 0 0 -1 +$EndComp +$Comp +L VSTM33 #PWR29 +U 1 1 56C54669 +P 7350 950 +F 0 "#PWR29" H 7350 800 50 0001 C CNN +F 1 "VSTM33" H 7350 1090 50 0000 C CNN +F 2 "" H 7350 950 50 0000 C CNN +F 3 "" H 7350 950 50 0000 C CNN + 1 7350 950 + 1 0 0 -1 +$EndComp +$Comp +L VSTM33 #PWR28 +U 1 1 56C58A5C +P 7000 4400 +F 0 "#PWR28" H 7000 4250 50 0001 C CNN +F 1 "VSTM33" H 7000 4540 50 0000 C CNN +F 2 "" H 7000 4400 50 0000 C CNN +F 3 "" H 7000 4400 50 0000 C CNN + 1 7000 4400 + 1 0 0 -1 +$EndComp +Connection ~ 7000 4750 +Wire Wire Line + 7000 5900 7050 5900 +Connection ~ 7000 5500 +$Comp +L C C26 +U 1 1 56C5C319 +P 6750 5950 +F 0 "C26" H 6775 6050 50 0000 L CNN +F 1 "2.2u" H 6775 5850 50 0000 L CNN +F 2 "" H 6788 5800 30 0001 C CNN +F 3 "" H 6750 5950 60 0000 C CNN + 1 6750 5950 + 1 0 0 -1 +$EndComp +Wire Wire Line + 6750 5800 6750 5750 +Wire Wire Line + 6750 5750 7050 5750 +$Comp +L C C25 +U 1 1 56C5D114 +P 6550 5950 +F 0 "C25" H 6575 6050 50 0000 L CNN +F 1 "2.2u" H 6575 5850 50 0000 L CNN +F 2 "" H 6588 5800 30 0001 C CNN +F 3 "" H 6550 5950 60 0000 C CNN + 1 6550 5950 + 1 0 0 -1 +$EndComp +Wire Wire Line + 6550 5800 6550 5650 +Wire Wire Line + 6550 5650 7050 5650 +Wire Wire Line + 6550 6100 6750 6100 +$Comp +L GND #PWR27 +U 1 1 56C5D446 +P 6650 6150 +F 0 "#PWR27" H 6650 5900 50 0001 C CNN +F 1 "GND" H 6658 5976 50 0000 C CNN +F 2 "" H 6650 6150 50 0000 C CNN +F 3 "" H 6650 6150 50 0000 C CNN + 1 6650 6150 + 1 0 0 -1 +$EndComp +Wire Wire Line + 6650 6150 6650 6100 +Connection ~ 6650 6100 +$Comp +L CP C4 +U 1 1 56C62D98 +P 1900 3900 +F 0 "C4" H 1950 4000 50 0000 L CNN +F 1 "10u" H 1950 3800 50 0000 L CNN +F 2 "" H 1938 3750 50 0001 C CNN +F 3 "" H 1900 3900 50 0000 C CNN + 1 1900 3900 + 1 0 0 -1 +$EndComp +Text Label 6550 5650 0 60 ~ 0 +VCAP1 +Text Label 6750 5750 0 60 ~ 0 +VCAP2 $EndSCHEMATC