EESchema Schematic File Version 2 LIBS:fpgna-rescue LIBS:power LIBS:device LIBS:transistors LIBS:conn LIBS:linear LIBS:regul LIBS:74xx LIBS:cmos4000 LIBS:adc-dac LIBS:memory LIBS:xilinx LIBS:microcontrollers LIBS:dsp LIBS:microchip LIBS:analog_switches LIBS:motorola LIBS:texas LIBS:intel LIBS:audio LIBS:interface LIBS:digital-audio LIBS:philips LIBS:display LIBS:cypress LIBS:siliconi LIBS:opto LIBS:atmel LIBS:contrib LIBS:valves LIBS:Oscillators LIBS:lattice LIBS:pmic LIBS:specific-powersyms LIBS:regulators LIBS:stm32f4 LIBS:itead-displays LIBS:ram LIBS:connectors LIBS:analog LIBS:fpgna-cache EELAYER 25 0 EELAYER END $Descr A4 11693 8268 encoding utf-8 Sheet 1 9 Title "FPGna" Date "" Rev "" Comp "Shimatta" Comment1 "" Comment2 "" Comment3 "" Comment4 "" $EndDescr $Sheet S 1750 2050 1000 1150 U 563244F7 F0 "powersupply" 60 F1 "power.sch" 60 F2 "CHG_ACTIVE_N" O R 2750 2300 60 F3 "USB_PRESENT_N" O R 2750 2600 60 F4 "CHARGE_ENABLE" I R 2750 2400 60 F5 "SYS_VOLTAGE" O R 2750 2200 60 F6 "FPGA_ENABLE_N" I R 2750 2500 60 F7 "BACKLIGHT_EN_N" I L 1750 2850 60 $EndSheet $Sheet S 1750 3400 1000 1100 U 56337D98 F0 "debug" 60 F1 "debug.sch" 60 F2 "JTDI" O R 2750 3750 60 F3 "JTMS" O R 2750 3550 60 F4 "JTDO" I R 2750 4200 60 F5 "JTCK" O R 2750 3650 60 F6 "JRST_N" O R 2750 4300 60 F7 "BOOT1" O R 2750 4400 60 F8 "FRST" O R 2750 4000 60 $EndSheet $Sheet S 5900 3050 2050 2150 U 56C43C85 F0 "FSMC" 60 F1 "FSMC.sch" 60 F2 "BOOT1" I L 5900 4400 60 F3 "JTDO" O L 5900 4200 60 F4 "JRST_N" I L 5900 4300 60 F5 "BL0_N" O R 7950 4300 60 F6 "BL1_N" O R 7950 4400 60 F7 "A[19..23]" O R 7950 4500 60 F8 "SDIO_CMD" O L 5900 3200 60 F9 "T_CS" O R 7950 3300 60 F10 "T_CLK" O R 7950 3200 60 F11 "T_DOUT" I R 7950 3500 60 F12 "T_DIN" O R 7950 3400 60 F13 "BACKLIGHT_EN_N" O L 5900 4700 60 $EndSheet $Sheet S 8100 3050 1750 800 U 56C579FC F0 "display" 60 F1 "display.sch" 60 F2 "T_CLK" I L 8100 3200 60 F3 "T_CS" I L 8100 3300 60 F4 "T_DIN" I L 8100 3400 60 F5 "T_DOUT" O L 8100 3500 60 F6 "T_BUSY" O R 9850 3300 60 F7 "T_IRQ" O R 9850 3200 60 F8 "FRST" I R 9850 3500 60 $EndSheet $Sheet S 8100 4150 1350 800 U 56C6F777 F0 "sdram" 60 F1 "sdram.sch" 60 F2 "A[19..23]" I L 8100 4500 60 F3 "BL0_N" I L 8100 4300 60 F4 "BL1_N" I L 8100 4400 60 F5 "AWS" O R 9450 4250 60 F6 "ABCK" O R 9450 4350 60 F7 "L3MODE" O R 9450 4750 60 F8 "L3DATA" O R 9450 4650 60 F9 "ADATA" O R 9450 4550 60 F10 "ACLK" O R 9450 4450 60 $EndSheet Wire Bus Line 8100 4500 7950 4500 Wire Wire Line 7950 4300 8100 4300 Wire Wire Line 8100 4400 7950 4400 $Sheet S 4350 3050 1400 850 U 56C7DD81 F0 "sdcard" 60 F1 "sdcard.sch" 60 F2 "SDIO_CMD" I R 5750 3200 60 F3 "T_IRQ" I L 4350 3200 60 F4 "T_BUSY" I L 4350 3300 60 F5 "SW_B" I L 4350 3600 60 F6 "SW_A" I L 4350 3500 60 F7 "SW_D" I L 4350 3800 60 F8 "SW_C" I L 4350 3700 60 F9 "SDCARD_DETECT" O L 4350 3400 60 $EndSheet Wire Wire Line 7950 3200 8100 3200 Wire Wire Line 8100 3300 7950 3300 Wire Wire Line 7950 3400 8100 3400 Wire Wire Line 8100 3500 7950 3500 Wire Wire Line 9850 3200 9950 3200 Wire Wire Line 9950 3200 9950 2900 Wire Wire Line 9950 2900 4250 2900 Wire Wire Line 4200 2850 10000 2850 Wire Wire Line 10000 2850 10000 3300 Wire Wire Line 10000 3300 9850 3300 Wire Wire Line 5900 3200 5750 3200 Wire Wire Line 4250 2900 4250 3200 Wire Wire Line 4250 3200 4350 3200 Wire Wire Line 4350 3300 4200 3300 Wire Wire Line 4200 3300 4200 2850 Wire Wire Line 2750 4400 5900 4400 Wire Wire Line 5900 4300 2750 4300 Wire Wire Line 2750 4200 5900 4200 $Sheet S 9600 4150 600 800 U 56CA5D53 F0 "audio" 60 F1 "audio.sch" 60 F2 "ACLK" I L 9600 4450 60 F3 "ABCK" I L 9600 4350 60 F4 "AWS" I L 9600 4250 60 F5 "ADATA" I L 9600 4550 60 F6 "L3MODE" I L 9600 4750 60 F7 "L3DATA" I L 9600 4650 60 $EndSheet Wire Wire Line 9450 4250 9600 4250 Wire Wire Line 9450 4350 9600 4350 Wire Wire Line 9600 4450 9450 4450 Wire Wire Line 9450 4550 9600 4550 Wire Wire Line 9600 4650 9450 4650 Wire Wire Line 9450 4750 9600 4750 $Sheet S 2900 2100 1200 1800 U 56C86141 F0 "userif" 60 F1 "userif.sch" 60 F2 "SW_A" O R 4100 3500 60 F3 "SW_D" O R 4100 3800 60 F4 "SW_B" O R 4100 3600 60 F5 "SW_C" O R 4100 3700 60 F6 "JTMS" I L 2900 3550 60 F7 "JTCK" I L 2900 3650 60 F8 "SYS_VOLTAGE" I L 2900 2200 60 F9 "JTDI" I L 2900 3750 60 F10 "CHG_ACTIVE_N" I L 2900 2300 60 F11 "CHARGE_ENABLE" O L 2900 2400 60 F12 "USB_PRESENT_N" I L 2900 2600 60 F13 "FPGA_ENABLE_N" O L 2900 2500 60 F14 "SDCARD_DETECT" I R 4100 3400 60 $EndSheet Wire Wire Line 2900 2200 2750 2200 Wire Wire Line 2750 2300 2900 2300 Wire Wire Line 2900 2400 2750 2400 Wire Wire Line 2900 2500 2750 2500 Wire Wire Line 2750 2600 2900 2600 Wire Wire Line 4100 3500 4350 3500 Wire Wire Line 4350 3600 4100 3600 Wire Wire Line 4100 3700 4350 3700 Wire Wire Line 4350 3800 4100 3800 Wire Wire Line 2900 3550 2750 3550 Wire Wire Line 2750 3650 2900 3650 Wire Wire Line 2900 3750 2750 3750 Wire Wire Line 4350 3400 4100 3400 Wire Wire Line 5900 4700 1650 4700 Wire Wire Line 1650 4700 1650 2850 Wire Wire Line 1650 2850 1750 2850 Wire Wire Line 9850 3500 10350 3500 Wire Wire Line 10350 3500 10350 5300 Wire Wire Line 10350 5300 2850 5300 Wire Wire Line 2850 5300 2850 4000 Wire Wire Line 2850 4000 2750 4000 $EndSCHEMATC