EESchema Schematic File Version 2 LIBS:fpgna-rescue LIBS:power LIBS:device LIBS:transistors LIBS:conn LIBS:linear LIBS:regul LIBS:74xx LIBS:cmos4000 LIBS:adc-dac LIBS:memory LIBS:xilinx LIBS:microcontrollers LIBS:dsp LIBS:microchip LIBS:analog_switches LIBS:motorola LIBS:texas LIBS:intel LIBS:audio LIBS:interface LIBS:digital-audio LIBS:philips LIBS:display LIBS:cypress LIBS:siliconi LIBS:opto LIBS:atmel LIBS:contrib LIBS:valves LIBS:Oscillators LIBS:lattice LIBS:pmic LIBS:specific-powersyms LIBS:regulators LIBS:stm32f4 LIBS:itead-displays LIBS:ram LIBS:fpgna-cache EELAYER 25 0 EELAYER END $Descr A4 11693 8268 encoding utf-8 Sheet 1 6 Title "FPGna" Date "" Rev "" Comp "Shimatta" Comment1 "" Comment2 "" Comment3 "" Comment4 "" $EndDescr $Sheet S 1100 1700 2050 1400 U 563244F7 F0 "powersupply" 60 F1 "power.sch" 60 F2 "CHG_ACTIVE_N" O R 3150 2050 60 F3 "USB_PRESENT_N" O R 3150 1950 60 F4 "CHARGE_ENABLE" I R 3150 2150 60 F5 "SYS_VOLTAGE" O R 3150 2350 60 F6 "CLK_50M" O L 1100 1950 60 F7 "FPGA_ENABLE_N" I R 3150 2450 60 $EndSheet $Sheet S 4450 1100 2250 1800 U 56337D98 F0 "debug" 60 F1 "debug.sch" 60 F2 "JTDI" O R 6700 1300 60 F3 "JTMS" O R 6700 1400 60 F4 "JTDO" I R 6700 1500 60 F5 "JTCK" O R 6700 1600 60 F6 "JRST_N" I R 6700 1700 60 F7 "BOOT1" O R 6700 1900 60 $EndSheet $Sheet S 7250 1100 2050 2150 U 56C43C85 F0 "FSMC" 60 F1 "FSMC.sch" 60 F2 "BOOT1" I R 9300 1300 60 F3 "JTDO" O R 9300 1400 60 F4 "JRST_N" I R 9300 1500 60 $EndSheet $Sheet S 4350 3650 2100 1850 U 56C579FC F0 "display" 60 F1 "display.sch" 60 $EndSheet Text Notes 7600 4050 0 60 ~ 0 B5 RAM\nB3 Display $Sheet S 1550 3750 2050 2200 U 56C6F777 F0 "sdram" 60 F1 "sdram.sch" 60 $EndSheet $EndSCHEMATC