fpgna/fpgna.sch

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4.4 KiB
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EESchema Schematic File Version 2
LIBS:fpgna-rescue
LIBS:power
LIBS:device
LIBS:transistors
LIBS:conn
LIBS:linear
LIBS:regul
LIBS:74xx
LIBS:cmos4000
LIBS:adc-dac
LIBS:memory
LIBS:xilinx
LIBS:microcontrollers
LIBS:dsp
LIBS:microchip
LIBS:analog_switches
LIBS:motorola
LIBS:texas
LIBS:intel
LIBS:audio
LIBS:interface
LIBS:digital-audio
LIBS:philips
LIBS:display
LIBS:cypress
LIBS:siliconi
LIBS:opto
LIBS:atmel
LIBS:contrib
LIBS:valves
LIBS:Oscillators
LIBS:lattice
LIBS:pmic
LIBS:specific-powersyms
LIBS:regulators
LIBS:stm32f4
LIBS:itead-displays
LIBS:ram
LIBS:connectors
LIBS:analog
LIBS:fpgna-cache
EELAYER 25 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 1 9
Title "FPGna"
Date ""
Rev ""
Comp "Shimatta"
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
$Sheet
S 3550 3550 2050 1400
U 563244F7
F0 "powersupply" 60
F1 "power.sch" 60
F2 "CHG_ACTIVE_N" O R 5600 3900 60
F3 "USB_PRESENT_N" O R 5600 3800 60
F4 "CHARGE_ENABLE" I R 5600 4000 60
F5 "SYS_VOLTAGE" O R 5600 4200 60
F6 "CLK_50M" O L 3550 3800 60
F7 "FPGA_ENABLE_N" I R 5600 4300 60
$EndSheet
$Sheet
S 2450 1450 1000 1100
U 56337D98
F0 "debug" 60
F1 "debug.sch" 60
F2 "JTDI" O R 3450 1800 60
F3 "JTMS" O R 3450 1600 60
F4 "JTDO" I R 3450 2250 60
F5 "JTCK" O R 3450 1700 60
F6 "JRST_N" O R 3450 2350 60
F7 "BOOT1" O R 3450 2450 60
$EndSheet
$Sheet
S 6300 1100 2050 2150
U 56C43C85
F0 "FSMC" 60
F1 "FSMC.sch" 60
F2 "BOOT1" I L 6300 2450 60
F3 "JTDO" O L 6300 2250 60
F4 "JRST_N" I L 6300 2350 60
F5 "BL0_N" O R 8350 2350 60
F6 "BL1_N" O R 8350 2450 60
F7 "A[19..23]" O R 8350 2550 60
F8 "SDIO_CMD" O L 6300 1250 60
F9 "T_CS" O R 8350 1350 60
F10 "T_CLK" O R 8350 1250 60
F11 "T_DOUT" I R 8350 1550 60
F12 "T_DIN" O R 8350 1450 60
$EndSheet
$Sheet
S 8500 1100 1750 800
U 56C579FC
F0 "display" 60
F1 "display.sch" 60
F2 "T_CLK" I L 8500 1250 60
F3 "T_CS" I L 8500 1350 60
F4 "T_DIN" I L 8500 1450 60
F5 "T_DOUT" O L 8500 1550 60
F6 "T_BUSY" O R 10250 1350 60
F7 "T_IRQ" O R 10250 1250 60
$EndSheet
$Sheet
S 8500 2200 1350 800
U 56C6F777
F0 "sdram" 60
F1 "sdram.sch" 60
F2 "A[19..23]" I L 8500 2550 60
F3 "BL0_N" I L 8500 2350 60
F4 "BL1_N" I L 8500 2450 60
F5 "AWS" O R 9850 2300 60
F6 "ABCK" O R 9850 2400 60
F7 "L3MODE" O R 9850 2800 60
F8 "L3CLK" O R 9850 2900 60
F9 "L3DATA" O R 9850 2700 60
F10 "ADATA" O R 9850 2600 60
F11 "ACLK" O R 9850 2500 60
$EndSheet
Wire Bus Line
8500 2550 8350 2550
Wire Wire Line
8350 2350 8500 2350
Wire Wire Line
8500 2450 8350 2450
$Sheet
S 3600 1450 1000 500
U 56C86141
F0 "userif" 60
F1 "userif.sch" 60
F2 "SW_A" O R 4600 1550 60
F3 "SW_D" O R 4600 1850 60
F4 "SW_B" O R 4600 1650 60
F5 "SW_C" O R 4600 1750 60
F6 "JTMS" I L 3600 1600 60
F7 "JTCK" I L 3600 1700 60
F8 "JTDI" I L 3600 1800 60
$EndSheet
$Sheet
S 4750 1100 1400 1000
U 56C7DD81
F0 "sdcard" 60
F1 "sdcard.sch" 60
F2 "SDIO_CMD" I R 6150 1250 60
F3 "T_IRQ" I L 4750 1250 60
F4 "T_BUSY" I L 4750 1350 60
F5 "SW_B" I L 4750 1650 60
F6 "SW_A" I L 4750 1550 60
F7 "SW_D" I L 4750 1850 60
F8 "SW_C" I L 4750 1750 60
$EndSheet
Wire Wire Line
8350 1250 8500 1250
Wire Wire Line
8500 1350 8350 1350
Wire Wire Line
8350 1450 8500 1450
Wire Wire Line
8500 1550 8350 1550
Wire Wire Line
10250 1250 10350 1250
Wire Wire Line
10350 1250 10350 950
Wire Wire Line
10350 950 4500 950
Wire Wire Line
4450 900 10400 900
Wire Wire Line
10400 900 10400 1350
Wire Wire Line
10400 1350 10250 1350
Wire Wire Line
4600 1550 4750 1550
Wire Wire Line
4600 1650 4750 1650
Wire Wire Line
4750 1750 4600 1750
Wire Wire Line
4600 1850 4750 1850
Wire Wire Line
6300 1250 6150 1250
Wire Wire Line
4500 950 4500 1250
Wire Wire Line
4500 1250 4750 1250
Wire Wire Line
4750 1350 4450 1350
Wire Wire Line
4450 1350 4450 900
Wire Wire Line
3450 2450 6300 2450
Wire Wire Line
6300 2350 3450 2350
Wire Wire Line
3450 2250 6300 2250
Wire Wire Line
3450 1600 3600 1600
Wire Wire Line
3600 1700 3450 1700
Wire Wire Line
3450 1800 3600 1800
$Sheet
S 10000 2200 600 800
U 56CA5D53
F0 "audio" 60
F1 "audio.sch" 60
F2 "ACLK" I L 10000 2500 60
F3 "ABCK" I L 10000 2400 60
F4 "AWS" I L 10000 2300 60
F5 "ADATA" I L 10000 2600 60
F6 "L3CLK" I L 10000 2900 60
F7 "L3MODE" I L 10000 2800 60
F8 "L3DATA" I L 10000 2700 60
$EndSheet
Wire Wire Line
9850 2300 10000 2300
Wire Wire Line
9850 2400 10000 2400
Wire Wire Line
10000 2500 9850 2500
Wire Wire Line
9850 2600 10000 2600
Wire Wire Line
10000 2700 9850 2700
Wire Wire Line
9850 2800 10000 2800
Wire Wire Line
10000 2900 9850 2900
$EndSCHEMATC