80 lines
1.4 KiB
Plaintext
80 lines
1.4 KiB
Plaintext
EESchema-LIBRARY Version 2.3
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#encoding utf-8
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#
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# VBAT
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#
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DEF VBAT #PWR 0 0 Y Y 1 F P
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F0 "#PWR" 0 -150 50 H I C CNN
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F1 "VBAT" 0 140 50 H V C CNN
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F2 "" 0 0 50 H V C CNN
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F3 "" 0 0 50 H V C CNN
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DRAW
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P 2 0 1 0 -30 50 0 100 N
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P 2 0 1 0 0 0 0 100 N
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P 2 0 1 0 0 100 30 50 N
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X VBAT 1 0 0 0 U 50 50 1 1 W N
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ENDDRAW
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ENDDEF
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#
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# VFPGA33
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#
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DEF VFPGA33 #PWR 0 0 Y Y 1 F P
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F0 "#PWR" 0 -150 50 H I C CNN
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F1 "VFPGA33" 0 140 50 H V C CNN
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F2 "" 0 0 50 H V C CNN
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F3 "" 0 0 50 H V C CNN
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DRAW
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P 2 0 1 0 -30 50 0 100 N
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P 2 0 1 0 0 0 0 100 N
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P 2 0 1 0 0 100 30 50 N
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X VFPGA33 1 0 0 0 U 50 50 1 1 W N
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ENDDRAW
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ENDDEF
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#
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# VSTM33
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#
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DEF VSTM33 #PWR 0 0 Y Y 1 F P
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F0 "#PWR" 0 -150 50 H I C CNN
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F1 "VSTM33" 0 140 50 H V C CNN
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F2 "" 0 0 50 H V C CNN
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F3 "" 0 0 50 H V C CNN
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DRAW
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P 2 0 1 0 -30 50 0 100 N
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P 2 0 1 0 0 0 0 100 N
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P 2 0 1 0 0 100 30 50 N
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X VSTM33 1 0 0 0 U 50 50 1 1 W N
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ENDDRAW
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ENDDEF
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#
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# VSYS
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#
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DEF VSYS #PWR 0 0 Y Y 1 F P
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F0 "#PWR" 0 -150 50 H I C CNN
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F1 "VSYS" 0 140 50 H V C CNN
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F2 "" 0 0 50 H V C CNN
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F3 "" 0 0 50 H V C CNN
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DRAW
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P 2 0 1 0 -30 50 0 100 N
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P 2 0 1 0 0 0 0 100 N
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P 2 0 1 0 0 100 30 50 N
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X VSYS 1 0 0 0 U 50 50 1 1 W N
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ENDDRAW
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ENDDEF
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#
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# VUSB
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#
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DEF VUSB #PWR 0 0 Y Y 1 F P
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F0 "#PWR" 0 -150 50 H I C CNN
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F1 "VUSB" 0 140 50 H V C CNN
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F2 "" 0 0 50 H V C CNN
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F3 "" 0 0 50 H V C CNN
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DRAW
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P 2 0 1 0 -30 50 0 100 N
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P 2 0 1 0 0 0 0 100 N
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P 2 0 1 0 0 100 30 50 N
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X VUSB 1 0 0 0 U 50 50 1 1 W N
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ENDDRAW
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ENDDEF
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#
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#End Library
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