660 lines
14 KiB
Plaintext
660 lines
14 KiB
Plaintext
EESchema Schematic File Version 2
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LIBS:power
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LIBS:device
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LIBS:transistors
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LIBS:conn
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LIBS:linear
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LIBS:regul
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LIBS:74xx
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LIBS:cmos4000
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LIBS:adc-dac
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LIBS:memory
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LIBS:xilinx
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LIBS:microcontrollers
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LIBS:dsp
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LIBS:microchip
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LIBS:analog_switches
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LIBS:motorola
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LIBS:texas
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LIBS:intel
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LIBS:audio
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LIBS:interface
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LIBS:digital-audio
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LIBS:philips
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LIBS:display
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LIBS:cypress
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LIBS:siliconi
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LIBS:opto
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LIBS:atmel
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LIBS:contrib
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LIBS:valves
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LIBS:Oscillators
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LIBS:lattice
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LIBS:pmic
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LIBS:specific-powersyms
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LIBS:regulators
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LIBS:stm32f4
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LIBS:fpgna-cache
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EELAYER 25 0
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EELAYER END
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$Descr A4 11693 8268
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encoding utf-8
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Sheet 4 4
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Title ""
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Date ""
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Rev ""
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Comp ""
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Comment4 ""
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U 7 1 56C47B2B
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F 0 "U4" H 9828 4328 60 0000 L CNN
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F 1 "STM32F407VGT" H 9828 4222 60 0000 L CNN
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F 2 "Housings_QFP:LQFP-100_14x14mm_Pitch0.5mm" H 8750 5050 60 0001 C CNN
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F 2 "Housings_QFP:LQFP-144_20x20mm_Pitch0.5mm" H 4000 5250 60 0001 C CNN
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F 3 "http://www.latticesemi.com/~/media/LatticeSemi/Documents/DataSheets/LatticeXP2/LatticeXP2FamilyDataSheet.pdf" H 3650 6150 60 0001 C CNN
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F 4 "1.0" H 1050 6050 60 0001 C CNN "Version"
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F 5 "Makise Kurisu <kurisu@shimatta.de>" H 1850 5950 60 0001 C CNN "Author"
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|
3800 7200 3800 7150
|
|
Wire Wire Line
|
|
4050 4900 3700 4900
|
|
Wire Wire Line
|
|
5350 4400 5750 4400
|
|
Wire Wire Line
|
|
5350 4500 5750 4500
|
|
Wire Wire Line
|
|
5350 4800 5750 4800
|
|
Wire Wire Line
|
|
5350 4900 5750 4900
|
|
Wire Wire Line
|
|
5350 5000 5750 5000
|
|
Wire Wire Line
|
|
5350 5100 5750 5100
|
|
Wire Wire Line
|
|
5350 5200 5750 5200
|
|
Wire Wire Line
|
|
5350 5300 5750 5300
|
|
Wire Wire Line
|
|
5350 5400 5750 5400
|
|
Wire Wire Line
|
|
5350 5500 5750 5500
|
|
Wire Wire Line
|
|
5350 5600 5750 5600
|
|
Wire Wire Line
|
|
5350 5700 5750 5700
|
|
Wire Wire Line
|
|
5350 5800 5750 5800
|
|
Wire Wire Line
|
|
5350 5900 5750 5900
|
|
Wire Wire Line
|
|
5350 6000 5750 6000
|
|
Wire Wire Line
|
|
5350 6100 5750 6100
|
|
Wire Wire Line
|
|
5350 6200 5750 6200
|
|
Wire Wire Line
|
|
5350 6300 5750 6300
|
|
Wire Wire Line
|
|
5350 4600 5750 4600
|
|
Wire Wire Line
|
|
5350 4700 5750 4700
|
|
Text Label 5750 4400 2 60 ~ 0
|
|
DA1
|
|
Text Label 5750 4500 2 60 ~ 0
|
|
DA0
|
|
Text Label 5750 4800 2 60 ~ 0
|
|
DA15
|
|
Text Label 5750 4900 2 60 ~ 0
|
|
DA14
|
|
Text Label 5750 5000 2 60 ~ 0
|
|
DA13
|
|
Text Label 5750 5100 2 60 ~ 0
|
|
DA12
|
|
Text Label 5750 5200 2 60 ~ 0
|
|
DA11
|
|
Text Label 5750 5300 2 60 ~ 0
|
|
DA10
|
|
Text Label 5750 5400 2 60 ~ 0
|
|
DA9
|
|
Text Label 5750 5500 2 60 ~ 0
|
|
DA8
|
|
Text Label 5750 5600 2 60 ~ 0
|
|
DA7
|
|
Text Label 5750 5700 2 60 ~ 0
|
|
DA6
|
|
Text Label 5750 5800 2 60 ~ 0
|
|
DA5
|
|
Text Label 5750 5900 2 60 ~ 0
|
|
DA4
|
|
Text Label 5750 4600 2 60 ~ 0
|
|
DA2
|
|
Text Label 5750 4700 2 60 ~ 0
|
|
DA3
|
|
Wire Wire Line
|
|
4050 4400 3700 4400
|
|
Wire Wire Line
|
|
4050 4500 3700 4500
|
|
Wire Wire Line
|
|
4050 4600 3700 4600
|
|
Wire Wire Line
|
|
4050 4700 3700 4700
|
|
Wire Wire Line
|
|
4050 4800 3700 4800
|
|
Text Label 3700 4800 0 60 ~ 0
|
|
OE_N
|
|
Text Label 3700 4700 0 60 ~ 0
|
|
WE_N
|
|
Text Label 3700 4600 0 60 ~ 0
|
|
WAIT_N
|
|
Text Label 3700 4500 0 60 ~ 0
|
|
E1_N
|
|
Text Label 3700 4400 0 60 ~ 0
|
|
ADV_N
|
|
Text Label 5750 6000 2 60 ~ 0
|
|
A16
|
|
Text Label 5750 6100 2 60 ~ 0
|
|
A17
|
|
Text Label 5750 6200 2 60 ~ 0
|
|
A18
|
|
Text Label 5750 6300 2 60 ~ 0
|
|
A19
|
|
$Comp
|
|
L VFPGA33 #PWR58
|
|
U 1 1 56C6B01D
|
|
P 6300 6550
|
|
F 0 "#PWR58" H 6300 6400 50 0001 C CNN
|
|
F 1 "VFPGA33" H 6318 6724 50 0000 C CNN
|
|
F 2 "" H 6300 6550 50 0000 C CNN
|
|
F 3 "" H 6300 6550 50 0000 C CNN
|
|
1 6300 6550
|
|
1 0 0 -1
|
|
$EndComp
|
|
Connection ~ 6300 6600
|
|
$Comp
|
|
L VFPGA33 #PWR56
|
|
U 1 1 56C6B114
|
|
P 6000 6550
|
|
F 0 "#PWR56" H 6000 6400 50 0001 C CNN
|
|
F 1 "VFPGA33" H 6018 6724 50 0000 C CNN
|
|
F 2 "" H 6000 6550 50 0000 C CNN
|
|
F 3 "" H 6000 6550 50 0000 C CNN
|
|
1 6000 6550
|
|
1 0 0 -1
|
|
$EndComp
|
|
Connection ~ 6000 6700
|
|
$Comp
|
|
L VFPGA33 #PWR51
|
|
U 1 1 56C6B644
|
|
P 3800 6550
|
|
F 0 "#PWR51" H 3800 6400 50 0001 C CNN
|
|
F 1 "VFPGA33" H 3818 6724 50 0000 C CNN
|
|
F 2 "" H 3800 6550 50 0000 C CNN
|
|
F 3 "" H 3800 6550 50 0000 C CNN
|
|
1 3800 6550
|
|
1 0 0 -1
|
|
$EndComp
|
|
Connection ~ 3800 6800
|
|
$EndSCHEMATC
|