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https://git.shimatta.de/pcb/headphone-amp.git
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d765f28455
* Schematic complete * Layout complete
29 lines
1.8 KiB
Plaintext
29 lines
1.8 KiB
Plaintext
(module jack_3.5_vert_lje0352-4r (layer F.Cu)
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(descr "Vertical 3.5mm jack, Lih Sheng LJE0352-4R")
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(fp_text reference JP*** (at 0 -5.90042) (layer F.SilkS)
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(effects (font (size 0.99822 0.99822) (thickness 0.19812)))
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)
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(fp_text value jack_3.5_vert_lje0352-4r (at 0 6.59892) (layer F.SilkS)
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(effects (font (size 0.99822 0.99822) (thickness 0.19812)))
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)
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(fp_circle (center 0 0) (end 3.79984 0) (layer F.SilkS) (width 0.3048))
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(fp_circle (center 0 0) (end 1.99898 0) (layer F.SilkS) (width 0.3048))
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(fp_circle (center 0 0) (end 4.0005 0) (layer F.SilkS) (width 0.3048))
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(fp_circle (center 0 0) (end 1.80086 0) (layer F.SilkS) (width 0.3048))
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(fp_line (start -4.50088 5.4991) (end 4.50088 5.4991) (layer F.SilkS) (width 0.3048))
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(fp_line (start 4.50088 5.4991) (end 4.50088 -4.50088) (layer F.SilkS) (width 0.3048))
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(fp_line (start 4.50088 -4.50088) (end 2.99974 -5.00126) (layer F.SilkS) (width 0.3048))
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(fp_line (start 2.99974 -5.00126) (end -2.99974 -5.00126) (layer F.SilkS) (width 0.3048))
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(fp_line (start -2.99974 -5.00126) (end -4.50088 -4.50088) (layer F.SilkS) (width 0.3048))
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(fp_line (start -4.50088 -4.50088) (end -4.50088 5.4991) (layer F.SilkS) (width 0.3048))
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(pad 3 thru_hole oval (at 0 4.29768) (size 3.49758 2.19964) (drill oval 2.19964 0.99822) (layers *.Cu *.Mask F.SilkS))
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(pad 1 thru_hole oval (at 3.6957 -0.5969) (size 2.19964 3.49758) (drill oval 0.99568 2.1971) (layers *.Cu *.Mask F.SilkS))
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(pad 4 thru_hole oval (at 0 -3.7973) (size 3.49758 2.19964) (drill oval 2.19964 0.99822) (layers *.Cu *.Mask F.SilkS))
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(pad 2 thru_hole oval (at -3.49758 -0.5969) (size 2.19964 3.49758) (drill oval 0.99568 2.1971) (layers *.Cu *.Mask F.SilkS))
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(model walter/conn_av/jack_3.5_vert_plug.wrl
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(at (xyz 0 0 0))
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(scale (xyz 1 1 1))
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(rotate (xyz 0 0 0))
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)
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)
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