diff --git a/doc/acro.tex b/doc/acro.tex index 5e03185..9bebfc8 100644 --- a/doc/acro.tex +++ b/doc/acro.tex @@ -13,6 +13,7 @@ \acro{fpga} [FPGA] {field-programmable gate array} \acro{io} [I/O] {input / output} \acro{jtag} [JTAG] {Joint Test Action Group} + \acro{pll} [PLL] {phase locked loop} \acro{led} [LED] {light emitting diode} \acro{ldo} [LDO] {low-dropout regulator} \acro{rx} [RX] {receive} diff --git a/doc/img/overview.dia b/doc/img/overview.dia index e8db79b..dbe7907 100644 Binary files a/doc/img/overview.dia and b/doc/img/overview.dia differ diff --git a/doc/tiny-xo2-documentation.tex b/doc/tiny-xo2-documentation.tex index 78358fa..41e039c 100644 --- a/doc/tiny-xo2-documentation.tex +++ b/doc/tiny-xo2-documentation.tex @@ -30,6 +30,7 @@ pdflang=en, \usepackage{multirow} \usepackage{graphicx} \usepackage{xcolor} +\usepackage{adjustbox} \usepackage{pdfpages} \usepackage{pdflscape} \usepackage[american]{babel} @@ -44,7 +45,12 @@ bibencoding=utf8 \addbibresource{lit.bib} \DeclareLanguageMapping{american}{american-apa} -\newcommand\Warning{% +\newcommand\hwmodSym{% + \makebox[1.4em][c]{% + \makebox[0pt][c]{\raisebox{.1em}{\small!}}% + \makebox[0pt][c]{\color{blue}\Large$\bigtriangleup$}}}% + +\newcommand\WarningSym{% \makebox[1.4em][c]{% \makebox[0pt][c]{\raisebox{.1em}{\small!}}% \makebox[0pt][c]{\color{red}\Large$\bigtriangleup$}}}% @@ -63,7 +69,26 @@ bibencoding=utf8 \setlength{\parindent}{0cm} \setlength{\parskip}{1em} -\newcommand{\hwmod}[1]{\paragraph{\Warning Hardware Modification \Warning} #1} +\newcommand{\hwmod}[1]{ + \begin{center} + \adjustbox{minipage=\textwidth,cfbox=blue}{ + \begin{center} + \hwmodSym \textbf{Hardware Modification}\hwmodSym + \end{center} + #1 + } + \end{center} +} +\newcommand{\Warning}[1]{ + \begin{center} + \adjustbox{minipage=\textwidth,cfbox=red}{ + \begin{center} + \WarningSym \textbf{Warning}\WarningSym + \end{center} + #1 + } + \end{center} +} \begin{document} @@ -79,7 +104,7 @@ The Tiny-XO2 is a small, versatile and cost-effective development platform for t In addition to the \ac{fpga}, it provides a \ac{usb} to \ac{uart} converter and a crystal to include the basic set of components for any \ac{fpga} design. -This manual applies to hardware revision 01. +This manual applies to hardware revision 01. The latest version can be found online at \\ \url{https://l.notsyncing.net/tinyxo2} \chapter{Hardware} This chapter explains all available hardware functions. @@ -119,9 +144,9 @@ The board can be powered either via \ac{usb} or using the \texttt{VB} pin on pin The \texttt{3V} pins on the pin headers can be used to supply the on-board generated 3.3 V to supporting circuitry. The maximum current to be drawn from these pins is 500 mA\footnote{The maximum current of the AP1117 voltage regulator is 800 mA\parencite[page 4]{tlv1117}. Watch the temperature of \texttt{U1} when drawing high amounts of current.}. -All \ac{io} pins on header \texttt{J3} use the voltage on pin \texttt{VX} as bank voltage. It may range from 1.2 V to 3.3 V \parencite[page 8]{ioguide}. By populating \texttt{R9} with a zero Ohm resistor, the bank can be connected to the on-board 3.3 V supply. In this case, \texttt{VX} becomes a normal \texttt{3V} pin. See chapter \ref{ioheaders} for more details. +All \ac{io} pins on header \texttt{J3} use the voltage on pin \texttt{VX} as bank voltage. It may range from 1.2 V to 3.3 V \parencite[page 8]{ioguide}. By populating \texttt{R9} with a zero Ohm resistor, the bank can be connected to the on-board 3.3 V supply. In this case, \texttt{VX} becomes a normal \texttt{3V} pin. -\hwmod{If a 2.5 V supply voltage is required for all \ac{io} pins, the main voltage regulator \texttt{U1} can be replaced with a 1117-2.5 2.5 V voltage regulator. The \ac{fpga} will continue to function normally in this case. When doing this, all \texttt{3V} pins carry 2.5 V. \texttt{VX} may be supplied with up to 3.3 V. \textbf{The CH340G \ac{usb}-to-serial converter will stop working in this configuration}, so it needs to be removed from the board.} +\hwmod{If a 2.5 V supply voltage is required for all \ac{io} pins, the main voltage regulator \texttt{U1} can be replaced with a 1117-2.5 2.5 V voltage regulator. The \ac{fpga} will continue to function normally in this case. When doing this, all \texttt{3V} pins carry 2.5 V. \texttt{VX} may be supplied with up to 3.3 V. \textbf{The CH340G \ac{usb}-to-serial converter will stop working in this configuration} and needs to be removed from the board.} \section{\acs{fpga}} \label{fpga} @@ -175,16 +200,20 @@ Additionally, the \ac{rx} and \ac{tx} lines have an \ac{led} connected in parall \section{Crystal Oscillator} \label{crystal} -The board features a 12 MHz crystal oscillator. It supplies the clock to the \ac{usb}-to-\ac{uart} converter and is also connected to pin \texttt{28} of the \ac{fpga}. If the 12 MHz clock signal is not needed on the \ac{fpga}, resistor \texttt{R2} can be removed to free pin \texttt{28} as a general purpose \ac{io} pin. +The board features a 12 MHz crystal oscillator. It supplies the clock to the \ac{usb}-to-\ac{uart} converter and is also connected to pin \texttt{28} of the \ac{fpga}. If the 12 MHz clock signal is not needed on the \ac{fpga}, resistor \texttt{R2} can be removed to free pin \texttt{28} as a general purpose \ac{io} pin. A higher frequency for the design can be generated using the \ac{pll} inside the \ac{fpga}. + +\hwmod{If another base frequency is required, the crystal oscillator on the back (\texttt{U4}) can be exchanged with another value. \textbf{The CH340G \ac{usb}-to-\ac{uart} coverter will stop working in this configuration} and needs to be removed from the board.} \section{\acs{io} Headers} \label{ioheaders} The \ac{io} headers break out all available \ac{io} pins of the \ac{fpga}. The pin number is marked next to each pin on the board. -Header \texttt{J3} has no special functions and uses \texttt{VX} as bank voltage. This voltage can be tied to the 3.3 V supply of the board by installing a zero ohm resistor for component \texttt{R9}. +Header \texttt{J3} has no special functions and uses \texttt{VX} as bank voltage. This voltage can be tied to the 3.3 V supply of the board either by installing a zero ohm resistor for component \texttt{R9} or by installing a jumper between the \texttt{VX} and \texttt{3V} pin. Refer to chapter \ref{power} for more information on \ac{io} voltages. Header \texttt{J4} has special functions assigned to most of its pins. Refer to Table \ref{tab:iofunctions} for a comprehensive list. In order to use these pins as general purpose \ac{io} pins, refer to the respective chapter. All \ac{io} pins on header \texttt{J4} use 3.3 V as bank voltage. +Note that the \ac{jtag} pins are connected in parallel to the \ac{jtag} header \texttt{J2} and the corresponding pins on \texttt{J4}. + \begin{table}[h] \caption{\acs{io} pin special functions} \label{tab:iofunctions} @@ -276,9 +305,11 @@ Pin \texttt{26} is not available as user \ac{io} in this configuration. Care nee \subsection{\acs{uart} Bootloader} \label{progopt:bootloader} -\textit{NYI. TODO.} +The MachXO2 devices can be programmed from the active design. This allows the user to entirely disable all external programming interfaces which makes all \ac{io} pins available to the user logic. -{\color{red}WARNING: Setting these parameters will \textbf{permanently} disable the \ac{jtag} port. This might render the device unusable. Only apply this if you really know what you are doing.} +At the current point in time, this functionality has not been implemented. + +\Warning{Setting these parameters will \textbf{permanently} disable the \ac{jtag} port. This might render the device unusable. Only apply this if you really know what you are doing.} \begin{table}[h] \caption{Preferences for bootloader mode} @@ -293,6 +324,11 @@ Pin \texttt{26} is not available as user \ac{io} in this configuration. Care nee All \ac{io} pins are available as user \acp{io}. +\chapter{Errata} +\section*{Hardware Revision 01} +\paragraph{TLV1117-33 decoupling.} +The board is missing the 10+ $\mu F$ capacitor on the output of the 1117-3.3 voltage regulator (\texttt{U1}). This might cause instability with certain devices. This problem can be easily solved by installing a 10 $\mu F$ 0805 capacitor right next to \texttt{C7}. Revision 02 addresses this issue. + \chapter{Appendix} \section{Version History} @@ -302,7 +338,7 @@ All \ac{io} pins are available as user \acp{io}. \centering \begin{tabular}{ll} \toprule \textbf{Version} & \textbf{Comment} \\ \midrule - 2017-11-25 & DTR usage, 2.5 V mod \\ + 2017-11-27 & DTR usage, 2.5 V mod, errata, editorial changes \\ 2017-11-20 & Fix \ac{jtag} TDI pin number \\ 2017-11-16 & Editorial changes \\ 2017-11-10 & Initial draft \\ \bottomrule