Reannotate schematic

This commit is contained in:
Markus Koch 2017-10-01 23:12:04 +02:00
parent 6bcb9c32ce
commit 18151985c0
4 changed files with 224 additions and 262 deletions

186
fpga.sch
View File

@ -96,16 +96,16 @@ U 1 1 59CE9484
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F 0 "U4" H 1750 2587 60 0000 C CNN F 0 "U4" H 1750 2587 60 0000 C CNN
F 1 "12MHz" H 1750 2481 60 0000 C CNN F 1 "12MHz" H 1750 2481 60 0000 C CNN
F 2 "Crystals:Crystal_SMD_7050-4pin_7.0x5.0mm" H 1550 1550 60 0001 C CNN F 2 "Oscillators:Oscillator_SMD_EuroQuartz_XO91-4pin_7.0x5.0mm" H 1550 1550 60 0001 C CNN
F 3 "" H 1550 1550 60 0000 C CNN F 3 "" H 1550 1550 60 0000 C CNN
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F 1 "GND" H 955 1477 50 0000 C CNN F 1 "GND" H 955 1477 50 0000 C CNN
F 2 "" H 950 1650 50 0001 C CNN F 2 "" H 950 1650 50 0001 C CNN
F 3 "" H 950 1650 50 0001 C CNN F 3 "" H 950 1650 50 0001 C CNN
@ -113,10 +113,10 @@ F 3 "" H 950 1650 50 0001 C CNN
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F 2 "" H 950 1050 50 0001 C CNN F 2 "" H 950 1050 50 0001 C CNN
F 3 "" H 950 1050 50 0001 C CNN F 3 "" H 950 1050 50 0001 C CNN
@ -136,10 +136,10 @@ F 3 "" H 950 1350 50 0001 C CNN
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F 2 "" H 8550 3450 50 0001 C CNN F 2 "" H 8550 3450 50 0001 C CNN
F 3 "" H 8550 3450 50 0001 C CNN F 3 "" H 8550 3450 50 0001 C CNN
@ -147,10 +147,10 @@ F 3 "" H 8550 3450 50 0001 C CNN
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F 2 "Resistors_SMD:R_0603" V 2730 1250 50 0001 C CNN F 2 "Resistors_SMD:R_0603" V 2730 1250 50 0001 C CNN
F 3 "" H 2800 1250 50 0001 C CNN F 3 "" H 2800 1250 50 0001 C CNN
@ -158,10 +158,10 @@ F 3 "" H 2800 1250 50 0001 C CNN
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F 2 "Resistors_SMD:R_0603" V 2730 1450 50 0001 C CNN F 2 "Resistors_SMD:R_0603" V 2730 1450 50 0001 C CNN
F 3 "" H 2800 1450 50 0001 C CNN F 3 "" H 2800 1450 50 0001 C CNN
@ -208,10 +208,10 @@ F 3 "" H 9350 1400 50 0001 C CNN
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F 2 "" H 8950 1750 50 0001 C CNN F 2 "" H 8950 1750 50 0001 C CNN
F 3 "" H 8950 1750 50 0001 C CNN F 3 "" H 8950 1750 50 0001 C CNN
@ -219,10 +219,10 @@ F 3 "" H 8950 1750 50 0001 C CNN
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F 2 "" H 8950 1000 50 0001 C CNN F 2 "" H 8950 1000 50 0001 C CNN
F 3 "" H 8950 1000 50 0001 C CNN F 3 "" H 8950 1000 50 0001 C CNN
@ -265,10 +265,10 @@ F 3 "" H 10750 1400 50 0001 C CNN
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F 3 "" H 10350 1750 50 0001 C CNN F 3 "" H 10350 1750 50 0001 C CNN
@ -282,10 +282,10 @@ VCCIO23
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F 2 "Resistors_SMD:R_0603" V 1230 4600 50 0001 C CNN F 2 "Resistors_SMD:R_0603" V 1230 4600 50 0001 C CNN
F 3 "" H 1300 4600 50 0001 C CNN F 3 "" H 1300 4600 50 0001 C CNN
@ -293,10 +293,10 @@ F 3 "" H 1300 4600 50 0001 C CNN
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F 3 "" H 1050 4500 50 0001 C CNN F 3 "" H 1050 4500 50 0001 C CNN
@ -318,10 +318,10 @@ JTAG_TDI
Text Label 8650 3200 2 60 ~ 0 Text Label 8650 3200 2 60 ~ 0
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F 3 "" H 5900 3550 50 0001 C CNN F 3 "" H 5900 3550 50 0001 C CNN
@ -329,10 +329,10 @@ F 3 "" H 5900 3550 50 0001 C CNN
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F 2 "" H 4600 4150 50 0001 C CNN F 2 "" H 4600 4150 50 0001 C CNN
F 3 "" H 4600 4150 50 0001 C CNN F 3 "" H 4600 4150 50 0001 C CNN
@ -342,10 +342,10 @@ $EndComp
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F 2 "" H 6600 4150 50 0001 C CNN F 2 "" H 6600 4150 50 0001 C CNN
F 3 "" H 6600 4150 50 0001 C CNN F 3 "" H 6600 4150 50 0001 C CNN
@ -353,10 +353,10 @@ F 3 "" H 6600 4150 50 0001 C CNN
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P 5000 4350 P 5000 4350
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F 1 "GND" H 5005 4177 50 0000 C CNN F 1 "GND" H 5005 4177 50 0000 C CNN
F 2 "" H 5000 4350 50 0001 C CNN F 2 "" H 5000 4350 50 0001 C CNN
F 3 "" H 5000 4350 50 0001 C CNN F 3 "" H 5000 4350 50 0001 C CNN
@ -364,10 +364,10 @@ F 3 "" H 5000 4350 50 0001 C CNN
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F 2 "Resistors_SMD:R_0603" V 1330 3850 50 0001 C CNN F 2 "Resistors_SMD:R_0603" V 1330 3850 50 0001 C CNN
F 3 "" H 1400 3850 50 0001 C CNN F 3 "" H 1400 3850 50 0001 C CNN
@ -375,10 +375,10 @@ F 3 "" H 1400 3850 50 0001 C CNN
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F 1 "1k" V 1400 3950 50 0000 C CNN F 1 "1k" V 1400 3950 50 0000 C CNN
F 2 "Resistors_SMD:R_0603" V 1330 3950 50 0001 C CNN F 2 "Resistors_SMD:R_0603" V 1330 3950 50 0001 C CNN
F 3 "" H 1400 3950 50 0001 C CNN F 3 "" H 1400 3950 50 0001 C CNN
@ -386,10 +386,10 @@ F 3 "" H 1400 3950 50 0001 C CNN
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F 2 "Resistors_SMD:R_0603" V 1330 4050 50 0001 C CNN F 2 "Resistors_SMD:R_0603" V 1330 4050 50 0001 C CNN
F 3 "" H 1400 4050 50 0001 C CNN F 3 "" H 1400 4050 50 0001 C CNN
@ -433,10 +433,10 @@ F 3 "" H 1650 3100 50 0001 C CNN
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F 2 "Resistors_SMD:R_0603" V 1780 3500 50 0001 C CNN F 2 "Resistors_SMD:R_0603" V 1780 3500 50 0001 C CNN
F 3 "" H 1850 3500 50 0001 C CNN F 3 "" H 1850 3500 50 0001 C CNN
@ -444,10 +444,10 @@ F 3 "" H 1850 3500 50 0001 C CNN
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F 2 "Resistors_SMD:R_0603" V 1580 3500 50 0001 C CNN F 2 "Resistors_SMD:R_0603" V 1580 3500 50 0001 C CNN
F 3 "" H 1650 3500 50 0001 C CNN F 3 "" H 1650 3500 50 0001 C CNN
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F 1 "+3V3" H 1765 2923 50 0000 C CNN F 1 "+3V3" H 1765 2923 50 0000 C CNN
F 2 "" H 1750 2750 50 0001 C CNN F 2 "" H 1750 2750 50 0001 C CNN
F 3 "" H 1750 2750 50 0001 C CNN F 3 "" H 1750 2750 50 0001 C CNN
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Text Label 8650 6100 2 60 ~ 0 Text Label 8650 6100 2 60 ~ 0
P4 P4
$Comp $Comp
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F 1 "JTAG" H 5600 1776 50 0000 C CNN F 1 "JTAG" H 5600 1776 50 0000 C CNN
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F 3 "" H 5550 1550 50 0001 C CNN F 3 "" H 5550 1550 50 0001 C CNN
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F 3 "" H 5300 3550 50 0001 C CNN F 3 "" H 5300 3550 50 0001 C CNN
@ -557,10 +557,10 @@ CLK_FPGA
Text Label 6300 3650 0 60 ~ 0 Text Label 6300 3650 0 60 ~ 0
P25 P25
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F 1 "GND" H 6505 1427 50 0000 C CNN F 1 "GND" H 6505 1427 50 0000 C CNN
F 2 "" H 6500 1600 50 0001 C CNN F 2 "" H 6500 1600 50 0001 C CNN
F 3 "" H 6500 1600 50 0001 C CNN F 3 "" H 6500 1600 50 0001 C CNN
@ -568,10 +568,10 @@ F 3 "" H 6500 1600 50 0001 C CNN
1 0 0 -1 1 0 0 -1
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F 0 "#PWR024" H 6500 1250 50 0001 C CNN F 0 "#PWR017" H 6500 1250 50 0001 C CNN
F 1 "+3V3" H 6515 1573 50 0000 C CNN F 1 "+3V3" H 6515 1573 50 0000 C CNN
F 2 "" H 6500 1400 50 0001 C CNN F 2 "" H 6500 1400 50 0001 C CNN
F 3 "" H 6500 1400 50 0001 C CNN F 3 "" H 6500 1400 50 0001 C CNN
@ -579,10 +579,10 @@ F 3 "" H 6500 1400 50 0001 C CNN
1 0 0 -1 1 0 0 -1
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F 1 "GND" H 6205 4177 50 0000 C CNN F 1 "GND" H 6205 4177 50 0000 C CNN
F 2 "" H 6200 4350 50 0001 C CNN F 2 "" H 6200 4350 50 0001 C CNN
F 3 "" H 6200 4350 50 0001 C CNN F 3 "" H 6200 4350 50 0001 C CNN
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@ -629,36 +629,26 @@ Wire Wire Line
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Wire Wire Line
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Wire Wire Line Wire Wire Line
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Wire Wire Line
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Wire Wire Line
8650 3450 8650 3750
Wire Wire Line Wire Wire Line
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Connection ~ 8650 3450 Connection ~ 8650 3450
Wire Wire Line Wire Wire Line
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Wire Wire Line Wire Wire Line
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Wire Wire Line
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Wire Wire Line Wire Wire Line
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Wire Wire Line Wire Wire Line
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Wire Wire Line Wire Wire Line
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Wire Wire Line Wire Wire Line
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Wire Wire Line
8650 5550 8750 5550
Wire Wire Line Wire Wire Line
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Wire Wire Line Wire Wire Line
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Wire Wire Line
8650 3750 8750 3750
Wire Wire Line Wire Wire Line
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Wire Wire Line Wire Wire Line
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Wire Wire Line
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Wire Wire Line Wire Wire Line
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Wire Wire Line
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Wire Wire Line Wire Wire Line
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Wire Wire Line
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Wire Wire Line Wire Wire Line
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Wire Wire Line Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line Wire Wire Line
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Wire Wire Line Wire Wire Line
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Connection ~ 10350 1100 Connection ~ 10350 1100
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Wire Wire Line Wire Wire Line
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Wire Wire Line
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Wire Wire Line Wire Wire Line
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Wire Notes Line Wire Notes Line
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Wire Wire Line Wire Wire Line
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Wire Wire Line
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Wire Wire Line Wire Wire Line
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F 1 "100n" H 1392 1355 50 0000 L CNN F 1 "100n" H 1392 1355 50 0000 L CNN
F 2 "Capacitors_SMD:C_0603" H 1300 1400 50 0001 C CNN F 2 "Capacitors_SMD:C_0603" H 1300 1400 50 0001 C CNN
F 3 "" H 1300 1400 50 0001 C CNN F 3 "" H 1300 1400 50 0001 C CNN
@ -69,10 +69,10 @@ F 3 "" H 1300 1400 50 0001 C CNN
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L CP_Small C1 L CP_Small C5
U 1 1 59CE0E72 U 1 1 59CE0E72
P 1100 1400 P 1100 1400
F 0 "C1" H 1187 1446 50 0000 L CNN F 0 "C5" H 1187 1446 50 0000 L CNN
F 1 "1u" H 1187 1355 50 0000 L CNN F 1 "1u" H 1187 1355 50 0000 L CNN
F 2 "Capacitors_SMD:C_0805" H 1100 1400 50 0001 C CNN F 2 "Capacitors_SMD:C_0805" H 1100 1400 50 0001 C CNN
F 3 "" H 1100 1400 50 0001 C CNN F 3 "" H 1100 1400 50 0001 C CNN
@ -80,10 +80,10 @@ F 3 "" H 1100 1400 50 0001 C CNN
-1 0 0 -1 -1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L C_Small C3 L C_Small C7
U 1 1 59CE1081 U 1 1 59CE1081
P 2200 1400 P 2200 1400
F 0 "C3" H 2108 1354 50 0000 R CNN F 0 "C7" H 2108 1354 50 0000 R CNN
F 1 "100n" H 2108 1445 50 0000 R CNN F 1 "100n" H 2108 1445 50 0000 R CNN
F 2 "Capacitors_SMD:C_0603" H 2200 1400 50 0001 C CNN F 2 "Capacitors_SMD:C_0603" H 2200 1400 50 0001 C CNN
F 3 "" H 2200 1400 50 0001 C CNN F 3 "" H 2200 1400 50 0001 C CNN
@ -91,10 +91,10 @@ F 3 "" H 2200 1400 50 0001 C CNN
1 0 0 1 1 0 0 1
$EndComp $EndComp
$Comp $Comp
L GND #PWR02 L GND #PWR05
U 1 1 59CE11F3 U 1 1 59CE11F3
P 1750 1700 P 1750 1700
F 0 "#PWR02" H 1750 1450 50 0001 C CNN F 0 "#PWR05" H 1750 1450 50 0001 C CNN
F 1 "GND" H 1755 1527 50 0000 C CNN F 1 "GND" H 1755 1527 50 0000 C CNN
F 2 "" H 1750 1700 50 0001 C CNN F 2 "" H 1750 1700 50 0001 C CNN
F 3 "" H 1750 1700 50 0001 C CNN F 3 "" H 1750 1700 50 0001 C CNN
@ -102,10 +102,10 @@ F 3 "" H 1750 1700 50 0001 C CNN
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L +3V3 #PWR05 L +3V3 #PWR02
U 1 1 59CE142B U 1 1 59CE142B
P 2200 1100 P 2200 1100
F 0 "#PWR05" H 2200 950 50 0001 C CNN F 0 "#PWR02" H 2200 950 50 0001 C CNN
F 1 "+3V3" H 2215 1273 50 0000 C CNN F 1 "+3V3" H 2215 1273 50 0000 C CNN
F 2 "" H 2200 1100 50 0001 C CNN F 2 "" H 2200 1100 50 0001 C CNN
F 3 "" H 2200 1100 50 0001 C CNN F 3 "" H 2200 1100 50 0001 C CNN
@ -113,10 +113,10 @@ F 3 "" H 2200 1100 50 0001 C CNN
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L VBUS #PWR01 L VBUS #PWR03
U 1 1 59CE157B U 1 1 59CE157B
P 1200 1150 P 1200 1150
F 0 "#PWR01" H 1200 1000 50 0001 C CNN F 0 "#PWR03" H 1200 1000 50 0001 C CNN
F 1 "VBUS" H 1215 1323 50 0000 C CNN F 1 "VBUS" H 1215 1323 50 0000 C CNN
F 2 "" H 1200 1150 50 0001 C CNN F 2 "" H 1200 1150 50 0001 C CNN
F 3 "" H 1200 1150 50 0001 C CNN F 3 "" H 1200 1150 50 0001 C CNN
@ -135,10 +135,10 @@ F 3 "" H 3950 1750 60 0001 C CNN
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L C_Small C4 L C_Small C1
U 1 1 59CE1FC1 U 1 1 59CE1FC1
P 3600 1350 P 3600 1350
F 0 "C4" H 3500 1300 50 0000 R CNN F 0 "C1" H 3500 1300 50 0000 R CNN
F 1 "10n" H 3600 1400 50 0000 R CNN F 1 "10n" H 3600 1400 50 0000 R CNN
F 2 "Capacitors_SMD:C_0603" H 3600 1350 50 0001 C CNN F 2 "Capacitors_SMD:C_0603" H 3600 1350 50 0001 C CNN
F 3 "" H 3600 1350 50 0001 C CNN F 3 "" H 3600 1350 50 0001 C CNN
@ -146,10 +146,10 @@ F 3 "" H 3600 1350 50 0001 C CNN
1 0 0 1 1 0 0 1
$EndComp $EndComp
$Comp $Comp
L GND #PWR010 L GND #PWR09
U 1 1 59CE28E2 U 1 1 59CE28E2
P 4800 3000 P 4800 3000
F 0 "#PWR010" H 4800 2750 50 0001 C CNN F 0 "#PWR09" H 4800 2750 50 0001 C CNN
F 1 "GND" H 4805 2827 50 0000 C CNN F 1 "GND" H 4805 2827 50 0000 C CNN
F 2 "" H 4800 3000 50 0001 C CNN F 2 "" H 4800 3000 50 0001 C CNN
F 3 "" H 4800 3000 50 0001 C CNN F 3 "" H 4800 3000 50 0001 C CNN
@ -157,10 +157,10 @@ F 3 "" H 4800 3000 50 0001 C CNN
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L +3V3 #PWR06 L +3V3 #PWR07
U 1 1 59CE2901 U 1 1 59CE2901
P 3400 2550 P 3400 2550
F 0 "#PWR06" H 3400 2400 50 0001 C CNN F 0 "#PWR07" H 3400 2400 50 0001 C CNN
F 1 "+3V3" H 3400 2700 50 0000 C CNN F 1 "+3V3" H 3400 2700 50 0000 C CNN
F 2 "" H 3400 2550 50 0001 C CNN F 2 "" H 3400 2550 50 0001 C CNN
F 3 "" H 3400 2550 50 0001 C CNN F 3 "" H 3400 2550 50 0001 C CNN
@ -168,10 +168,10 @@ F 3 "" H 3400 2550 50 0001 C CNN
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L C_Small C5 L C_Small C2
U 1 1 59CE2F41 U 1 1 59CE2F41
P 3900 1350 P 3900 1350
F 0 "C5" H 3800 1300 50 0000 R CNN F 0 "C2" H 3800 1300 50 0000 R CNN
F 1 "100n" H 3900 1400 50 0000 R CNN F 1 "100n" H 3900 1400 50 0000 R CNN
F 2 "Capacitors_SMD:C_0603" H 3900 1350 50 0001 C CNN F 2 "Capacitors_SMD:C_0603" H 3900 1350 50 0001 C CNN
F 3 "" H 3900 1350 50 0001 C CNN F 3 "" H 3900 1350 50 0001 C CNN
@ -179,10 +179,10 @@ F 3 "" H 3900 1350 50 0001 C CNN
1 0 0 1 1 0 0 1
$EndComp $EndComp
$Comp $Comp
L C_Small C6 L C_Small C3
U 1 1 59CE300F U 1 1 59CE300F
P 4200 1350 P 4200 1350
F 0 "C6" H 4100 1300 50 0000 R CNN F 0 "C3" H 4100 1300 50 0000 R CNN
F 1 "10n" H 4200 1400 50 0000 R CNN F 1 "10n" H 4200 1400 50 0000 R CNN
F 2 "Capacitors_SMD:C_0603" H 4200 1350 50 0001 C CNN F 2 "Capacitors_SMD:C_0603" H 4200 1350 50 0001 C CNN
F 3 "" H 4200 1350 50 0001 C CNN F 3 "" H 4200 1350 50 0001 C CNN
@ -190,10 +190,10 @@ F 3 "" H 4200 1350 50 0001 C CNN
1 0 0 1 1 0 0 1
$EndComp $EndComp
$Comp $Comp
L C_Small C7 L C_Small C4
U 1 1 59CE303F U 1 1 59CE303F
P 4500 1350 P 4500 1350
F 0 "C7" H 4400 1300 50 0000 R CNN F 0 "C4" H 4400 1300 50 0000 R CNN
F 1 "100n" H 4500 1400 50 0000 R CNN F 1 "100n" H 4500 1400 50 0000 R CNN
F 2 "Capacitors_SMD:C_0603" H 4500 1350 50 0001 C CNN F 2 "Capacitors_SMD:C_0603" H 4500 1350 50 0001 C CNN
F 3 "" H 4500 1350 50 0001 C CNN F 3 "" H 4500 1350 50 0001 C CNN
@ -270,10 +270,10 @@ Wire Wire Line
4050 1150 4050 1050 4050 1150 4050 1050
Connection ~ 4050 1150 Connection ~ 4050 1150
$Comp $Comp
L +3V3 #PWR08 L +3V3 #PWR01
U 1 1 59CE365D U 1 1 59CE365D
P 4050 1050 P 4050 1050
F 0 "#PWR08" H 4050 900 50 0001 C CNN F 0 "#PWR01" H 4050 900 50 0001 C CNN
F 1 "+3V3" H 4050 1200 50 0000 C CNN F 1 "+3V3" H 4050 1200 50 0000 C CNN
F 2 "" H 4050 1050 50 0001 C CNN F 2 "" H 4050 1050 50 0001 C CNN
F 3 "" H 4050 1050 50 0001 C CNN F 3 "" H 4050 1050 50 0001 C CNN
@ -281,10 +281,10 @@ F 3 "" H 4050 1050 50 0001 C CNN
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR09 L GND #PWR04
U 1 1 59CE3680 U 1 1 59CE3680
P 4050 1650 P 4050 1650
F 0 "#PWR09" H 4050 1400 50 0001 C CNN F 0 "#PWR04" H 4050 1400 50 0001 C CNN
F 1 "GND" H 4055 1477 50 0000 C CNN F 1 "GND" H 4055 1477 50 0000 C CNN
F 2 "" H 4050 1650 50 0001 C CNN F 2 "" H 4050 1650 50 0001 C CNN
F 3 "" H 4050 1650 50 0001 C CNN F 3 "" H 4050 1650 50 0001 C CNN
@ -296,10 +296,10 @@ Wire Wire Line
Wire Wire Line Wire Wire Line
3400 2900 3400 3000 3400 2900 3400 3000
$Comp $Comp
L GND #PWR07 L GND #PWR08
U 1 1 59CEF312 U 1 1 59CEF312
P 3400 3000 P 3400 3000
F 0 "#PWR07" H 3400 2750 50 0001 C CNN F 0 "#PWR08" H 3400 2750 50 0001 C CNN
F 1 "GND" H 3405 2827 50 0000 C CNN F 1 "GND" H 3405 2827 50 0000 C CNN
F 2 "" H 3400 3000 50 0001 C CNN F 2 "" H 3400 3000 50 0001 C CNN
F 3 "" H 3400 3000 50 0001 C CNN F 3 "" H 3400 3000 50 0001 C CNN
@ -329,10 +329,10 @@ F 3 "" H 1750 2700 50 0001 C CNN
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L +3V3 #PWR03 L +3V3 #PWR06
U 1 1 59CF2CC4 U 1 1 59CF2CC4
P 1750 2450 P 1750 2450
F 0 "#PWR03" H 1750 2300 50 0001 C CNN F 0 "#PWR06" H 1750 2300 50 0001 C CNN
F 1 "+3V3" H 1765 2623 50 0000 C CNN F 1 "+3V3" H 1765 2623 50 0000 C CNN
F 2 "" H 1750 2450 50 0001 C CNN F 2 "" H 1750 2450 50 0001 C CNN
F 3 "" H 1750 2450 50 0001 C CNN F 3 "" H 1750 2450 50 0001 C CNN
@ -340,10 +340,10 @@ F 3 "" H 1750 2450 50 0001 C CNN
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR04 L GND #PWR010
U 1 1 59CF2CE5 U 1 1 59CF2CE5
P 1750 3350 P 1750 3350
F 0 "#PWR04" H 1750 3100 50 0001 C CNN F 0 "#PWR010" H 1750 3100 50 0001 C CNN
F 1 "GND" H 1755 3177 50 0000 C CNN F 1 "GND" H 1755 3177 50 0000 C CNN
F 2 "" H 1750 3350 50 0001 C CNN F 2 "" H 1750 3350 50 0001 C CNN
F 3 "" H 1750 3350 50 0001 C CNN F 3 "" H 1750 3350 50 0001 C CNN

View File

@ -34,7 +34,7 @@
) )
(setup (setup
(last_trace_width 0.15) (last_trace_width 0.25)
(user_trace_width 0.15) (user_trace_width 0.15)
(user_trace_width 0.4) (user_trace_width 0.4)
(trace_clearance 0.15) (trace_clearance 0.15)
@ -123,24 +123,24 @@
(net 27 /fpga/P5) (net 27 /fpga/P5)
(net 28 /fpga/P4) (net 28 /fpga/P4)
(net 29 /fpga/P17) (net 29 /fpga/P17)
(net 30 "Net-(J4-Pad6)") (net 30 "Net-(D1-Pad2)")
(net 31 "Net-(D1-Pad2)") (net 31 /fpga/TXD)
(net 32 /fpga/TXD) (net 32 /fpga/RXD)
(net 33 /fpga/RXD) (net 33 /fpga/CLK_FPGA)
(net 34 /fpga/CLK_FPGA) (net 34 /fpga/CLK_USBSER)
(net 35 /fpga/CLK_USBSER) (net 35 "Net-(U4-Pad1)")
(net 36 "Net-(U4-Pad1)") (net 36 "Net-(U3-Pad15)")
(net 37 "Net-(U3-Pad15)") (net 37 "Net-(U3-Pad14)")
(net 38 "Net-(U3-Pad14)") (net 38 "Net-(U3-Pad12)")
(net 39 "Net-(U3-Pad12)") (net 39 "Net-(U3-Pad11)")
(net 40 "Net-(U3-Pad11)") (net 40 "Net-(U3-Pad10)")
(net 41 "Net-(U3-Pad10)") (net 41 "Net-(U3-Pad9)")
(net 42 "Net-(U3-Pad9)") (net 42 /usbserial/VU)
(net 43 "Net-(R10-Pad2)") (net 43 "Net-(D3-Pad1)")
(net 44 /usbserial/VU) (net 44 "Net-(D4-Pad1)")
(net 45 "Net-(D3-Pad1)") (net 45 "Net-(J1-Pad4)")
(net 46 "Net-(D4-Pad1)") (net 46 "Net-(J2-Pad6)")
(net 47 "Net-(J1-Pad4)") (net 47 "Net-(R2-Pad2)")
(net_class Default "This is the default net class." (net_class Default "This is the default net class."
(clearance 0.15) (clearance 0.15)
@ -182,8 +182,8 @@
(add_net "Net-(D3-Pad1)") (add_net "Net-(D3-Pad1)")
(add_net "Net-(D4-Pad1)") (add_net "Net-(D4-Pad1)")
(add_net "Net-(J1-Pad4)") (add_net "Net-(J1-Pad4)")
(add_net "Net-(J4-Pad6)") (add_net "Net-(J2-Pad6)")
(add_net "Net-(R10-Pad2)") (add_net "Net-(R2-Pad2)")
(add_net "Net-(U3-Pad10)") (add_net "Net-(U3-Pad10)")
(add_net "Net-(U3-Pad11)") (add_net "Net-(U3-Pad11)")
(add_net "Net-(U3-Pad12)") (add_net "Net-(U3-Pad12)")
@ -528,7 +528,7 @@
(fp_line (start -0.2 -0.2) (end -0.2 0.2) (layer F.Fab) (width 0.1)) (fp_line (start -0.2 -0.2) (end -0.2 0.2) (layer F.Fab) (width 0.1))
(fp_line (start -1.3 -0.5) (end -1.3 0.5) (layer F.SilkS) (width 0.12)) (fp_line (start -1.3 -0.5) (end -1.3 0.5) (layer F.SilkS) (width 0.12))
(pad 1 smd rect (at -0.8 0 270) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (pad 1 smd rect (at -0.8 0 270) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask)
(net 45 "Net-(D3-Pad1)")) (net 43 "Net-(D3-Pad1)"))
(pad 2 smd rect (at 0.8 0 270) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (pad 2 smd rect (at 0.8 0 270) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask)
(net 7 +3V3)) (net 7 +3V3))
(model ${KISYS3DMOD}/LEDs.3dshapes/LED_0603.wrl (model ${KISYS3DMOD}/LEDs.3dshapes/LED_0603.wrl
@ -568,7 +568,7 @@
(pad 2 smd rect (at 0.8 0 270) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (pad 2 smd rect (at 0.8 0 270) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask)
(net 7 +3V3)) (net 7 +3V3))
(pad 1 smd rect (at -0.8 0 270) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (pad 1 smd rect (at -0.8 0 270) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask)
(net 46 "Net-(D4-Pad1)")) (net 44 "Net-(D4-Pad1)"))
(model ${KISYS3DMOD}/LEDs.3dshapes/LED_0603.wrl (model ${KISYS3DMOD}/LEDs.3dshapes/LED_0603.wrl
(at (xyz 0 0 0)) (at (xyz 0 0 0))
(scale (xyz 1 1 1)) (scale (xyz 1 1 1))
@ -581,7 +581,7 @@
(descr "Through hole straight pin header, 1x15, 2.54mm pitch, single row") (descr "Through hole straight pin header, 1x15, 2.54mm pitch, single row")
(tags "Through hole pin header THT 1x15 2.54mm single row") (tags "Through hole pin header THT 1x15 2.54mm single row")
(path /59CE819F/59CE37F9) (path /59CE819F/59CE37F9)
(fp_text reference J2 (at 0 2.33 180) (layer B.SilkS) (fp_text reference J3 (at 0 2.33 180) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror)) (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
) )
(fp_text value Conn_Left (at 0 -37.89 180) (layer B.Fab) (fp_text value Conn_Left (at 0 -37.89 180) (layer B.Fab)
@ -647,7 +647,7 @@
(descr "Through hole straight pin header, 1x15, 2.54mm pitch, single row") (descr "Through hole straight pin header, 1x15, 2.54mm pitch, single row")
(tags "Through hole pin header THT 1x15 2.54mm single row") (tags "Through hole pin header THT 1x15 2.54mm single row")
(path /59CE819F/59CE3A58) (path /59CE819F/59CE3A58)
(fp_text reference J3 (at 0 2.33 180) (layer B.SilkS) (fp_text reference J4 (at 0 2.33 180) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror)) (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
) )
(fp_text value Conn_Right (at 0 -37.89 180) (layer B.Fab) (fp_text value Conn_Right (at 0 -37.89 180) (layer B.Fab)
@ -688,7 +688,7 @@
(pad 8 thru_hole oval (at 0 -17.78 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (pad 8 thru_hole oval (at 0 -17.78 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 17 /fpga/P27)) (net 17 /fpga/P27))
(pad 7 thru_hole oval (at 0 -15.24 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (pad 7 thru_hole oval (at 0 -15.24 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 34 /fpga/CLK_FPGA)) (net 33 /fpga/CLK_FPGA))
(pad 6 thru_hole oval (at 0 -12.7 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (pad 6 thru_hole oval (at 0 -12.7 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 4 GND)) (net 4 GND))
(pad 5 thru_hole oval (at 0 -10.16 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (pad 5 thru_hole oval (at 0 -10.16 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
@ -796,7 +796,7 @@
(pad 29 smd rect (at -0.25 -2.4 45) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask) (pad 29 smd rect (at -0.25 -2.4 45) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
(net 10 /fpga/JTAG_TMS)) (net 10 /fpga/JTAG_TMS))
(pad 28 smd rect (at 0.25 -2.4 45) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask) (pad 28 smd rect (at 0.25 -2.4 45) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
(net 34 /fpga/CLK_FPGA)) (net 33 /fpga/CLK_FPGA))
(pad 27 smd rect (at 0.75 -2.4 45) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask) (pad 27 smd rect (at 0.75 -2.4 45) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
(net 17 /fpga/P27)) (net 17 /fpga/P27))
(pad 26 smd rect (at 1.25 -2.4 45) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask) (pad 26 smd rect (at 1.25 -2.4 45) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
@ -892,23 +892,23 @@
(pad 16 smd rect (at 2.7 4.445 270) (size 1.5 0.6) (layers B.Cu B.Paste B.Mask) (pad 16 smd rect (at 2.7 4.445 270) (size 1.5 0.6) (layers B.Cu B.Paste B.Mask)
(net 7 +3V3)) (net 7 +3V3))
(pad 15 smd rect (at 2.7 3.175 270) (size 1.5 0.6) (layers B.Cu B.Paste B.Mask) (pad 15 smd rect (at 2.7 3.175 270) (size 1.5 0.6) (layers B.Cu B.Paste B.Mask)
(net 37 "Net-(U3-Pad15)")) (net 36 "Net-(U3-Pad15)"))
(pad 14 smd rect (at 2.7 1.905 270) (size 1.5 0.6) (layers B.Cu B.Paste B.Mask) (pad 14 smd rect (at 2.7 1.905 270) (size 1.5 0.6) (layers B.Cu B.Paste B.Mask)
(net 38 "Net-(U3-Pad14)")) (net 37 "Net-(U3-Pad14)"))
(pad 13 smd rect (at 2.7 0.635 270) (size 1.5 0.6) (layers B.Cu B.Paste B.Mask) (pad 13 smd rect (at 2.7 0.635 270) (size 1.5 0.6) (layers B.Cu B.Paste B.Mask)
(net 13 /usbserial/DTR)) (net 13 /usbserial/DTR))
(pad 12 smd rect (at 2.7 -0.635 270) (size 1.5 0.6) (layers B.Cu B.Paste B.Mask) (pad 12 smd rect (at 2.7 -0.635 270) (size 1.5 0.6) (layers B.Cu B.Paste B.Mask)
(net 39 "Net-(U3-Pad12)")) (net 38 "Net-(U3-Pad12)"))
(pad 11 smd rect (at 2.7 -1.905 270) (size 1.5 0.6) (layers B.Cu B.Paste B.Mask) (pad 11 smd rect (at 2.7 -1.905 270) (size 1.5 0.6) (layers B.Cu B.Paste B.Mask)
(net 40 "Net-(U3-Pad11)")) (net 39 "Net-(U3-Pad11)"))
(pad 10 smd rect (at 2.7 -3.175 270) (size 1.5 0.6) (layers B.Cu B.Paste B.Mask) (pad 10 smd rect (at 2.7 -3.175 270) (size 1.5 0.6) (layers B.Cu B.Paste B.Mask)
(net 41 "Net-(U3-Pad10)")) (net 40 "Net-(U3-Pad10)"))
(pad 9 smd rect (at 2.7 -4.445 270) (size 1.5 0.6) (layers B.Cu B.Paste B.Mask) (pad 9 smd rect (at 2.7 -4.445 270) (size 1.5 0.6) (layers B.Cu B.Paste B.Mask)
(net 42 "Net-(U3-Pad9)")) (net 41 "Net-(U3-Pad9)"))
(pad 8 smd rect (at -2.7 -4.445 270) (size 1.5 0.6) (layers B.Cu B.Paste B.Mask) (pad 8 smd rect (at -2.7 -4.445 270) (size 1.5 0.6) (layers B.Cu B.Paste B.Mask)
(net 14 "Net-(U3-Pad8)")) (net 14 "Net-(U3-Pad8)"))
(pad 7 smd rect (at -2.7 -3.175 270) (size 1.5 0.6) (layers B.Cu B.Paste B.Mask) (pad 7 smd rect (at -2.7 -3.175 270) (size 1.5 0.6) (layers B.Cu B.Paste B.Mask)
(net 35 /fpga/CLK_USBSER)) (net 34 /fpga/CLK_USBSER))
(pad 6 smd rect (at -2.7 -1.905 270) (size 1.5 0.6) (layers B.Cu B.Paste B.Mask) (pad 6 smd rect (at -2.7 -1.905 270) (size 1.5 0.6) (layers B.Cu B.Paste B.Mask)
(net 15 /usbserial/USB-)) (net 15 /usbserial/USB-))
(pad 5 smd rect (at -2.7 -0.635 270) (size 1.5 0.6) (layers B.Cu B.Paste B.Mask) (pad 5 smd rect (at -2.7 -0.635 270) (size 1.5 0.6) (layers B.Cu B.Paste B.Mask)
@ -916,9 +916,9 @@
(pad 4 smd rect (at -2.7 0.635 270) (size 1.5 0.6) (layers B.Cu B.Paste B.Mask) (pad 4 smd rect (at -2.7 0.635 270) (size 1.5 0.6) (layers B.Cu B.Paste B.Mask)
(net 7 +3V3)) (net 7 +3V3))
(pad 3 smd rect (at -2.7 1.905 270) (size 1.5 0.6) (layers B.Cu B.Paste B.Mask) (pad 3 smd rect (at -2.7 1.905 270) (size 1.5 0.6) (layers B.Cu B.Paste B.Mask)
(net 33 /fpga/RXD)) (net 32 /fpga/RXD))
(pad 2 smd rect (at -2.7 3.175 270) (size 1.5 0.6) (layers B.Cu B.Paste B.Mask) (pad 2 smd rect (at -2.7 3.175 270) (size 1.5 0.6) (layers B.Cu B.Paste B.Mask)
(net 32 /fpga/TXD)) (net 31 /fpga/TXD))
(pad 1 smd rect (at -2.7 4.445 270) (size 1.5 0.6) (layers B.Cu B.Paste B.Mask) (pad 1 smd rect (at -2.7 4.445 270) (size 1.5 0.6) (layers B.Cu B.Paste B.Mask)
(net 4 GND)) (net 4 GND))
(model ${KISYS3DMOD}/Housings_SOIC.3dshapes/SOIC-16_3.9x9.9mm_Pitch1.27mm.wrl (model ${KISYS3DMOD}/Housings_SOIC.3dshapes/SOIC-16_3.9x9.9mm_Pitch1.27mm.wrl
@ -933,7 +933,7 @@
(descr "Through hole straight pin header, 2x04, 2.54mm pitch, double rows") (descr "Through hole straight pin header, 2x04, 2.54mm pitch, double rows")
(tags "Through hole pin header THT 2x04 2.54mm double row") (tags "Through hole pin header THT 2x04 2.54mm double row")
(path /59CE819F/59CE71D1) (path /59CE819F/59CE71D1)
(fp_text reference J4 (at 2.921 -2.413 180) (layer F.SilkS) (fp_text reference J2 (at 2.921 -2.413 180) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15))) (effects (font (size 1 1) (thickness 0.15)))
) )
(fp_text value JTAG (at 1.27 9.95 90) (layer F.Fab) (fp_text value JTAG (at 1.27 9.95 90) (layer F.Fab)
@ -964,7 +964,7 @@
(pad 7 thru_hole oval (at 0 7.62 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (pad 7 thru_hole oval (at 0 7.62 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 10 /fpga/JTAG_TMS)) (net 10 /fpga/JTAG_TMS))
(pad 6 thru_hole oval (at 2.54 5.08 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (pad 6 thru_hole oval (at 2.54 5.08 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 30 "Net-(J4-Pad6)")) (net 46 "Net-(J2-Pad6)"))
(pad 5 thru_hole oval (at 0 5.08 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (pad 5 thru_hole oval (at 0 5.08 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 9 /fpga/JTAG_TCK)) (net 9 /fpga/JTAG_TCK))
(pad 4 thru_hole oval (at 2.54 2.54 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (pad 4 thru_hole oval (at 2.54 2.54 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
@ -988,7 +988,7 @@
(tags "capacitor 0805") (tags "capacitor 0805")
(path /59CE0A28/59CE0E72) (path /59CE0A28/59CE0E72)
(attr smd) (attr smd)
(fp_text reference C1 (at 0 -1.524) (layer B.SilkS) (fp_text reference C5 (at 0 -1.524) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror)) (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
) )
(fp_text value 1u (at 0 -1.75) (layer B.Fab) (fp_text value 1u (at 0 -1.75) (layer B.Fab)
@ -1024,7 +1024,7 @@
(tags "capacitor 0603") (tags "capacitor 0603")
(path /59CE0A28/59CE0D8D) (path /59CE0A28/59CE0D8D)
(attr smd) (attr smd)
(fp_text reference C2 (at 2.147 0 270) (layer B.SilkS) (fp_text reference C6 (at 2.147 0 270) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror)) (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
) )
(fp_text value 100n (at 0 -1.5 270) (layer B.Fab) (fp_text value 100n (at 0 -1.5 270) (layer B.Fab)
@ -1060,7 +1060,7 @@
(tags "capacitor 0603") (tags "capacitor 0603")
(path /59CE0A28/59CE1081) (path /59CE0A28/59CE1081)
(attr smd) (attr smd)
(fp_text reference C3 (at -2.552 0.127 90) (layer B.SilkS) (fp_text reference C7 (at -2.552 0.127 90) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror)) (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
) )
(fp_text value 100n (at 0 -1.5 90) (layer B.Fab) (fp_text value 100n (at 0 -1.5 90) (layer B.Fab)
@ -1096,7 +1096,7 @@
(tags "capacitor 0603") (tags "capacitor 0603")
(path /59CE0A28/59CE1FC1) (path /59CE0A28/59CE1FC1)
(attr smd) (attr smd)
(fp_text reference C4 (at 2.514472 0 315) (layer B.SilkS) (fp_text reference C1 (at 2.514472 0 315) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror)) (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
) )
(fp_text value 10n (at 0 -1.5 315) (layer B.Fab) (fp_text value 10n (at 0 -1.5 315) (layer B.Fab)
@ -1132,7 +1132,7 @@
(tags "capacitor 0603") (tags "capacitor 0603")
(path /59CE0A28/59CE2F41) (path /59CE0A28/59CE2F41)
(attr smd) (attr smd)
(fp_text reference C5 (at 0.035921 1.436841 315) (layer B.SilkS) (fp_text reference C2 (at 0.035921 1.436841 315) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror)) (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
) )
(fp_text value 100n (at 0 -1.5 315) (layer B.Fab) (fp_text value 100n (at 0 -1.5 315) (layer B.Fab)
@ -1168,7 +1168,7 @@
(tags "capacitor 0603") (tags "capacitor 0603")
(path /59CE0A28/59CE300F) (path /59CE0A28/59CE300F)
(attr smd) (attr smd)
(fp_text reference C6 (at -2.424669 -0.089803 135) (layer B.SilkS) (fp_text reference C3 (at -2.424669 -0.089803 135) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror)) (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
) )
(fp_text value 10n (at 0 -1.5 135) (layer B.Fab) (fp_text value 10n (at 0 -1.5 135) (layer B.Fab)
@ -1204,7 +1204,7 @@
(tags "capacitor 0603") (tags "capacitor 0603")
(path /59CE0A28/59CE303F) (path /59CE0A28/59CE303F)
(attr smd) (attr smd)
(fp_text reference C7 (at 2.424669 -0.089803 135) (layer B.SilkS) (fp_text reference C4 (at 2.424669 -0.089803 135) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror)) (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
) )
(fp_text value 100n (at 0 -1.5 135) (layer B.Fab) (fp_text value 100n (at 0 -1.5 135) (layer B.Fab)
@ -1556,13 +1556,13 @@
(pad 5 smd rect (at 2.8 1.6 90) (size 2.3 0.5) (layers F.Cu F.Paste F.Mask) (pad 5 smd rect (at 2.8 1.6 90) (size 2.3 0.5) (layers F.Cu F.Paste F.Mask)
(net 4 GND)) (net 4 GND))
(pad 4 smd rect (at 2.8 0.8 90) (size 2.3 0.5) (layers F.Cu F.Paste F.Mask) (pad 4 smd rect (at 2.8 0.8 90) (size 2.3 0.5) (layers F.Cu F.Paste F.Mask)
(net 47 "Net-(J1-Pad4)")) (net 45 "Net-(J1-Pad4)"))
(pad 3 smd rect (at 2.8 0 90) (size 2.3 0.5) (layers F.Cu F.Paste F.Mask) (pad 3 smd rect (at 2.8 0 90) (size 2.3 0.5) (layers F.Cu F.Paste F.Mask)
(net 16 /usbserial/USB+)) (net 16 /usbserial/USB+))
(pad 2 smd rect (at 2.8 -0.8 90) (size 2.3 0.5) (layers F.Cu F.Paste F.Mask) (pad 2 smd rect (at 2.8 -0.8 90) (size 2.3 0.5) (layers F.Cu F.Paste F.Mask)
(net 15 /usbserial/USB-)) (net 15 /usbserial/USB-))
(pad 1 smd rect (at 2.8 -1.6 90) (size 2.3 0.5) (layers F.Cu F.Paste F.Mask) (pad 1 smd rect (at 2.8 -1.6 90) (size 2.3 0.5) (layers F.Cu F.Paste F.Mask)
(net 44 /usbserial/VU)) (net 42 /usbserial/VU))
(model ${KISYS3DMOD}/smd.shapes3d/USB_JACK.x3d (model ${KISYS3DMOD}/smd.shapes3d/USB_JACK.x3d
(at (xyz -0.02362204724409449 0 0)) (at (xyz -0.02362204724409449 0 0))
(scale (xyz 1 1 1)) (scale (xyz 1 1 1))
@ -1576,7 +1576,7 @@
(tags "resistor 0603") (tags "resistor 0603")
(path /59CE819F/59CEC5BE) (path /59CE819F/59CEC5BE)
(attr smd) (attr smd)
(fp_text reference R3 (at 0 -1.436841 45) (layer B.SilkS) (fp_text reference R9 (at 0 -1.436841 45) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror)) (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
) )
(fp_text value DNP (at 0 -1.5 45) (layer B.Fab) (fp_text value DNP (at 0 -1.5 45) (layer B.Fab)
@ -1612,7 +1612,7 @@
(tags "resistor 0603") (tags "resistor 0603")
(path /59CE819F/59CE5A45) (path /59CE819F/59CE5A45)
(attr smd) (attr smd)
(fp_text reference R4 (at -2.159 0.4445 90) (layer F.SilkS) (fp_text reference R6 (at -2.159 0.4445 90) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15))) (effects (font (size 1 1) (thickness 0.15)))
) )
(fp_text value 1k (at 0 1.5 90) (layer F.Fab) (fp_text value 1k (at 0 1.5 90) (layer F.Fab)
@ -1632,7 +1632,7 @@
(effects (font (size 0.4 0.4) (thickness 0.075))) (effects (font (size 0.4 0.4) (thickness 0.075)))
) )
(pad 2 smd rect (at 0.75 0 90) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask) (pad 2 smd rect (at 0.75 0 90) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask)
(net 32 /fpga/TXD)) (net 31 /fpga/TXD))
(pad 1 smd rect (at -0.75 0 90) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask) (pad 1 smd rect (at -0.75 0 90) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask)
(net 1 /fpga/TX)) (net 1 /fpga/TX))
(model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0603.wrl (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0603.wrl
@ -1648,7 +1648,7 @@
(tags "resistor 0603") (tags "resistor 0603")
(path /59CE819F/59CE5D31) (path /59CE819F/59CE5D31)
(attr smd) (attr smd)
(fp_text reference R5 (at -2.2225 -0.1905 90) (layer F.SilkS) (fp_text reference R7 (at -2.2225 -0.1905 90) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15))) (effects (font (size 1 1) (thickness 0.15)))
) )
(fp_text value 1k (at 0 1.5 90) (layer F.Fab) (fp_text value 1k (at 0 1.5 90) (layer F.Fab)
@ -1668,7 +1668,7 @@
(effects (font (size 0.4 0.4) (thickness 0.075))) (effects (font (size 0.4 0.4) (thickness 0.075)))
) )
(pad 2 smd rect (at 0.75 0 90) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask) (pad 2 smd rect (at 0.75 0 90) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask)
(net 33 /fpga/RXD)) (net 32 /fpga/RXD))
(pad 1 smd rect (at -0.75 0 90) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask) (pad 1 smd rect (at -0.75 0 90) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask)
(net 2 /fpga/RX)) (net 2 /fpga/RX))
(model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0603.wrl (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0603.wrl
@ -1684,7 +1684,7 @@
(tags "resistor 0603") (tags "resistor 0603")
(path /59CE819F/59CE5D67) (path /59CE819F/59CE5D67)
(attr smd) (attr smd)
(fp_text reference R6 (at 0 -1.45 180) (layer F.SilkS) (fp_text reference R8 (at 0 -1.45 180) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15))) (effects (font (size 1 1) (thickness 0.15)))
) )
(fp_text value 1k (at 0 1.5 180) (layer F.Fab) (fp_text value 1k (at 0 1.5 180) (layer F.Fab)
@ -1720,7 +1720,7 @@
(tags "resistor 0603") (tags "resistor 0603")
(path /59CE819F/59CEBC90) (path /59CE819F/59CEBC90)
(attr smd) (attr smd)
(fp_text reference R7 (at 2.159 -0.127 270) (layer F.SilkS) (fp_text reference R4 (at 2.159 -0.127 270) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15))) (effects (font (size 1 1) (thickness 0.15)))
) )
(fp_text value 1k (at 0 1.5 270) (layer F.Fab) (fp_text value 1k (at 0 1.5 270) (layer F.Fab)
@ -1742,7 +1742,7 @@
(pad 2 smd rect (at 0.75 0 270) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask) (pad 2 smd rect (at 0.75 0 270) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask)
(net 1 /fpga/TX)) (net 1 /fpga/TX))
(pad 1 smd rect (at -0.75 0 270) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask) (pad 1 smd rect (at -0.75 0 270) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask)
(net 45 "Net-(D3-Pad1)")) (net 43 "Net-(D3-Pad1)"))
(model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0603.wrl (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0603.wrl
(at (xyz 0 0 0)) (at (xyz 0 0 0))
(scale (xyz 1 1 1)) (scale (xyz 1 1 1))
@ -1756,7 +1756,7 @@
(tags "resistor 0603") (tags "resistor 0603")
(path /59CE819F/59CEBBCC) (path /59CE819F/59CEBBCC)
(attr smd) (attr smd)
(fp_text reference R8 (at 0.0635 -0.0635 270) (layer F.SilkS) hide (fp_text reference R5 (at 0.0635 -0.0635 270) (layer F.SilkS) hide
(effects (font (size 1 1) (thickness 0.15))) (effects (font (size 1 1) (thickness 0.15)))
) )
(fp_text value 1k (at 0 1.5 270) (layer F.Fab) (fp_text value 1k (at 0 1.5 270) (layer F.Fab)
@ -1778,7 +1778,7 @@
(pad 2 smd rect (at 0.75 0 270) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask) (pad 2 smd rect (at 0.75 0 270) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask)
(net 2 /fpga/RX)) (net 2 /fpga/RX))
(pad 1 smd rect (at -0.75 0 270) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask) (pad 1 smd rect (at -0.75 0 270) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask)
(net 46 "Net-(D4-Pad1)")) (net 44 "Net-(D4-Pad1)"))
(model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0603.wrl (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0603.wrl
(at (xyz 0 0 0)) (at (xyz 0 0 0))
(scale (xyz 1 1 1)) (scale (xyz 1 1 1))
@ -1792,7 +1792,7 @@
(tags "resistor 0603") (tags "resistor 0603")
(path /59CE819F/59CEA10C) (path /59CE819F/59CEA10C)
(attr smd) (attr smd)
(fp_text reference R9 (at 0 -1.524 180) (layer B.SilkS) (fp_text reference R2 (at 0 -1.524 180) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror)) (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
) )
(fp_text value 33 (at 0 -1.5 180) (layer B.Fab) (fp_text value 33 (at 0 -1.5 180) (layer B.Fab)
@ -1812,9 +1812,9 @@
(fp_line (start 1.25 -0.7) (end 1.25 0.7) (layer B.CrtYd) (width 0.05)) (fp_line (start 1.25 -0.7) (end 1.25 0.7) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.25 -0.7) (end -1.25 -0.7) (layer B.CrtYd) (width 0.05)) (fp_line (start 1.25 -0.7) (end -1.25 -0.7) (layer B.CrtYd) (width 0.05))
(pad 1 smd rect (at -0.75 0 180) (size 0.5 0.9) (layers B.Cu B.Paste B.Mask) (pad 1 smd rect (at -0.75 0 180) (size 0.5 0.9) (layers B.Cu B.Paste B.Mask)
(net 34 /fpga/CLK_FPGA)) (net 33 /fpga/CLK_FPGA))
(pad 2 smd rect (at 0.75 0 180) (size 0.5 0.9) (layers B.Cu B.Paste B.Mask) (pad 2 smd rect (at 0.75 0 180) (size 0.5 0.9) (layers B.Cu B.Paste B.Mask)
(net 43 "Net-(R10-Pad2)")) (net 47 "Net-(R2-Pad2)"))
(model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0603.wrl (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0603.wrl
(at (xyz 0 0 0)) (at (xyz 0 0 0))
(scale (xyz 1 1 1)) (scale (xyz 1 1 1))
@ -1828,7 +1828,7 @@
(tags "resistor 0603") (tags "resistor 0603")
(path /59CE819F/59CEA1C2) (path /59CE819F/59CEA1C2)
(attr smd) (attr smd)
(fp_text reference R10 (at 0 -1.397 90) (layer B.SilkS) (fp_text reference R3 (at 0 -1.397 90) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror)) (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
) )
(fp_text value 33 (at 0 -1.5 90) (layer B.Fab) (fp_text value 33 (at 0 -1.5 90) (layer B.Fab)
@ -1848,9 +1848,9 @@
(effects (font (size 0.4 0.4) (thickness 0.075)) (justify mirror)) (effects (font (size 0.4 0.4) (thickness 0.075)) (justify mirror))
) )
(pad 2 smd rect (at 0.75 0 90) (size 0.5 0.9) (layers B.Cu B.Paste B.Mask) (pad 2 smd rect (at 0.75 0 90) (size 0.5 0.9) (layers B.Cu B.Paste B.Mask)
(net 43 "Net-(R10-Pad2)")) (net 47 "Net-(R2-Pad2)"))
(pad 1 smd rect (at -0.75 0 90) (size 0.5 0.9) (layers B.Cu B.Paste B.Mask) (pad 1 smd rect (at -0.75 0 90) (size 0.5 0.9) (layers B.Cu B.Paste B.Mask)
(net 35 /fpga/CLK_USBSER)) (net 34 /fpga/CLK_USBSER))
(model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0603.wrl (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0603.wrl
(at (xyz 0 0 0)) (at (xyz 0 0 0))
(scale (xyz 1 1 1)) (scale (xyz 1 1 1))
@ -1891,7 +1891,7 @@
(effects (font (size 1 1) (thickness 0.15)) (justify mirror)) (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
) )
(pad 2 smd rect (at 1.05 0 270) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask) (pad 2 smd rect (at 1.05 0 270) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask)
(net 44 /usbserial/VU)) (net 42 /usbserial/VU))
(pad 1 smd rect (at -1.05 0 270) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask) (pad 1 smd rect (at -1.05 0 270) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask)
(net 5 VBUS)) (net 5 VBUS))
(model ${KISYS3DMOD}/Diodes_SMD.3dshapes/D_0805.wrl (model ${KISYS3DMOD}/Diodes_SMD.3dshapes/D_0805.wrl
@ -1931,7 +1931,7 @@
(pad 1 smd rect (at -0.8 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (pad 1 smd rect (at -0.8 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask)
(net 4 GND)) (net 4 GND))
(pad 2 smd rect (at 0.8 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) (pad 2 smd rect (at 0.8 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask)
(net 31 "Net-(D1-Pad2)")) (net 30 "Net-(D1-Pad2)"))
(model ${KISYS3DMOD}/LEDs.3dshapes/LED_0603.wrl (model ${KISYS3DMOD}/LEDs.3dshapes/LED_0603.wrl
(at (xyz 0 0 0)) (at (xyz 0 0 0))
(scale (xyz 1 1 1)) (scale (xyz 1 1 1))
@ -1965,7 +1965,7 @@
(effects (font (size 0.4 0.4) (thickness 0.075))) (effects (font (size 0.4 0.4) (thickness 0.075)))
) )
(pad 2 smd rect (at 0.75 0 90) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask) (pad 2 smd rect (at 0.75 0 90) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask)
(net 31 "Net-(D1-Pad2)")) (net 30 "Net-(D1-Pad2)"))
(pad 1 smd rect (at -0.75 0 90) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask) (pad 1 smd rect (at -0.75 0 90) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask)
(net 7 +3V3)) (net 7 +3V3))
(model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0603.wrl (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0603.wrl
@ -2010,11 +2010,11 @@
(pad 4 smd rect (at -2.5 2.1) (size 2 2) (layers B.Cu B.Paste B.Mask) (pad 4 smd rect (at -2.5 2.1) (size 2 2) (layers B.Cu B.Paste B.Mask)
(net 7 +3V3)) (net 7 +3V3))
(pad 3 smd rect (at 2.5 2.1) (size 2 2) (layers B.Cu B.Paste B.Mask) (pad 3 smd rect (at 2.5 2.1) (size 2 2) (layers B.Cu B.Paste B.Mask)
(net 43 "Net-(R10-Pad2)")) (net 47 "Net-(R2-Pad2)"))
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@ -2435,19 +2435,19 @@
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View File

@ -80,10 +80,10 @@ F 3 "" H 1700 1100 50 0001 C CNN
-1 0 0 1 -1 0 0 1
$EndComp $EndComp
$Comp $Comp
L GND #PWR011 L GND #PWR013
U 1 1 59CE582B U 1 1 59CE582B
P 1100 1850 P 1100 1850
F 0 "#PWR011" H 1100 1600 50 0001 C CNN F 0 "#PWR013" H 1100 1600 50 0001 C CNN
F 1 "GND" H 1105 1677 50 0000 C CNN F 1 "GND" H 1105 1677 50 0000 C CNN
F 2 "" H 1100 1850 50 0001 C CNN F 2 "" H 1100 1850 50 0001 C CNN
F 3 "" H 1100 1850 50 0001 C CNN F 3 "" H 1100 1850 50 0001 C CNN
@ -91,10 +91,10 @@ F 3 "" H 1100 1850 50 0001 C CNN
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L VBUS #PWR012 L VBUS #PWR011
U 1 1 59CE5831 U 1 1 59CE5831
P 1950 1000 P 1950 1000
F 0 "#PWR012" H 1950 850 50 0001 C CNN F 0 "#PWR011" H 1950 850 50 0001 C CNN
F 1 "VBUS" H 1965 1173 50 0000 C CNN F 1 "VBUS" H 1965 1173 50 0000 C CNN
F 2 "" H 1950 1000 50 0001 C CNN F 2 "" H 1950 1000 50 0001 C CNN
F 3 "" H 1950 1000 50 0001 C CNN F 3 "" H 1950 1000 50 0001 C CNN
@ -128,10 +128,10 @@ F 3 "" H 3850 2400 50 0001 C CNN
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L +3V3 #PWR013 L +3V3 #PWR012
U 1 1 59CE5E77 U 1 1 59CE5E77
P 3700 1700 P 3700 1700
F 0 "#PWR013" H 3700 1550 50 0001 C CNN F 0 "#PWR012" H 3700 1550 50 0001 C CNN
F 1 "+3V3" H 3715 1873 50 0000 C CNN F 1 "+3V3" H 3715 1873 50 0000 C CNN
F 2 "" H 3700 1700 50 0001 C CNN F 2 "" H 3700 1700 50 0001 C CNN
F 3 "" H 3700 1700 50 0001 C CNN F 3 "" H 3700 1700 50 0001 C CNN