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2 Commits
782eda2603 ... 99b33a19a6

Author SHA1 Message Date
Markus Koch
99b33a19a6 Design schematic and layout 2017-09-29 22:56:25 +02:00
Markus Koch
bc1285ff6e Update submodule 2017-09-29 22:53:27 +02:00
7 changed files with 4893 additions and 5 deletions
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@ -0,0 +1,945 @@
EESchema Schematic File Version 3
LIBS:power
LIBS:device
LIBS:transistors
LIBS:conn
LIBS:linear
LIBS:regul
LIBS:74xx
LIBS:cmos4000
LIBS:adc-dac
LIBS:memory
LIBS:xilinx
LIBS:microcontrollers
LIBS:dsp
LIBS:microchip
LIBS:analog_switches
LIBS:motorola
LIBS:texas
LIBS:intel
LIBS:audio
LIBS:interface
LIBS:digital-audio
LIBS:philips
LIBS:display
LIBS:cypress
LIBS:siliconi
LIBS:opto
LIBS:atmel
LIBS:contrib
LIBS:valves
LIBS:lattice
LIBS:usbserial
LIBS:clock
LIBS:tiny-xo2-cache
EELAYER 26 0
EELAYER END
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10750 1100 10750 1250
Connection ~ 10350 1650
Wire Wire Line
10350 1550 10350 1750
Wire Wire Line
9950 1650 9950 1550
Wire Wire Line
9950 1650 10750 1650
Wire Wire Line
10750 1650 10750 1550
Wire Notes Line
8350 2000 8350 700
Wire Notes Line
9650 2000 8350 2000
Wire Notes Line
9650 700 9650 2000
Wire Notes Line
8350 700 9650 700
Connection ~ 8950 1100
Wire Wire Line
8950 1000 8950 1250
Wire Wire Line
8550 1100 8550 1250
Wire Wire Line
8550 1100 9350 1100
Wire Wire Line
9350 1100 9350 1250
Connection ~ 8950 1650
Wire Wire Line
8950 1550 8950 1750
Wire Wire Line
8550 1650 8550 1550
Wire Wire Line
8550 1650 9350 1650
Wire Wire Line
9350 1650 9350 1550
Connection ~ 8650 3750
Wire Wire Line
8550 3450 8550 3750
Wire Wire Line
8750 3450 8650 3450
Wire Wire Line
8550 3750 8750 3750
Connection ~ 8650 5550
Wire Wire Line
8650 5450 8750 5450
Wire Wire Line
8500 5550 8750 5550
Wire Wire Line
8650 5450 8650 5850
Wire Wire Line
8650 5850 8750 5850
Wire Wire Line
3050 1450 2950 1450
Wire Wire Line
2950 1250 3100 1250
Connection ~ 2550 1350
Wire Wire Line
2550 1450 2650 1450
Wire Wire Line
2550 1250 2650 1250
Wire Wire Line
2550 1250 2550 1450
Wire Wire Line
2450 1350 2550 1350
Connection ~ 8650 3450
Wire Wire Line
8650 3350 8750 3350
Wire Wire Line
8650 3350 8650 3750
Connection ~ 950 1150
Connection ~ 950 1550
Wire Wire Line
950 1450 950 1650
Wire Wire Line
1050 1550 950 1550
Wire Wire Line
950 1050 950 1250
Wire Wire Line
1050 1150 950 1150
$Comp
L +3V3 #PWR?
U 1 1 59D137AE
P 5450 3550
F 0 "#PWR?" H 5450 3400 50 0001 C CNN
F 1 "+3V3" H 5465 3723 50 0000 C CNN
F 2 "" H 5450 3550 50 0001 C CNN
F 3 "" H 5450 3550 50 0001 C CNN
1 5450 3550
1 0 0 -1
$EndComp
Wire Wire Line
5450 3600 5450 3550
$Comp
L GND #PWR?
U 1 1 59D138A1
P 5450 4250
F 0 "#PWR?" H 5450 4000 50 0001 C CNN
F 1 "GND" H 5455 4077 50 0000 C CNN
F 2 "" H 5450 4250 50 0001 C CNN
F 3 "" H 5450 4250 50 0001 C CNN
1 5450 4250
1 0 0 -1
$EndComp
Wire Wire Line
5450 3700 5450 4250
Wire Wire Line
5450 4100 5450 4150
Connection ~ 5450 4150
$EndSCHEMATC

2
kicad-libs

@ -1 +1 @@
Subproject commit 5ed6e2bb51ca0ab9046b6b5595218d028cfcd84b Subproject commit e517b6e0b0302f57f45782b8d06249025033467d

359
power.sch Normal file
View File

@ -0,0 +1,359 @@
EESchema Schematic File Version 3
LIBS:power
LIBS:device
LIBS:transistors
LIBS:conn
LIBS:linear
LIBS:regul
LIBS:74xx
LIBS:cmos4000
LIBS:adc-dac
LIBS:memory
LIBS:xilinx
LIBS:microcontrollers
LIBS:dsp
LIBS:microchip
LIBS:analog_switches
LIBS:motorola
LIBS:texas
LIBS:intel
LIBS:audio
LIBS:interface
LIBS:digital-audio
LIBS:philips
LIBS:display
LIBS:cypress
LIBS:siliconi
LIBS:opto
LIBS:atmel
LIBS:contrib
LIBS:valves
LIBS:lattice
LIBS:usbserial
LIBS:clock
LIBS:tiny-xo2-cache
EELAYER 26 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
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Rev ""
Comp ""
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Comment2 ""
Comment3 ""
Comment4 ""
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L AP1117-33 U1
U 1 1 59CE0B45
P 1750 1200
F 0 "U1" H 1750 1442 50 0000 C CNN
F 1 "AP1117-33" H 1750 1351 50 0000 C CNN
F 2 "TO_SOT_Packages_SMD:SOT-223-3Lead_TabPin2" H 1750 1400 50 0001 C CNN
F 3 "" H 1850 950 50 0001 C CNN
1 1750 1200
1 0 0 -1
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L C_Small C2
U 1 1 59CE0D8D
P 1300 1400
F 0 "C2" H 1392 1446 50 0000 L CNN
F 1 "100n" H 1392 1355 50 0000 L CNN
F 2 "Capacitors_SMD:C_0603" H 1300 1400 50 0001 C CNN
F 3 "" H 1300 1400 50 0001 C CNN
1 1300 1400
1 0 0 -1
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$Comp
L CP_Small C1
U 1 1 59CE0E72
P 1100 1400
F 0 "C1" H 1187 1446 50 0000 L CNN
F 1 "1u" H 1187 1355 50 0000 L CNN
F 2 "Capacitors_SMD:C_0805" H 1100 1400 50 0001 C CNN
F 3 "" H 1100 1400 50 0001 C CNN
1 1100 1400
-1 0 0 -1
$EndComp
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L C_Small C3
U 1 1 59CE1081
P 2200 1400
F 0 "C3" H 2108 1354 50 0000 R CNN
F 1 "100n" H 2108 1445 50 0000 R CNN
F 2 "Capacitors_SMD:C_0603" H 2200 1400 50 0001 C CNN
F 3 "" H 2200 1400 50 0001 C CNN
1 2200 1400
1 0 0 1
$EndComp
$Comp
L GND #PWR02
U 1 1 59CE11F3
P 1750 1700
F 0 "#PWR02" H 1750 1450 50 0001 C CNN
F 1 "GND" H 1755 1527 50 0000 C CNN
F 2 "" H 1750 1700 50 0001 C CNN
F 3 "" H 1750 1700 50 0001 C CNN
1 1750 1700
1 0 0 -1
$EndComp
$Comp
L +3V3 #PWR05
U 1 1 59CE142B
P 2200 1100
F 0 "#PWR05" H 2200 950 50 0001 C CNN
F 1 "+3V3" H 2215 1273 50 0000 C CNN
F 2 "" H 2200 1100 50 0001 C CNN
F 3 "" H 2200 1100 50 0001 C CNN
1 2200 1100
1 0 0 -1
$EndComp
$Comp
L VBUS #PWR01
U 1 1 59CE157B
P 1200 1150
F 0 "#PWR01" H 1200 1000 50 0001 C CNN
F 1 "VBUS" H 1215 1323 50 0000 C CNN
F 2 "" H 1200 1150 50 0001 C CNN
F 3 "" H 1200 1150 50 0001 C CNN
1 1200 1150
1 0 0 -1
$EndComp
$Comp
L LCMXO2-1200HC-4SG32C U2
U 1 1 59CE1D8D
P 3700 2200
F 0 "U2" H 4100 2387 60 0000 C CNN
F 1 "LCMXO2-1200HC-4SG32C" H 4100 2281 60 0000 C CNN
F 2 "Housings_DFN_QFN:QFN-32-1EP_5x5mm_Pitch0.5mm" H 3950 1500 60 0001 C CNN
F 3 "" H 3950 1500 60 0001 C CNN
1 3700 2200
1 0 0 -1
$EndComp
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L C_Small C4
U 1 1 59CE1FC1
P 3600 1350
F 0 "C4" H 3500 1300 50 0000 R CNN
F 1 "10n" H 3600 1400 50 0000 R CNN
F 2 "Capacitors_SMD:C_0603" H 3600 1350 50 0001 C CNN
F 3 "" H 3600 1350 50 0001 C CNN
1 3600 1350
1 0 0 1
$EndComp
$Comp
L GND #PWR010
U 1 1 59CE28E2
P 4800 2750
F 0 "#PWR010" H 4800 2500 50 0001 C CNN
F 1 "GND" H 4805 2577 50 0000 C CNN
F 2 "" H 4800 2750 50 0001 C CNN
F 3 "" H 4800 2750 50 0001 C CNN
1 4800 2750
1 0 0 -1
$EndComp
$Comp
L +3V3 #PWR06
U 1 1 59CE2901
P 3400 2300
F 0 "#PWR06" H 3400 2150 50 0001 C CNN
F 1 "+3V3" H 3400 2450 50 0000 C CNN
F 2 "" H 3400 2300 50 0001 C CNN
F 3 "" H 3400 2300 50 0001 C CNN
1 3400 2300
1 0 0 -1
$EndComp
$Comp
L C_Small C5
U 1 1 59CE2F41
P 3900 1350
F 0 "C5" H 3800 1300 50 0000 R CNN
F 1 "100n" H 3900 1400 50 0000 R CNN
F 2 "Capacitors_SMD:C_0603" H 3900 1350 50 0001 C CNN
F 3 "" H 3900 1350 50 0001 C CNN
1 3900 1350
1 0 0 1
$EndComp
$Comp
L C_Small C6
U 1 1 59CE300F
P 4200 1350
F 0 "C6" H 4100 1300 50 0000 R CNN
F 1 "10n" H 4200 1400 50 0000 R CNN
F 2 "Capacitors_SMD:C_0603" H 4200 1350 50 0001 C CNN
F 3 "" H 4200 1350 50 0001 C CNN
1 4200 1350
1 0 0 1
$EndComp
$Comp
L C_Small C7
U 1 1 59CE303F
P 4500 1350
F 0 "C7" H 4400 1300 50 0000 R CNN
F 1 "100n" H 4500 1400 50 0000 R CNN
F 2 "Capacitors_SMD:C_0603" H 4500 1350 50 0001 C CNN
F 3 "" H 4500 1350 50 0001 C CNN
1 4500 1350
1 0 0 1
$EndComp
Wire Wire Line
1100 1300 1300 1300
Wire Wire Line
1100 1500 1300 1500
Wire Wire Line
1200 1150 1200 1300
Connection ~ 1200 1300
Wire Wire Line
1200 1500 1200 1600
Wire Wire Line
1200 1600 2200 1600
Wire Wire Line
1750 1500 1750 1700
Connection ~ 1200 1500
Wire Wire Line
2200 1100 2200 1300
Wire Wire Line
2200 1200 2050 1200
Wire Wire Line
2200 1600 2200 1500
Connection ~ 1750 1600
Connection ~ 2200 1200
Wire Wire Line
1200 1200 1450 1200
Connection ~ 1200 1200
Wire Wire Line
3400 2500 3500 2500
Wire Wire Line
3400 2300 3400 2500
Wire Wire Line
3400 2400 3500 2400
Connection ~ 3400 2400
Wire Wire Line
4700 2400 4800 2400
Wire Wire Line
4800 2400 4800 2750
Wire Wire Line
4800 2500 4700 2500
Connection ~ 4800 2500
Wire Wire Line
4500 1550 4500 1450
Wire Wire Line
3600 1550 4500 1550
Wire Wire Line
3600 1550 3600 1450
Wire Wire Line
3900 1450 3900 1550
Connection ~ 3900 1550
Wire Wire Line
4200 1450 4200 1550
Connection ~ 4200 1550
Wire Wire Line
4500 1150 4500 1250
Wire Wire Line
3600 1150 4500 1150
Wire Wire Line
3600 1150 3600 1250
Wire Wire Line
3900 1250 3900 1150
Connection ~ 3900 1150
Wire Wire Line
4200 1250 4200 1150
Connection ~ 4200 1150
Wire Wire Line
4050 1550 4050 1650
Connection ~ 4050 1550
Wire Wire Line
4050 1150 4050 1050
Connection ~ 4050 1150
$Comp
L +3V3 #PWR08
U 1 1 59CE365D
P 4050 1050
F 0 "#PWR08" H 4050 900 50 0001 C CNN
F 1 "+3V3" H 4050 1200 50 0000 C CNN
F 2 "" H 4050 1050 50 0001 C CNN
F 3 "" H 4050 1050 50 0001 C CNN
1 4050 1050
1 0 0 -1
$EndComp
$Comp
L GND #PWR09
U 1 1 59CE3680
P 4050 1650
F 0 "#PWR09" H 4050 1400 50 0001 C CNN
F 1 "GND" H 4055 1477 50 0000 C CNN
F 2 "" H 4050 1650 50 0001 C CNN
F 3 "" H 4050 1650 50 0001 C CNN
1 4050 1650
1 0 0 -1
$EndComp
Wire Wire Line
3500 2650 3400 2650
Wire Wire Line
3400 2650 3400 2750
$Comp
L GND #PWR07
U 1 1 59CEF312
P 3400 2750
F 0 "#PWR07" H 3400 2500 50 0001 C CNN
F 1 "GND" H 3405 2577 50 0000 C CNN
F 2 "" H 3400 2750 50 0001 C CNN
F 3 "" H 3400 2750 50 0001 C CNN
1 3400 2750
1 0 0 -1
$EndComp
$Comp
L LED_ALT D1
U 1 1 59CF2B39
P 1750 3100
F 0 "D1" V 1788 2982 50 0000 R CNN
F 1 "Gn" V 1697 2982 50 0000 R CNN
F 2 "LEDs:LED_0603" H 1750 3100 50 0001 C CNN
F 3 "" H 1750 3100 50 0001 C CNN
1 1750 3100
0 -1 -1 0
$EndComp
$Comp
L R R1
U 1 1 59CF2BD7
P 1750 2700
F 0 "R1" H 1820 2746 50 0000 L CNN
F 1 "1k" H 1820 2655 50 0000 L CNN
F 2 "Resistors_SMD:R_0603" V 1680 2700 50 0001 C CNN
F 3 "" H 1750 2700 50 0001 C CNN
1 1750 2700
1 0 0 -1
$EndComp
$Comp
L +3V3 #PWR03
U 1 1 59CF2CC4
P 1750 2450
F 0 "#PWR03" H 1750 2300 50 0001 C CNN
F 1 "+3V3" H 1765 2623 50 0000 C CNN
F 2 "" H 1750 2450 50 0001 C CNN
F 3 "" H 1750 2450 50 0001 C CNN
1 1750 2450
1 0 0 -1
$EndComp
$Comp
L GND #PWR04
U 1 1 59CF2CE5
P 1750 3350
F 0 "#PWR04" H 1750 3100 50 0001 C CNN
F 1 "GND" H 1755 3177 50 0000 C CNN
F 2 "" H 1750 3350 50 0001 C CNN
F 3 "" H 1750 3350 50 0001 C CNN
1 1750 3350
1 0 0 -1
$EndComp
Wire Wire Line
1750 2850 1750 2950
Wire Wire Line
1750 3250 1750 3350
Wire Wire Line
1750 2550 1750 2450
$EndSCHEMATC

3290
tiny-xo2.kicad_pcb
View File

File diff suppressed because it is too large Load Diff

4
tiny-xo2.pro
View File

@ -1,4 +1,4 @@
update=Thu 28 Sep 2017 05:41:12 PM CEST update=Fri 29 Sep 2017 12:33:51 PM CEST
version=1 version=1
last_client=kicad last_client=kicad
[general] [general]
@ -61,3 +61,5 @@ LibName27=atmel
LibName28=contrib LibName28=contrib
LibName29=valves LibName29=valves
LibName30=kicad-libs/schematics/lattice/lattice LibName30=kicad-libs/schematics/lattice/lattice
LibName31=kicad-libs/schematics/interfaces/usbserial
LibName32=kicad-libs/schematics/clock/clock

83
tiny-xo2.sch
View File

@ -1,4 +1,83 @@
EESchema Schematic File Version 2 EESchema Schematic File Version 3
EELAYER 25 0 LIBS:power
LIBS:device
LIBS:transistors
LIBS:conn
LIBS:linear
LIBS:regul
LIBS:74xx
LIBS:cmos4000
LIBS:adc-dac
LIBS:memory
LIBS:xilinx
LIBS:microcontrollers
LIBS:dsp
LIBS:microchip
LIBS:analog_switches
LIBS:motorola
LIBS:texas
LIBS:intel
LIBS:audio
LIBS:interface
LIBS:digital-audio
LIBS:philips
LIBS:display
LIBS:cypress
LIBS:siliconi
LIBS:opto
LIBS:atmel
LIBS:contrib
LIBS:valves
LIBS:lattice
LIBS:usbserial
LIBS:clock
LIBS:tiny-xo2-cache
EELAYER 26 0
EELAYER END EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 1 4
Title ""
Date ""
Rev ""
Comp ""
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
$Sheet
S 850 900 1650 1050
U 59CE0A28
F0 "Power" 60
F1 "power.sch" 60
$EndSheet
$Sheet
S 4750 900 1650 1050
U 59CE3CDF
F0 "usbserial" 60
F1 "usbserial.sch" 60
F2 "CLK_USBSER" I L 4750 1100 60
F3 "TXD" O L 4750 1250 60
F4 "RXD" I L 4750 1350 60
F5 "DTR" O L 4750 1500 60
$EndSheet
$Sheet
S 2800 900 1650 1050
U 59CE819F
F0 "fpga" 60
F1 "fpga.sch" 60
F2 "CLK_USBSER" O R 4450 1100 60
F3 "TXD" I R 4450 1250 60
F4 "RXD" O R 4450 1350 60
F5 "RTS" I R 4450 1500 60
$EndSheet
Wire Wire Line
4450 1100 4750 1100
Wire Wire Line
4750 1250 4450 1250
Wire Wire Line
4450 1350 4750 1350
Wire Wire Line
4750 1500 4450 1500
$EndSCHEMATC $EndSCHEMATC

215
usbserial.sch Normal file
View File

@ -0,0 +1,215 @@
EESchema Schematic File Version 3
LIBS:power
LIBS:device
LIBS:transistors
LIBS:conn
LIBS:linear
LIBS:regul
LIBS:74xx
LIBS:cmos4000
LIBS:adc-dac
LIBS:memory
LIBS:xilinx
LIBS:microcontrollers
LIBS:dsp
LIBS:microchip
LIBS:analog_switches
LIBS:motorola
LIBS:texas
LIBS:intel
LIBS:audio
LIBS:interface
LIBS:digital-audio
LIBS:philips
LIBS:display
LIBS:cypress
LIBS:siliconi
LIBS:opto
LIBS:atmel
LIBS:contrib
LIBS:valves
LIBS:lattice
LIBS:usbserial
LIBS:clock
LIBS:tiny-xo2-cache
EELAYER 26 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 3 4
Title ""
Date ""
Rev ""
Comp ""
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
$Comp
L ch340g U3
U 1 1 59CE5435
P 4600 1600
F 0 "U3" H 4600 2337 60 0000 C CNN
F 1 "ch340g" H 4600 2231 60 0000 C CNN
F 2 "Housings_SOIC:SOIC-16_3.9x9.9mm_Pitch1.27mm" H 4300 2050 60 0001 C CNN
F 3 "" H 4300 2050 60 0001 C CNN
1 4600 1600
1 0 0 -1
$EndComp
$Comp
L USB_OTG J1
U 1 1 59CE581D
P 1150 1300
F 0 "J1" H 1205 1767 50 0000 C CNN
F 1 "USB_OTG" H 1205 1676 50 0000 C CNN
F 2 "Connectors:USB_Mini-B" H 1300 1250 50 0001 C CNN
F 3 "" H 1300 1250 50 0001 C CNN
1 1150 1300
1 0 0 -1
$EndComp
$Comp
L D_ALT D2
U 1 1 59CE5824
P 1700 1100
F 0 "D2" H 1700 884 50 0000 C CNN
F 1 "POL" H 1700 975 50 0000 C CNN
F 2 "Diodes_SMD:D_0805" H 1700 1100 50 0001 C CNN
F 3 "" H 1700 1100 50 0001 C CNN
1 1700 1100
-1 0 0 1
$EndComp
$Comp
L GND #PWR011
U 1 1 59CE582B
P 1550 1850
F 0 "#PWR011" H 1550 1600 50 0001 C CNN
F 1 "GND" H 1555 1677 50 0000 C CNN
F 2 "" H 1550 1850 50 0001 C CNN
F 3 "" H 1550 1850 50 0001 C CNN
1 1550 1850
1 0 0 -1
$EndComp
$Comp
L VBUS #PWR012
U 1 1 59CE5831
P 1950 1000
F 0 "#PWR012" H 1950 850 50 0001 C CNN
F 1 "VBUS" H 1965 1173 50 0000 C CNN
F 2 "" H 1950 1000 50 0001 C CNN
F 3 "" H 1950 1000 50 0001 C CNN
1 1950 1000
1 0 0 -1
$EndComp
Text Label 1600 1400 0 60 ~ 0
USB+
Text Label 1600 1300 0 60 ~ 0
USB-
$Comp
L C_Small C8
U 1 1 59CE59BF
P 3700 2150
F 0 "C8" H 3792 2196 50 0000 L CNN
F 1 "100n" H 3792 2105 50 0000 L CNN
F 2 "Capacitors_SMD:C_0603" H 3700 2150 50 0001 C CNN
F 3 "" H 3700 2150 50 0001 C CNN
1 3700 2150
1 0 0 -1
$EndComp
$Comp
L GND #PWR014
U 1 1 59CE5B99
P 3850 2450
F 0 "#PWR014" H 3850 2200 50 0001 C CNN
F 1 "GND" H 3855 2277 50 0000 C CNN
F 2 "" H 3850 2450 50 0001 C CNN
F 3 "" H 3850 2450 50 0001 C CNN
1 3850 2450
1 0 0 -1
$EndComp
$Comp
L +3V3 #PWR013
U 1 1 59CE5E77
P 3700 1750
F 0 "#PWR013" H 3700 1600 50 0001 C CNN
F 1 "+3V3" H 3715 1923 50 0000 C CNN
F 2 "" H 3700 1750 50 0001 C CNN
F 3 "" H 3700 1750 50 0001 C CNN
1 3700 1750
1 0 0 -1
$EndComp
Text Label 4000 1150 2 60 ~ 0
USB+
Text Label 4000 1250 2 60 ~ 0
USB-
NoConn ~ 4100 1600
Text HLabel 4000 1500 0 60 Input ~ 0
CLK_USBSER
Text HLabel 5300 1150 2 60 Output ~ 0
TXD
Text HLabel 5300 1250 2 60 Input ~ 0
RXD
Text HLabel 5300 1800 2 60 Output ~ 0
DTR
Wire Wire Line
1050 1700 1050 1750
Wire Wire Line
1050 1750 1550 1750
Connection ~ 1150 1750
Wire Wire Line
1950 1000 1950 1100
Wire Wire Line
1950 1100 1850 1100
Wire Wire Line
1450 1300 1600 1300
Wire Wire Line
1450 1400 1600 1400
Wire Wire Line
1450 1500 1550 1500
Wire Wire Line
3700 1750 3700 2050
Wire Wire Line
3700 1950 4100 1950
Wire Wire Line
4100 2050 4000 2050
Wire Wire Line
4000 2050 4000 2350
Wire Wire Line
4000 2350 3700 2350
Wire Wire Line
3700 2350 3700 2250
Wire Wire Line
3850 2350 3850 2450
Connection ~ 3850 2350
Wire Wire Line
4100 1850 3700 1850
Connection ~ 3700 1950
Connection ~ 3700 1850
Wire Wire Line
4000 1150 4100 1150
Wire Wire Line
4100 1250 4000 1250
Wire Wire Line
4100 1500 4000 1500
Wire Wire Line
1450 1100 1550 1100
Wire Wire Line
5100 1150 5300 1150
Wire Wire Line
5100 1250 5300 1250
Wire Wire Line
5300 1800 5100 1800
NoConn ~ 5100 1400
NoConn ~ 5100 1500
NoConn ~ 5100 1600
NoConn ~ 5100 1700
NoConn ~ 5100 1900
NoConn ~ 5100 2050
Wire Wire Line
1550 1500 1550 1850
Wire Wire Line
1150 1700 1150 1750
Connection ~ 1550 1750
Text Label 1450 1100 0 60 ~ 0
VU
$EndSCHEMATC