PCB, FPGA, and SW design to implement a tiny Ethernet-connected SoC based on SERV + Trashernet
kicad | ||
LICENSE-CC-BY-SA-4.0.TXT | ||
README.MD |
Trashernet SoC
PCB, FPGA, and SW design to implement a tiny Ethernet-connected SoC based on SERV + Trashernet.
License
Trashernet SoC, Copyright (C) 2024 Markus Koch markus@notsyncing.net
Hardware
The PCB design in /kicad
is released under a Creative Commons Attribution-ShareAlike 4.0 International license.
You can find a copy of the full license in LICENSE-CC-BY-SA-4.0.TXT.
FPGA
TBD.
SW
TBD.