20 lines
586 B
Plaintext
20 lines
586 B
Plaintext
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# Trashernet SoC
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PCB, FPGA, and SW design to implement a tiny Ethernet-connected SoC based on [SERV](https://github.com/olofk/serv) + [Trashernet](https://git.notsyncing.net/fpga/trashernet).
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## License
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Trashernet SoC, Copyright (C) 2024 Markus Koch <markus@notsyncing.net>
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### Hardware
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The PCB design in `/kicad` is released under a [Creative Commons Attribution-ShareAlike 4.0 International license](https://creativecommons.org/licenses/by-sa/4.0/).
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You can find a copy of the full license in [LICENSE-CC-BY-SA-4.0.TXT](./LICENSE-CC-BY-SA-4.0.TXT).
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### FPGA
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TBD.
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### SW
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TBD.
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