fpga: Add script to remove $asserts from netlists
For some reason, GHDL adds some (not all) asserts to the synthesis netlist. This script removes them.
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@ -46,6 +46,7 @@ $(BUILD_DIR)/netlist-post-synthesis.json: $(VU_FLAG) $(SOURCES_VERILOG)
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# Collect GHDL sources from VUnit
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# Collect GHDL sources from VUnit
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$(eval GHDLINCDIRS=$(shell find "$(VU_DIR)/ghdl/libraries" -maxdepth 1 -mindepth 1 -type d | sed "s/^/-P/" | tr '\n' ' '))
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$(eval GHDLINCDIRS=$(shell find "$(VU_DIR)/ghdl/libraries" -maxdepth 1 -mindepth 1 -type d | sed "s/^/-P/" | tr '\n' ' '))
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yosys -m ghdl -p "read_verilog $(SOURCES_VERILOG); ghdl --std=08 $(GHDLINCDIRS) design.top; synth_ice40 -abc9 -device $(YOSYS_DEVICE) -top top -json $@"
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yosys -m ghdl -p "read_verilog $(SOURCES_VERILOG); ghdl --std=08 $(GHDLINCDIRS) design.top; synth_ice40 -abc9 -device $(YOSYS_DEVICE) -top top -json $@"
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./patch_asserts.sh $@
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$(BUILD_DIR)/netlist-post-pnr.asc: $(BUILD_DIR)/netlist-post-synthesis.json $(CONSTRAINTS)
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$(BUILD_DIR)/netlist-post-pnr.asc: $(BUILD_DIR)/netlist-post-synthesis.json $(CONSTRAINTS)
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nextpnr-ice40 --$(DEVICE) --package $(PACKAGE) --asc $(BUILD_DIR)/netlist-post-pnr.asc --report $(BUILD_DIR)/report.json --detailed-timing-report --json $(BUILD_DIR)/netlist-post-synthesis.json --pcf $(CONSTRAINTS)
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nextpnr-ice40 --$(DEVICE) --package $(PACKAGE) --asc $(BUILD_DIR)/netlist-post-pnr.asc --report $(BUILD_DIR)/report.json --detailed-timing-report --json $(BUILD_DIR)/netlist-post-synthesis.json --pcf $(CONSTRAINTS)
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14
fpga/patch_asserts.sh
Executable file
14
fpga/patch_asserts.sh
Executable file
@ -0,0 +1,14 @@
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#!/bin/bash
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file="$1"
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echo "Removing \$assert from $file..."
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LOCS=`grep -n '$assert' "$file" | sed 's/:.*//g'`
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IFS=$'\n'
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for LOC in $LOCS; do
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START=$(($LOC-2))
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END=$(($LOC+14))
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echo "Deleting lines $START -> $END"
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sed -i -e "${START},${END}d" "$file"
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done
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