ttl-fpga/lutd.sch

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2019-05-30 20:24:33 +02:00
EESchema Schematic File Version 4
2019-05-30 21:12:52 +02:00
LIBS:ttl-fpga-cache
2019-05-30 20:24:33 +02:00
EELAYER 29 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 3 3
Title "DISCRETE TTL FPGA"
2019-05-31 22:14:42 +02:00
Date "2019-05-31"
2019-06-01 18:10:07 +02:00
Rev "02"
2019-05-30 20:24:33 +02:00
Comp "Markus Koch <markus@notsyncing.net>"
Comment1 "Logic Block"
Comment2 "single 4-input LUT / dual 3-input LUT"
Comment3 ""
Comment4 ""
$EndDescr
$Comp
L 74xx_IEEE:74164 U?
U 1 1 5CF42176
P 3100 3450
AR Path="/5CF41639/5CF42176" Ref="U?" Part="1"
2019-06-01 18:10:07 +02:00
AR Path="/5D77FDBE/5D7AF013/5CF42176" Ref="U13" Part="1"
F 0 "U13" H 3450 3650 50 0000 C CNN
2019-05-30 20:24:33 +02:00
F 1 "74164" H 3500 3750 50 0000 C CNN
2019-06-01 18:10:07 +02:00
F 2 "Package_SO:SOIC-14_3.9x8.7mm_P1.27mm" H 3100 3450 50 0001 C CNN
2019-05-30 20:24:33 +02:00
F 3 "" H 3100 3450 50 0001 C CNN
1 3100 3450
1 0 0 -1
$EndComp
$Comp
L 74xx_IEEE:74164 U?
U 1 1 5CF427E5
P 3100 5000
AR Path="/5CF41639/5CF427E5" Ref="U?" Part="1"
2019-06-01 18:10:07 +02:00
AR Path="/5D77FDBE/5D7AF013/5CF427E5" Ref="U17" Part="1"
F 0 "U17" H 3450 5200 50 0000 C CNN
2019-05-30 20:24:33 +02:00
F 1 "74164" H 3500 5300 50 0000 C CNN
2019-06-01 18:10:07 +02:00
F 2 "Package_SO:SOIC-14_3.9x8.7mm_P1.27mm" H 3100 5000 50 0001 C CNN
2019-05-30 20:24:33 +02:00
F 3 "" H 3100 5000 50 0001 C CNN
1 3100 5000
1 0 0 -1
$EndComp
Wire Wire Line
2550 5100 2500 5100
Wire Wire Line
2500 5100 2500 5050
Wire Wire Line
2500 5000 2550 5000
Wire Wire Line
3650 4250 3700 4250
Wire Wire Line
2450 4400 2450 5050
Wire Wire Line
2450 5050 2500 5050
Wire Wire Line
3700 4250 3700 4400
Connection ~ 2500 5050
Wire Wire Line
2500 5050 2500 5000
Wire Wire Line
2550 3550 2500 3550
Wire Wire Line
2500 3550 2500 3500
Wire Wire Line
2500 3450 2550 3450
Wire Wire Line
2550 4850 2350 4850
Wire Wire Line
2350 4850 2350 3300
Wire Wire Line
2350 3300 2550 3300
Wire Wire Line
2500 3500 2000 3500
Connection ~ 2500 3500
Wire Wire Line
2500 3500 2500 3450
Wire Wire Line
2350 3300 2000 3300
Connection ~ 2350 3300
Wire Wire Line
3650 3750 4250 3750
Wire Wire Line
3650 3650 4250 3650
Wire Wire Line
4250 3850 3650 3850
Wire Wire Line
3650 3950 4250 3950
Wire Wire Line
3650 4050 4250 4050
Wire Wire Line
3650 4150 4250 4150
Connection ~ 3700 4250
Wire Wire Line
3700 4250 4250 4250
Wire Wire Line
4250 3550 3700 3550
Wire Wire Line
3700 3550 3700 3500
Wire Wire Line
3700 3500 3650 3500
$Comp
L 74xx_IEEE:74251 U?
U 1 1 5CF5B900
P 4800 5200
AR Path="/5CF41639/5CF5B900" Ref="U?" Part="1"
2019-06-01 18:10:07 +02:00
AR Path="/5D77FDBE/5D7AF013/5CF5B900" Ref="U18" Part="1"
F 0 "U18" H 5000 5900 50 0000 C CNN
2019-05-30 20:24:33 +02:00
F 1 "74251" H 4700 5900 50 0000 C CNN
2019-06-01 18:10:07 +02:00
F 2 "Package_SO:SOIC-16_3.9x9.9mm_P1.27mm" H 4800 5200 50 0001 C CNN
2019-05-30 20:24:33 +02:00
F 3 "" H 4800 5200 50 0001 C CNN
1 4800 5200
1 0 0 -1
$EndComp
Wire Wire Line
4250 5200 3650 5200
Wire Wire Line
4250 5300 3650 5300
Wire Wire Line
4250 5400 3650 5400
Wire Wire Line
4250 5500 3650 5500
Wire Wire Line
4250 5600 3650 5600
Wire Wire Line
4250 5700 3650 5700
Wire Wire Line
4250 5800 3700 5800
Wire Wire Line
4250 5100 3700 5100
Wire Wire Line
3700 5100 3700 5050
Wire Wire Line
3700 5050 3650 5050
Entry Wire Line
3850 3100 3950 3200
Entry Wire Line
3850 3200 3950 3300
Entry Wire Line
3850 3300 3950 3400
Wire Wire Line
3950 3200 4250 3200
$Comp
L 74xx_IEEE:74251 U?
U 1 1 5CF4F8AB
P 4800 3650
AR Path="/5CF41639/5CF4F8AB" Ref="U?" Part="1"
2019-06-01 18:10:07 +02:00
AR Path="/5D77FDBE/5D7AF013/5CF4F8AB" Ref="U14" Part="1"
F 0 "U14" H 5000 4350 50 0000 C CNN
2019-05-30 20:24:33 +02:00
F 1 "74251" H 4700 4350 50 0000 C CNN
2019-06-01 18:33:12 +02:00
F 2 "Package_SO:SOIC-16_3.9x9.9mm_P1.27mm" H 4800 3650 50 0001 C CNN
2019-05-30 20:24:33 +02:00
F 3 "" H 4800 3650 50 0001 C CNN
1 4800 3650
1 0 0 -1
$EndComp
Wire Wire Line
3950 3300 4250 3300
Wire Wire Line
3950 3400 4250 3400
Entry Wire Line
3850 4750 3950 4850
Entry Wire Line
3850 4650 3950 4750
Entry Wire Line
3850 4850 3950 4950
Wire Wire Line
3950 4750 4250 4750
Wire Wire Line
3950 4850 4250 4850
Wire Wire Line
3950 4950 4250 4950
Text Label 3950 3300 0 50 ~ 0
lut_in1
Text Label 3950 3400 0 50 ~ 0
lut_in2
Text Label 3950 4750 0 50 ~ 0
lut_in0
Text Label 3950 4850 0 50 ~ 0
lut_in1
Text Label 3950 4950 0 50 ~ 0
lut_in2
Text HLabel 2000 3300 0 50 Input ~ 0
isp_sck
Text HLabel 2000 3500 0 50 Input ~ 0
isp_mosi
Wire Wire Line
3700 5800 3700 5950
Connection ~ 3700 5800
Wire Wire Line
3700 5800 3650 5800
Wire Wire Line
2000 5950 3700 5950
Text HLabel 2000 5950 0 50 Output ~ 0
isp_miso
Text HLabel 2000 2700 0 50 Input ~ 0
2019-06-01 18:31:45 +02:00
lut_in[3..0]
2019-05-30 20:24:33 +02:00
Text Label 3950 3200 0 50 ~ 0
lut_in0
Text Label 2050 2700 0 50 ~ 0
2019-05-30 20:24:33 +02:00
lut_in[3..0]
NoConn ~ 5350 4000
NoConn ~ 5350 5550
Text HLabel 2000 1350 0 50 Input ~ 0
2019-05-30 20:24:33 +02:00
cfg_sync
NoConn ~ 7450 4300
NoConn ~ 7450 4400
NoConn ~ 7450 4500
Text HLabel 2000 6650 0 50 Input ~ 0
clk
Text HLabel 2000 6750 0 50 Input ~ 0
rst_n
$Comp
L power:GNDD #PWR?
U 1 1 5D015E6D
P 6200 4550
AR Path="/5CF41639/5D015E6D" Ref="#PWR?" Part="1"
2019-05-30 21:36:22 +02:00
AR Path="/5D77FDBE/5D7AF013/5D015E6D" Ref="#PWR0129" Part="1"
F 0 "#PWR0129" H 6200 4300 50 0001 C CNN
2019-05-30 20:24:33 +02:00
F 1 "GNDD" H 6204 4395 50 0000 C CNN
F 2 "" H 6200 4550 50 0001 C CNN
F 3 "" H 6200 4550 50 0001 C CNN
1 6200 4550
1 0 0 -1
$EndComp
Wire Wire Line
6200 4550 6200 4500
Wire Wire Line
6200 4500 6450 4500
Wire Wire Line
6450 4400 6200 4400
Wire Wire Line
6200 4400 6200 4500
Connection ~ 6200 4500
Wire Wire Line
6450 4300 6200 4300
Wire Wire Line
6200 4300 6200 4400
Connection ~ 6200 4400
Wire Wire Line
4250 4650 3950 4650
Text Label 3950 4650 0 50 ~ 0
2019-05-30 21:12:52 +02:00
lut_b_en_n
2019-05-30 20:24:33 +02:00
Wire Wire Line
2019-05-30 21:12:52 +02:00
4150 3100 4250 3100
2019-05-30 20:24:33 +02:00
Text Label 8150 3850 0 50 ~ 0
cfg_sync
Wire Wire Line
8500 3850 8100 3850
$Comp
L 74xx_IEEE:74157 U?
U 1 1 5D187D09
P 9050 4150
AR Path="/5CF41639/5D187D09" Ref="U?" Part="1"
2019-06-01 18:10:07 +02:00
AR Path="/5D77FDBE/5D7AF013/5D187D09" Ref="U15" Part="1"
F 0 "U15" H 9400 4500 50 0000 C CNN
2019-05-30 21:36:22 +02:00
F 1 "74157" H 9450 4600 50 0000 C CNN
2019-06-01 18:10:07 +02:00
F 2 "Package_SO:SOIC-16_3.9x9.9mm_P1.27mm" H 9050 4150 50 0001 C CNN
2019-05-30 20:24:33 +02:00
F 3 "" H 9050 4150 50 0001 C CNN
1 9050 4150
1 0 0 -1
$EndComp
$Comp
L 74xx:74LS174 U?
U 1 1 5CF941AD
P 6950 4400
AR Path="/5CF41639/5CF941AD" Ref="U?" Part="1"
2019-06-01 18:10:07 +02:00
AR Path="/5D77FDBE/5D7AF013/5CF941AD" Ref="U16" Part="1"
F 0 "U16" H 7200 4950 50 0000 C CNN
2019-05-30 20:24:33 +02:00
F 1 "74LS174" H 6750 4950 50 0000 C CNN
2019-06-01 18:10:07 +02:00
F 2 "Package_SO:SOIC-16_3.9x9.9mm_P1.27mm" H 6950 4400 50 0001 C CNN
2019-05-30 20:24:33 +02:00
F 3 "http://www.ti.com/lit/gpn/sn74LS174" H 6950 4400 50 0001 C CNN
1 6950 4400
1 0 0 -1
$EndComp
Wire Wire Line
6100 4000 6100 3300
Wire Wire Line
5350 3300 5800 3300
Wire Wire Line
6100 4000 6450 4000
Wire Wire Line
6100 4850 6100 4200
Wire Wire Line
6100 4200 6450 4200
Wire Wire Line
5350 4850 5800 4850
Wire Wire Line
5800 4650 5800 4850
Connection ~ 5800 4850
Wire Wire Line
5800 4850 6100 4850
Wire Wire Line
5800 4350 5800 4100
Wire Wire Line
5800 3500 5800 3300
Connection ~ 5800 3300
Wire Wire Line
5800 3300 6100 3300
Wire Wire Line
6450 4100 5800 4100
Connection ~ 5800 4100
Wire Wire Line
5800 4100 5800 3800
Wire Wire Line
5800 4100 5550 4100
Wire Wire Line
5550 4100 5550 4200
$Comp
L Device:R R?
U 1 1 5D1A7947
P 5550 4350
AR Path="/5CF41639/5D1A7947" Ref="R?" Part="1"
2019-06-01 18:10:07 +02:00
AR Path="/5D77FDBE/5D7AF013/5D1A7947" Ref="R15" Part="1"
F 0 "R15" H 5480 4304 50 0000 R CNN
2019-05-30 20:24:33 +02:00
F 1 "10k" H 5480 4395 50 0000 R CNN
2019-06-01 18:10:07 +02:00
F 2 "Resistor_SMD:R_0603_1608Metric" V 5480 4350 50 0001 C CNN
2019-05-30 20:24:33 +02:00
F 3 "~" H 5550 4350 50 0001 C CNN
1 5550 4350
1 0 0 1
$EndComp
$Comp
L power:GNDD #PWR?
U 1 1 5D1A7DBD
P 5550 4600
AR Path="/5CF41639/5D1A7DBD" Ref="#PWR?" Part="1"
2019-05-30 21:36:22 +02:00
AR Path="/5D77FDBE/5D7AF013/5D1A7DBD" Ref="#PWR0130" Part="1"
F 0 "#PWR0130" H 5550 4350 50 0001 C CNN
2019-05-30 20:24:33 +02:00
F 1 "GNDD" H 5554 4445 50 0000 C CNN
F 2 "" H 5550 4600 50 0001 C CNN
F 3 "" H 5550 4600 50 0001 C CNN
1 5550 4600
1 0 0 -1
$EndComp
Wire Wire Line
5550 4600 5550 4500
Text Label 6150 4000 0 50 ~ 0
async_a
Text Label 6150 4100 0 50 ~ 0
async_c
Text Label 6150 4200 0 50 ~ 0
async_b
Wire Wire Line
8500 4000 7450 4000
Text Label 7550 4000 0 50 ~ 0
sync_a
Text Label 7550 4100 0 50 ~ 0
sync_c
Text Label 7550 4200 0 50 ~ 0
sync_b
Wire Wire Line
7450 4100 7950 4100
Wire Wire Line
7950 4100 7950 4200
Wire Wire Line
7950 4200 8500 4200
Wire Wire Line
7450 4200 7850 4200
Wire Wire Line
8500 4400 7850 4400
Wire Wire Line
7850 4200 7850 4400
Wire Wire Line
8500 4100 8150 4100
Text Label 8150 4100 0 50 ~ 0
async_a
Text Label 8150 4300 0 50 ~ 0
async_c
Text Label 8150 4500 0 50 ~ 0
async_b
Wire Wire Line
8150 4300 8500 4300
Wire Wire Line
8500 4500 8150 4500
Wire Wire Line
2019-05-31 18:52:59 +02:00
9600 4050 10250 4050
Text HLabel 10250 4050 2 50 Output ~ 0
2019-05-30 20:24:33 +02:00
lut_out_a
2019-05-31 18:52:59 +02:00
Text HLabel 10250 4250 2 50 Output ~ 0
2019-05-30 20:24:33 +02:00
lut_out_c
2019-05-31 18:52:59 +02:00
Text HLabel 10250 4450 2 50 Output ~ 0
2019-05-30 20:24:33 +02:00
lut_out_b
Wire Wire Line
2019-05-31 18:52:59 +02:00
10250 4450 9600 4450
2019-05-30 20:24:33 +02:00
Wire Wire Line
2019-05-31 18:52:59 +02:00
9600 4250 10250 4250
2019-05-30 20:24:33 +02:00
Text Notes 4800 3700 0 94 ~ 0
A
Text Notes 4800 5300 0 94 ~ 0
B
Entry Wire Line
2450 2700 2550 2600
Text Label 2550 2600 0 50 ~ 0
2019-05-30 20:24:33 +02:00
lut_in3
Wire Wire Line
6450 4700 6350 4700
Wire Wire Line
6350 4700 6350 6650
Wire Wire Line
6350 6650 2000 6650
Wire Wire Line
2000 6750 6450 6750
Wire Wire Line
6450 6750 6450 4900
$Comp
L power:GNDD #PWR?
U 1 1 5D26A4EB
P 6950 5300
AR Path="/5CF41639/5D26A4EB" Ref="#PWR?" Part="1"
2019-05-30 21:36:22 +02:00
AR Path="/5D77FDBE/5D7AF013/5D26A4EB" Ref="#PWR0132" Part="1"
F 0 "#PWR0132" H 6950 5050 50 0001 C CNN
2019-05-30 20:24:33 +02:00
F 1 "GNDD" H 6954 5145 50 0000 C CNN
F 2 "" H 6950 5300 50 0001 C CNN
F 3 "" H 6950 5300 50 0001 C CNN
1 6950 5300
1 0 0 -1
$EndComp
Wire Wire Line
6950 5200 6950 5300
$Comp
L power:GNDD #PWR?
U 1 1 5D276079
P 8300 3550
AR Path="/5CF41639/5D276079" Ref="#PWR?" Part="1"
2019-05-30 21:36:22 +02:00
AR Path="/5D77FDBE/5D7AF013/5D276079" Ref="#PWR0133" Part="1"
F 0 "#PWR0133" H 8300 3300 50 0001 C CNN
2019-05-30 20:24:33 +02:00
F 1 "GNDD" H 8304 3395 50 0000 C CNN
F 2 "" H 8300 3550 50 0001 C CNN
F 3 "" H 8300 3550 50 0001 C CNN
1 8300 3550
1 0 0 -1
$EndComp
Wire Wire Line
8300 3550 8300 3450
Wire Wire Line
8300 3450 8500 3450
Wire Wire Line
8500 3450 8500 3750
$Comp
L power:VCC #PWR?
U 1 1 5D27AEF5
P 6950 3600
AR Path="/5CF41639/5D27AEF5" Ref="#PWR?" Part="1"
2019-05-30 21:36:22 +02:00
AR Path="/5D77FDBE/5D7AF013/5D27AEF5" Ref="#PWR0134" Part="1"
F 0 "#PWR0134" H 6950 3450 50 0001 C CNN
2019-05-30 20:24:33 +02:00
F 1 "VCC" H 6967 3773 50 0000 C CNN
F 2 "" H 6950 3600 50 0001 C CNN
F 3 "" H 6950 3600 50 0001 C CNN
1 6950 3600
1 0 0 -1
$EndComp
Wire Wire Line
6950 3600 6950 3700
$Comp
L power:GNDD #PWR?
U 1 1 5D2924B9
P 4800 6000
AR Path="/5CF41639/5D2924B9" Ref="#PWR?" Part="1"
2019-05-30 21:36:22 +02:00
AR Path="/5D77FDBE/5D7AF013/5D2924B9" Ref="#PWR0135" Part="1"
F 0 "#PWR0135" H 4800 5750 50 0001 C CNN
2019-05-30 20:24:33 +02:00
F 1 "GNDD" H 4804 5845 50 0000 C CNN
F 2 "" H 4800 6000 50 0001 C CNN
F 3 "" H 4800 6000 50 0001 C CNN
1 4800 6000
1 0 0 -1
$EndComp
Wire Wire Line
4800 6000 4800 5900
$Comp
L power:GNDD #PWR?
U 1 1 5D2970E5
P 4450 4400
AR Path="/5CF41639/5D2970E5" Ref="#PWR?" Part="1"
2019-05-30 21:36:22 +02:00
AR Path="/5D77FDBE/5D7AF013/5D2970E5" Ref="#PWR0136" Part="1"
F 0 "#PWR0136" H 4450 4150 50 0001 C CNN
2019-05-30 20:24:33 +02:00
F 1 "GNDD" H 4454 4245 50 0000 C CNN
F 2 "" H 4450 4400 50 0001 C CNN
F 3 "" H 4450 4400 50 0001 C CNN
1 4450 4400
1 0 0 -1
$EndComp
Wire Wire Line
4450 4400 4800 4400
Wire Wire Line
4800 4400 4800 4350
$Comp
L power:VCC #PWR?
U 1 1 5D29AD03
P 5150 4450
AR Path="/5CF41639/5D29AD03" Ref="#PWR?" Part="1"
2019-05-30 21:36:22 +02:00
AR Path="/5D77FDBE/5D7AF013/5D29AD03" Ref="#PWR0137" Part="1"
F 0 "#PWR0137" H 5150 4300 50 0001 C CNN
2019-05-30 20:24:33 +02:00
F 1 "VCC" H 5167 4623 50 0000 C CNN
F 2 "" H 5150 4450 50 0001 C CNN
F 3 "" H 5150 4450 50 0001 C CNN
1 5150 4450
1 0 0 -1
$EndComp
Wire Wire Line
5150 4450 4800 4450
Wire Wire Line
4800 4450 4800 4550
$Comp
L power:VCC #PWR?
U 1 1 5D29EA17
P 4800 2900
AR Path="/5CF41639/5D29EA17" Ref="#PWR?" Part="1"
2019-05-30 21:36:22 +02:00
AR Path="/5D77FDBE/5D7AF013/5D29EA17" Ref="#PWR0138" Part="1"
F 0 "#PWR0138" H 4800 2750 50 0001 C CNN
2019-05-30 20:24:33 +02:00
F 1 "VCC" H 4817 3073 50 0000 C CNN
F 2 "" H 4800 2900 50 0001 C CNN
F 3 "" H 4800 2900 50 0001 C CNN
1 4800 2900
1 0 0 -1
$EndComp
Wire Wire Line
4800 2900 4800 3000
$Comp
L power:GNDD #PWR?
U 1 1 5D2B29AB
P 2900 2850
AR Path="/5CF41639/5D2B29AB" Ref="#PWR?" Part="1"
2019-05-30 21:36:22 +02:00
AR Path="/5D77FDBE/5D7AF013/5D2B29AB" Ref="#PWR0139" Part="1"
F 0 "#PWR0139" H 2900 2600 50 0001 C CNN
2019-05-30 20:24:33 +02:00
F 1 "GNDD" H 2904 2695 50 0000 C CNN
F 2 "" H 2900 2850 50 0001 C CNN
F 3 "" H 2900 2850 50 0001 C CNN
1 2900 2850
1 0 0 -1
$EndComp
Wire Wire Line
2900 2850 2900 2800
Wire Wire Line
2900 2800 3100 2800
Wire Wire Line
3100 2800 3100 3100
$Comp
L power:VCC #PWR?
U 1 1 5D2B7E69
P 3300 3000
AR Path="/5CF41639/5D2B7E69" Ref="#PWR?" Part="1"
2019-05-30 21:36:22 +02:00
AR Path="/5D77FDBE/5D7AF013/5D2B7E69" Ref="#PWR0140" Part="1"
F 0 "#PWR0140" H 3300 2850 50 0001 C CNN
2019-05-30 20:24:33 +02:00
F 1 "VCC" H 3317 3173 50 0000 C CNN
F 2 "" H 3300 3000 50 0001 C CNN
F 3 "" H 3300 3000 50 0001 C CNN
1 3300 3000
1 0 0 -1
$EndComp
Wire Wire Line
3300 3000 3300 3100
Wire Wire Line
3700 4400 2450 4400
$Comp
L power:GNDD #PWR?
U 1 1 5D2CD01F
P 2900 4450
AR Path="/5CF41639/5D2CD01F" Ref="#PWR?" Part="1"
2019-05-30 21:36:22 +02:00
AR Path="/5D77FDBE/5D7AF013/5D2CD01F" Ref="#PWR0141" Part="1"
F 0 "#PWR0141" H 2900 4200 50 0001 C CNN
2019-05-30 20:24:33 +02:00
F 1 "GNDD" H 2904 4295 50 0000 C CNN
F 2 "" H 2900 4450 50 0001 C CNN
F 3 "" H 2900 4450 50 0001 C CNN
1 2900 4450
1 0 0 -1
$EndComp
Wire Wire Line
2900 4450 3100 4450
Wire Wire Line
3100 4450 3100 4650
$Comp
L power:VCC #PWR?
U 1 1 5D2D1794
P 3300 4550
AR Path="/5CF41639/5D2D1794" Ref="#PWR?" Part="1"
2019-05-30 21:36:22 +02:00
AR Path="/5D77FDBE/5D7AF013/5D2D1794" Ref="#PWR0142" Part="1"
F 0 "#PWR0142" H 3300 4400 50 0001 C CNN
2019-05-30 20:24:33 +02:00
F 1 "VCC" H 3317 4723 50 0000 C CNN
F 2 "" H 3300 4550 50 0001 C CNN
F 3 "" H 3300 4550 50 0001 C CNN
1 3300 4550
1 0 0 -1
$EndComp
Wire Wire Line
3300 4550 3300 4650
Wire Wire Line
8100 1350 8100 3850
2019-05-30 20:24:33 +02:00
Text Label 8150 4600 0 50 ~ 0
async_b
Wire Wire Line
8500 4600 8150 4600
Text Label 8150 4700 0 50 ~ 0
async_b
Wire Wire Line
8500 4700 8150 4700
2019-05-31 18:52:59 +02:00
Text HLabel 10250 4650 2 50 Output ~ 0
2019-05-30 20:24:33 +02:00
lut_out_b_async
Wire Wire Line
2019-05-31 18:52:59 +02:00
10250 4650 9600 4650
Text HLabel 2000 1650 0 50 Input ~ 0
cfg_split_n
2019-05-30 21:36:22 +02:00
$Comp
L power:GNDD #PWR?
U 1 1 5CF3ABB3
P 8850 3450
AR Path="/5CF41639/5CF3ABB3" Ref="#PWR?" Part="1"
AR Path="/5D77FDBE/5D7AF013/5CF3ABB3" Ref="#PWR0144" Part="1"
AR Path="/5D77FDBE/5CF3ABB3" Ref="#PWR?" Part="1"
F 0 "#PWR0144" H 8850 3200 50 0001 C CNN
F 1 "GNDD" H 8854 3295 50 0000 C CNN
F 2 "" H 8850 3450 50 0001 C CNN
F 3 "" H 8850 3450 50 0001 C CNN
1 8850 3450
1 0 0 -1
$EndComp
Wire Wire Line
8850 3450 9050 3450
Wire Wire Line
9050 3450 9050 3650
$Comp
L power:VCC #PWR?
U 1 1 5CF3ABBB
P 9200 3550
AR Path="/5CF41639/5CF3ABBB" Ref="#PWR?" Part="1"
AR Path="/5D77FDBE/5D7AF013/5CF3ABBB" Ref="#PWR0145" Part="1"
AR Path="/5D77FDBE/5CF3ABBB" Ref="#PWR?" Part="1"
F 0 "#PWR0145" H 9200 3400 50 0001 C CNN
F 1 "VCC" H 9217 3723 50 0000 C CNN
F 2 "" H 9200 3550 50 0001 C CNN
F 3 "" H 9200 3550 50 0001 C CNN
1 9200 3550
1 0 0 -1
$EndComp
Wire Wire Line
9200 3550 9200 3650
$Comp
L Device:C C?
U 1 1 5D2EACB1
P 9500 2050
2019-05-30 21:36:22 +02:00
AR Path="/5D77FDBE/5D2EACB1" Ref="C?" Part="1"
2019-06-01 18:10:07 +02:00
AR Path="/5D77FDBE/5D7AF013/5D2EACB1" Ref="C15" Part="1"
F 0 "C15" H 9500 2150 50 0000 L CNN
F 1 "100n" H 9500 1950 50 0000 L CNN
2019-06-01 18:10:07 +02:00
F 2 "Capacitor_SMD:C_0603_1608Metric" H 9538 1900 50 0001 C CNN
F 3 "~" H 9500 2050 50 0001 C CNN
1 9500 2050
2019-05-30 21:36:22 +02:00
1 0 0 -1
$EndComp
$Comp
L Device:C C?
U 1 1 5D2EACB7
P 9700 2050
2019-05-30 21:36:22 +02:00
AR Path="/5D77FDBE/5D2EACB7" Ref="C?" Part="1"
2019-06-01 18:10:07 +02:00
AR Path="/5D77FDBE/5D7AF013/5D2EACB7" Ref="C16" Part="1"
F 0 "C16" H 9700 2150 50 0000 L CNN
F 1 "100n" H 9700 1950 50 0000 L CNN
2019-06-01 18:10:07 +02:00
F 2 "Capacitor_SMD:C_0603_1608Metric" H 9738 1900 50 0001 C CNN
F 3 "~" H 9700 2050 50 0001 C CNN
1 9700 2050
2019-05-30 21:36:22 +02:00
1 0 0 -1
$EndComp
$Comp
L Device:C C?
U 1 1 5D2EACBD
P 9900 2050
2019-05-30 21:36:22 +02:00
AR Path="/5D77FDBE/5D2EACBD" Ref="C?" Part="1"
2019-06-01 18:10:07 +02:00
AR Path="/5D77FDBE/5D7AF013/5D2EACBD" Ref="C17" Part="1"
F 0 "C17" H 9900 2150 50 0000 L CNN
F 1 "100n" H 9900 1950 50 0000 L CNN
2019-06-01 18:10:07 +02:00
F 2 "Capacitor_SMD:C_0603_1608Metric" H 9938 1900 50 0001 C CNN
F 3 "~" H 9900 2050 50 0001 C CNN
1 9900 2050
2019-05-30 21:36:22 +02:00
1 0 0 -1
$EndComp
$Comp
L Device:C C?
U 1 1 5D2EACC3
P 10100 2050
2019-05-30 21:36:22 +02:00
AR Path="/5D77FDBE/5D2EACC3" Ref="C?" Part="1"
2019-06-01 18:10:07 +02:00
AR Path="/5D77FDBE/5D7AF013/5D2EACC3" Ref="C18" Part="1"
F 0 "C18" H 10100 2150 50 0000 L CNN
F 1 "100n" H 10100 1950 50 0000 L CNN
2019-06-01 18:10:07 +02:00
F 2 "Capacitor_SMD:C_0603_1608Metric" H 10138 1900 50 0001 C CNN
F 3 "~" H 10100 2050 50 0001 C CNN
1 10100 2050
2019-05-30 21:36:22 +02:00
1 0 0 -1
$EndComp
Wire Wire Line
9500 1900 9500 1800
2019-05-30 21:36:22 +02:00
Wire Wire Line
9500 1800 9700 1800
2019-05-30 21:36:22 +02:00
Wire Wire Line
10100 1800 10100 1900
2019-05-30 21:36:22 +02:00
Wire Wire Line
9900 1900 9900 1800
Connection ~ 9900 1800
2019-05-30 21:36:22 +02:00
Wire Wire Line
9900 1800 10100 1800
2019-05-30 21:36:22 +02:00
Wire Wire Line
9700 1900 9700 1800
Connection ~ 9700 1800
2019-05-30 21:36:22 +02:00
Wire Wire Line
9500 2200 9500 2300
2019-05-30 21:36:22 +02:00
Wire Wire Line
9500 2300 9700 2300
2019-05-30 21:36:22 +02:00
Wire Wire Line
10100 2300 10100 2200
2019-05-30 21:36:22 +02:00
Wire Wire Line
9900 2200 9900 2300
Connection ~ 9900 2300
2019-05-30 21:36:22 +02:00
Wire Wire Line
9900 2300 10100 2300
2019-05-30 21:36:22 +02:00
Wire Wire Line
9700 2200 9700 2300
Connection ~ 9700 2300
2019-05-30 21:36:22 +02:00
$Comp
L power:GNDD #PWR?
U 1 1 5D2EACE7
P 9700 2400
2019-05-30 21:36:22 +02:00
AR Path="/5D77FDBE/5D2EACE7" Ref="#PWR?" Part="1"
AR Path="/5D77FDBE/5D7AF013/5D2EACE7" Ref="#PWR0147" Part="1"
F 0 "#PWR0147" H 9700 2150 50 0001 C CNN
F 1 "GNDD" H 9704 2245 50 0000 C CNN
F 2 "" H 9700 2400 50 0001 C CNN
F 3 "" H 9700 2400 50 0001 C CNN
1 9700 2400
2019-05-30 21:36:22 +02:00
1 0 0 -1
$EndComp
$Comp
L Device:C C?
U 1 1 5D2FCD73
P 10300 2050
2019-05-30 21:36:22 +02:00
AR Path="/5D77FDBE/5D2FCD73" Ref="C?" Part="1"
2019-06-01 18:10:07 +02:00
AR Path="/5D77FDBE/5D7AF013/5D2FCD73" Ref="C19" Part="1"
F 0 "C19" H 10300 2150 50 0000 L CNN
F 1 "100n" H 10300 1950 50 0000 L CNN
2019-06-01 18:10:07 +02:00
F 2 "Capacitor_SMD:C_0603_1608Metric" H 10338 1900 50 0001 C CNN
F 3 "~" H 10300 2050 50 0001 C CNN
1 10300 2050
2019-05-30 21:36:22 +02:00
1 0 0 -1
$EndComp
$Comp
L Device:C C?
U 1 1 5D2FCFE7
P 9300 2050
2019-05-30 21:36:22 +02:00
AR Path="/5D77FDBE/5D2FCFE7" Ref="C?" Part="1"
2019-06-01 18:10:07 +02:00
AR Path="/5D77FDBE/5D7AF013/5D2FCFE7" Ref="C14" Part="1"
F 0 "C14" H 9300 2150 50 0000 L CNN
F 1 "100n" H 9300 1950 50 0000 L CNN
2019-06-01 18:10:07 +02:00
F 2 "Capacitor_SMD:C_0603_1608Metric" H 9338 1900 50 0001 C CNN
F 3 "~" H 9300 2050 50 0001 C CNN
1 9300 2050
2019-05-30 21:36:22 +02:00
1 0 0 -1
$EndComp
Wire Wire Line
9300 1900 9300 1800
2019-05-30 21:36:22 +02:00
Wire Wire Line
9300 1800 9500 1800
Connection ~ 9500 1800
2019-05-30 21:36:22 +02:00
Wire Wire Line
9500 2300 9300 2300
2019-05-30 21:36:22 +02:00
Wire Wire Line
9300 2300 9300 2200
Connection ~ 9500 2300
2019-05-30 21:36:22 +02:00
Wire Wire Line
10100 2300 10300 2300
2019-05-30 21:36:22 +02:00
Wire Wire Line
10300 2300 10300 2200
Connection ~ 10100 2300
2019-05-30 21:36:22 +02:00
Wire Wire Line
10300 1900 10300 1800
2019-05-30 21:36:22 +02:00
Wire Wire Line
10300 1800 10100 1800
Connection ~ 10100 1800
2019-05-31 18:52:59 +02:00
Text Label 9600 4050 0 50 ~ 0
lut_out_a
Text Label 9600 4250 0 50 ~ 0
lut_out_c
Text Label 9600 4450 0 50 ~ 0
lut_out_b
Text Label 9600 4650 0 50 ~ 0
lut_out_b_async
Wire Wire Line
2550 2400 2550 2600
$Comp
L Device:C C?
U 1 1 5D182B36
P 9100 2050
AR Path="/5D77FDBE/5D182B36" Ref="C?" Part="1"
2019-06-01 18:10:07 +02:00
AR Path="/5D77FDBE/5D7AF013/5D182B36" Ref="C13" Part="1"
F 0 "C13" H 9100 2150 50 0000 L CNN
F 1 "100n" H 9100 1950 50 0000 L CNN
2019-06-01 18:10:07 +02:00
F 2 "Capacitor_SMD:C_0603_1608Metric" H 9138 1900 50 0001 C CNN
F 3 "~" H 9100 2050 50 0001 C CNN
1 9100 2050
1 0 0 -1
$EndComp
Wire Wire Line
9100 2200 9100 2300
Wire Wire Line
9100 2300 9300 2300
Connection ~ 9300 2300
Wire Wire Line
9100 1900 9100 1800
Wire Wire Line
9100 1800 9300 1800
Connection ~ 9300 1800
$Comp
L power:VCC #PWR?
U 1 1 5D2EACE1
P 9700 1700
AR Path="/5D77FDBE/5D2EACE1" Ref="#PWR?" Part="1"
AR Path="/5D77FDBE/5D7AF013/5D2EACE1" Ref="#PWR0146" Part="1"
F 0 "#PWR0146" H 9700 1550 50 0001 C CNN
F 1 "VCC" H 9717 1873 50 0000 C CNN
F 2 "" H 9700 1700 50 0001 C CNN
F 3 "" H 9700 1700 50 0001 C CNN
1 9700 1700
1 0 0 -1
$EndComp
Wire Wire Line
9700 1800 9900 1800
Wire Wire Line
9700 2300 9900 2300
Wire Wire Line
9700 1700 9700 1800
Wire Wire Line
9700 2400 9700 2300
Wire Notes Line
3950 4400 3950 4550
Wire Notes Line
3950 4550 3900 4500
Wire Notes Line
3950 4550 4000 4500
Wire Wire Line
2000 1350 8100 1350
Text HLabel 2000 2150 0 50 Input ~ 0
lut_in3_n
Text Label 3950 2150 2 50 ~ 0
lut_b_en_n
$Comp
2019-06-01 18:10:07 +02:00
L Device:R R14
U 1 1 5D4D5C26
P 4150 2150
2019-06-01 18:10:07 +02:00
F 0 "R14" H 4220 2196 50 0000 L CNN
F 1 "10k" H 4220 2105 50 0000 L CNN
2019-06-01 18:10:07 +02:00
F 2 "Resistor_SMD:R_0603_1608Metric" V 4080 2150 50 0001 C CNN
F 3 "~" H 4150 2150 50 0001 C CNN
1 4150 2150
1 0 0 -1
$EndComp
Connection ~ 4150 2400
Wire Wire Line
4150 2400 4150 3100
Wire Wire Line
2000 1650 3500 1650
Wire Wire Line
4150 1650 4150 2000
Wire Wire Line
2550 2400 3650 2400
Wire Wire Line
4150 2400 3950 2400
$Comp
2019-06-01 18:10:07 +02:00
L Device:D_Schottky D10
U 1 1 5D50C782
P 3800 2400
2019-06-01 18:10:07 +02:00
F 0 "D10" H 3800 2500 50 0000 C CNN
F 1 "D_Schottky" H 3800 2300 50 0000 C CNN
2019-06-01 18:10:07 +02:00
F 2 "Diode_SMD:D_0603_1608Metric" H 3800 2400 50 0001 C CNN
F 3 "~" H 3800 2400 50 0001 C CNN
1 3800 2400
1 0 0 -1
$EndComp
Wire Wire Line
4150 2300 4150 2400
Text Label 4550 2400 2 50 ~ 0
lut_a_en_n
$Comp
2019-06-01 18:10:07 +02:00
L Device:R R13
U 1 1 5D544A69
P 3500 1900
2019-06-01 18:10:07 +02:00
F 0 "R13" H 3570 1946 50 0000 L CNN
F 1 "10k" H 3570 1855 50 0000 L CNN
2019-06-01 18:10:07 +02:00
F 2 "Resistor_SMD:R_0603_1608Metric" V 3430 1900 50 0001 C CNN
F 3 "~" H 3500 1900 50 0001 C CNN
1 3500 1900
1 0 0 -1
$EndComp
$Comp
2019-06-01 18:10:07 +02:00
L Device:D_Schottky D9
U 1 1 5D544D70
P 3150 2150
2019-06-01 18:10:07 +02:00
F 0 "D9" H 3150 2250 50 0000 C CNN
F 1 "D_Schottky" H 3150 2050 50 0000 C CNN
2019-06-01 18:10:07 +02:00
F 2 "Diode_SMD:D_0603_1608Metric" H 3150 2150 50 0001 C CNN
F 3 "~" H 3150 2150 50 0001 C CNN
1 3150 2150
1 0 0 -1
$EndComp
Wire Wire Line
3300 2150 3500 2150
Wire Wire Line
3500 2150 3500 2050
Wire Wire Line
2000 2150 3000 2150
Wire Wire Line
3500 1750 3500 1650
Connection ~ 3500 1650
Wire Wire Line
3500 1650 4150 1650
Connection ~ 3500 2150
Wire Wire Line
3500 2150 3950 2150
Wire Wire Line
4150 2400 4550 2400
$Comp
L power:VCC #PWR?
U 1 1 5D6F060A
P 2450 3100
AR Path="/5CF41639/5D6F060A" Ref="#PWR?" Part="1"
2019-06-01 18:10:07 +02:00
AR Path="/5D77FDBE/5D7AF013/5D6F060A" Ref="#PWR023" Part="1"
F 0 "#PWR023" H 2450 2950 50 0001 C CNN
F 1 "VCC" H 2467 3273 50 0000 C CNN
F 2 "" H 2450 3100 50 0001 C CNN
F 3 "" H 2450 3100 50 0001 C CNN
1 2450 3100
1 0 0 -1
$EndComp
Wire Wire Line
2450 3100 2450 3200
Wire Wire Line
2450 3200 2550 3200
$Comp
L power:VCC #PWR?
U 1 1 5D6F756A
P 2550 4650
AR Path="/5CF41639/5D6F756A" Ref="#PWR?" Part="1"
2019-06-01 18:10:07 +02:00
AR Path="/5D77FDBE/5D7AF013/5D6F756A" Ref="#PWR024" Part="1"
F 0 "#PWR024" H 2550 4500 50 0001 C CNN
F 1 "VCC" H 2567 4823 50 0000 C CNN
F 2 "" H 2550 4650 50 0001 C CNN
F 3 "" H 2550 4650 50 0001 C CNN
1 2550 4650
1 0 0 -1
$EndComp
Wire Wire Line
2550 4650 2550 4750
$Comp
2019-06-01 18:10:07 +02:00
L Device:D_Schottky D11
U 1 1 5D7F6986
P 5800 3650
2019-06-01 18:10:07 +02:00
F 0 "D11" H 5800 3750 50 0000 C CNN
F 1 "D_Schottky" H 5800 3550 50 0000 C CNN
2019-06-01 18:10:07 +02:00
F 2 "Diode_SMD:D_0603_1608Metric" H 5800 3650 50 0001 C CNN
F 3 "~" H 5800 3650 50 0001 C CNN
1 5800 3650
0 -1 -1 0
$EndComp
$Comp
2019-06-01 18:10:07 +02:00
L Device:D_Schottky D12
U 1 1 5D7F6FF8
P 5800 4500
2019-06-01 18:10:07 +02:00
F 0 "D12" H 5800 4600 50 0000 C CNN
F 1 "D_Schottky" H 5800 4400 50 0000 C CNN
2019-06-01 18:10:07 +02:00
F 2 "Diode_SMD:D_0603_1608Metric" H 5800 4500 50 0001 C CNN
F 3 "~" H 5800 4500 50 0001 C CNN
1 5800 4500
0 1 1 0
$EndComp
Wire Notes Line
3950 4400 4000 4350
Wire Notes Line
4000 2300 4050 2250
Wire Notes Line
4000 2300 3950 2250
Wire Notes Line
4000 2150 3950 2150
Wire Notes Line
4000 2150 4000 2300
2019-05-30 21:36:22 +02:00
Wire Bus Line
2000 2700 3850 2700
Wire Bus Line
3850 2700 3850 4950
2019-05-30 20:24:33 +02:00
$EndSCHEMATC