2019-06-16 21:27:42 +02:00
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#ifndef FPGA_CELL_LUT34_H
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#define FPGA_CELL_LUT34_H
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#include "fpga_cell.h"
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enum lut_mode {LUT4, LUT3};
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struct fpga_cell_lut34 {
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struct fpga_cell base_cell;
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int sync; /* Register output on rising edge of clk */
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int led_lut_in_enable;
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int led_lut_out_enable;
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int lut_in_sel[4]; /* Input select */
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int drive_sel[4]; /* Which signal to drive onto each fabric line */
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int route_top_en[4]; /* Enable routing between top and main fabric */
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int route_left_en[4]; /* Enable routing between left and main fabric */
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int LUT4; /* Look-up table for LUT-4 configuration */
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int LUT3[2]; /* Look-up tables for LUT-3 configuration */
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enum lut_mode lut_mode; /* Look-up table mode selection */
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};
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2019-06-18 20:15:35 +02:00
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struct fpga_cell *fpga_cell_lut34_new();
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struct fpga_cell *fpga_cell_lut34_get_next_isp(struct fpga_cell *cell,
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enum fpga_isp_channel *isp_channel);
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2019-06-16 21:27:42 +02:00
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#endif // FPGA_CELL_LUT34_H
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