electronics/ttl-fpga
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ttl-fpga/kicad_pcb/ttl-fpga.kicad_pcb

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Start layout
2019-06-04 22:43:08 +02:00
(kicad_pcb (version 20171130) (host pcbnew 5.1.2)
(general
(thickness 1.6)
(drawings 4)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(tracks 1139)
Start layout
2019-06-04 22:43:08 +02:00
(zones 0)
(modules 71)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(nets 112)
Start layout
2019-06-04 22:43:08 +02:00
)
(page A4)
(layers
(0 F.Cu signal)
(31 B.Cu signal)
(32 B.Adhes user)
(33 F.Adhes user)
(34 B.Paste user)
(35 F.Paste user)
(36 B.SilkS user)
(37 F.SilkS user)
(38 B.Mask user)
(39 F.Mask user)
(40 Dwgs.User user)
(41 Cmts.User user)
(42 Eco1.User user)
(43 Eco2.User user)
(44 Edge.Cuts user)
(45 Margin user)
(46 B.CrtYd user)
(47 F.CrtYd user)
(48 B.Fab user hide)
(49 F.Fab user)
)
(setup
(last_trace_width 0.1524)
(trace_clearance 0.1524)
(zone_clearance 0.508)
(zone_45_only no)
(trace_min 0.1524)
(via_size 0.6)
(via_drill 0.3)
(via_min_size 0.4)
(via_min_drill 0.3)
(uvia_size 0.3)
(uvia_drill 0.1)
(uvias_allowed no)
(uvia_min_size 0.2)
(uvia_min_drill 0.1)
(edge_width 0.05)
(segment_width 0.2)
(pcb_text_width 0.3)
(pcb_text_size 1.5 1.5)
(mod_edge_width 0.12)
(mod_text_size 1 1)
(mod_text_width 0.15)
(pad_size 1.524 1.524)
(pad_drill 0.762)
(pad_to_mask_clearance 0.051)
(solder_mask_min_width 0.25)
(aux_axis_origin 0 0)
(visible_elements FFFFFF7F)
(pcbplotparams
(layerselection 0x010fc_ffffffff)
(usegerberextensions false)
(usegerberattributes false)
(usegerberadvancedattributes false)
(creategerberjobfile false)
(excludeedgelayer true)
(linewidth 0.100000)
(plotframeref false)
(viasonmask false)
(mode 1)
(useauxorigin false)
(hpglpennumber 1)
(hpglpenspeed 20)
(hpglpendiameter 15.000000)
(psnegative false)
(psa4output false)
(plotreference true)
(plotvalue true)
(plotinvisibletext false)
(padsonsilk false)
(subtractmaskfromsilk false)
(outputformat 1)
(mirror false)
(drillshape 1)
(scaleselection 1)
(outputdirectory ""))
)
(net 0 "")
(net 1 GND)
(net 2 VCC)
(net 3 "Net-(D1-Pad2)")
(net 4 /LogicBlock/cfg29)
(net 5 "Net-(D2-Pad2)")
(net 6 "Net-(D3-Pad2)")
(net 7 "Net-(D4-Pad2)")
(net 8 "Net-(D5-Pad2)")
(net 9 "Net-(D6-Pad1)")
(net 10 "Net-(D6-Pad2)")
(net 11 "Net-(D7-Pad1)")
(net 12 "Net-(D7-Pad2)")
(net 13 "Net-(D8-Pad2)")
(net 14 /LogicBlock/LUTD/lut_in3_n)
(net 15 /LogicBlock/LUTD/lut_b_en_n)
(net 16 /LogicBlock/LUTD/lut_a_en_n)
(net 17 /LogicBlock/LUTD/async_a)
(net 18 /LogicBlock/LUTD/async_c)
(net 19 /LogicBlock/LUTD/async_b)
(net 20 /fabric_t3)
(net 21 /fabric_t2)
(net 22 /fabric_t1)
(net 23 /fabric_t0)
(net 24 "Net-(J1-Pad8)")
(net 25 "Net-(J1-Pad7)")
(net 26 /LogicBlock/isp_mosi)
(net 27 /LogicBlock/isp_sck)
(net 28 /LogicBlock/rst_n)
(net 29 /LogicBlock/clk)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 30 /fabric_l0)
(net 31 /fabric_l1)
(net 32 /fabric_l2)
(net 33 /fabric_l3)
(net 34 /LogicBlock/isp_miso)
(net 35 "Net-(J3-Pad8)")
(net 36 /fabric_b2)
(net 37 /fabric_b1)
(net 38 /fabric_b0)
(net 39 "Net-(J4-Pad8)")
(net 40 "Net-(R2-Pad2)")
(net 41 /LogicBlock/lut_out_a)
(net 42 /LogicBlock/lut_out_c)
(net 43 /LogicBlock/lut_out_b)
(net 44 /LogicBlock/lut_out_b_async)
(net 45 "Net-(R8-Pad2)")
(net 46 /LogicBlock/cfg28)
(net 47 /LogicBlock/cfg0)
(net 48 /LogicBlock/cfg1)
(net 49 /LogicBlock/cfg2)
(net 50 /LogicBlock/cfg3)
(net 51 /LogicBlock/cfg4)
(net 52 /LogicBlock/cfg5)
(net 53 /LogicBlock/cfg6)
(net 54 /LogicBlock/cfg7)
(net 55 /LogicBlock/cfg15)
(net 56 /LogicBlock/cfg16)
(net 57 /LogicBlock/cfg17)
(net 58 /LogicBlock/cfg18)
(net 59 /LogicBlock/cfg19)
(net 60 /LogicBlock/cfg20)
(net 61 /LogicBlock/cfg21)
(net 62 /LogicBlock/cfg22)
(net 63 /LogicBlock/cfg23)
(net 64 /LogicBlock/cfg14)
(net 65 /LogicBlock/cfg13)
(net 66 /LogicBlock/cfg12)
(net 67 /LogicBlock/cfg11)
(net 68 /LogicBlock/cfg10)
(net 69 /LogicBlock/cfg9)
(net 70 /LogicBlock/cfg8)
(net 71 /LogicBlock/cfg30)
(net 72 /LogicBlock/cfg27)
(net 73 /LogicBlock/cfg26)
(net 74 /LogicBlock/cfg25)
(net 75 /LogicBlock/cfg24)
(net 76 /LogicBlock/lut_in0)
(net 77 /LogicBlock/lut_in2)
(net 78 /LogicBlock/lut_in1)
(net 79 /LogicBlock/lut_in3)
(net 80 "Net-(U13-Pad12)")
(net 81 "Net-(U13-Pad11)")
(net 82 "Net-(U13-Pad10)")
(net 83 "Net-(U13-Pad6)")
(net 84 "Net-(U13-Pad5)")
(net 85 "Net-(U13-Pad4)")
(net 86 "Net-(U13-Pad3)")
(net 87 "Net-(U14-Pad6)")
(net 88 /LogicBlock/LUTD/sync_a)
(net 89 /LogicBlock/LUTD/sync_c)
(net 90 /LogicBlock/LUTD/sync_b)
(net 91 "Net-(U16-Pad15)")
(net 92 "Net-(U16-Pad12)")
(net 93 "Net-(U16-Pad10)")
(net 94 "Net-(U17-Pad3)")
(net 95 "Net-(U17-Pad4)")
(net 96 "Net-(U17-Pad5)")
(net 97 "Net-(U17-Pad6)")
(net 98 "Net-(U17-Pad10)")
(net 99 "Net-(U17-Pad11)")
(net 100 "Net-(U17-Pad12)")
(net 101 "Net-(U18-Pad6)")
(net 102 "Net-(D8-Pad1)")
(net 103 "Net-(D9-Pad2)")
(net 104 "Net-(R3-Pad2)")
(net 105 "Net-(R9-Pad2)")
(net 106 /fabric_b3)
(net 107 /LogicBlock/cfgX)
(net 108 "Net-(U13-Pad1)")
(net 109 /LogicBlock/cfgLO)
(net 110 /miso)
(net 111 /mosi_d)
Start layout
2019-06-04 22:43:08 +02:00
(net_class Default "This is the default net class."
(clearance 0.1524)
(trace_width 0.1524)
(via_dia 0.6)
(via_drill 0.3)
(uvia_dia 0.3)
(uvia_drill 0.1)
(add_net /LogicBlock/LUTD/async_a)
(add_net /LogicBlock/LUTD/async_b)
(add_net /LogicBlock/LUTD/async_c)
(add_net /LogicBlock/LUTD/lut_a_en_n)
(add_net /LogicBlock/LUTD/lut_b_en_n)
(add_net /LogicBlock/LUTD/lut_in3_n)
(add_net /LogicBlock/LUTD/sync_a)
(add_net /LogicBlock/LUTD/sync_b)
(add_net /LogicBlock/LUTD/sync_c)
(add_net /LogicBlock/cfg0)
(add_net /LogicBlock/cfg1)
(add_net /LogicBlock/cfg10)
(add_net /LogicBlock/cfg11)
(add_net /LogicBlock/cfg12)
(add_net /LogicBlock/cfg13)
(add_net /LogicBlock/cfg14)
(add_net /LogicBlock/cfg15)
(add_net /LogicBlock/cfg16)
(add_net /LogicBlock/cfg17)
(add_net /LogicBlock/cfg18)
(add_net /LogicBlock/cfg19)
(add_net /LogicBlock/cfg2)
(add_net /LogicBlock/cfg20)
(add_net /LogicBlock/cfg21)
(add_net /LogicBlock/cfg22)
(add_net /LogicBlock/cfg23)
(add_net /LogicBlock/cfg24)
(add_net /LogicBlock/cfg25)
(add_net /LogicBlock/cfg26)
(add_net /LogicBlock/cfg27)
(add_net /LogicBlock/cfg28)
(add_net /LogicBlock/cfg29)
(add_net /LogicBlock/cfg3)
(add_net /LogicBlock/cfg30)
(add_net /LogicBlock/cfg4)
(add_net /LogicBlock/cfg5)
(add_net /LogicBlock/cfg6)
(add_net /LogicBlock/cfg7)
(add_net /LogicBlock/cfg8)
(add_net /LogicBlock/cfg9)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(add_net /LogicBlock/cfgLO)
(add_net /LogicBlock/cfgX)
Start layout
2019-06-04 22:43:08 +02:00
(add_net /LogicBlock/clk)
(add_net /LogicBlock/isp_miso)
(add_net /LogicBlock/isp_mosi)
(add_net /LogicBlock/isp_sck)
(add_net /LogicBlock/lut_in0)
(add_net /LogicBlock/lut_in1)
(add_net /LogicBlock/lut_in2)
(add_net /LogicBlock/lut_in3)
(add_net /LogicBlock/lut_out_a)
(add_net /LogicBlock/lut_out_b)
(add_net /LogicBlock/lut_out_b_async)
(add_net /LogicBlock/lut_out_c)
(add_net /LogicBlock/rst_n)
(add_net /fabric_b0)
(add_net /fabric_b1)
(add_net /fabric_b2)
(add_net /fabric_b3)
(add_net /fabric_l0)
(add_net /fabric_l1)
(add_net /fabric_l2)
(add_net /fabric_l3)
(add_net /fabric_t0)
(add_net /fabric_t1)
(add_net /fabric_t2)
(add_net /fabric_t3)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(add_net /miso)
(add_net /mosi_d)
Start layout
2019-06-04 22:43:08 +02:00
(add_net GND)
(add_net "Net-(D1-Pad2)")
(add_net "Net-(D2-Pad2)")
(add_net "Net-(D3-Pad2)")
(add_net "Net-(D4-Pad2)")
(add_net "Net-(D5-Pad2)")
(add_net "Net-(D6-Pad1)")
(add_net "Net-(D6-Pad2)")
(add_net "Net-(D7-Pad1)")
(add_net "Net-(D7-Pad2)")
(add_net "Net-(D8-Pad1)")
(add_net "Net-(D8-Pad2)")
(add_net "Net-(D9-Pad2)")
(add_net "Net-(J1-Pad7)")
(add_net "Net-(J1-Pad8)")
(add_net "Net-(J3-Pad8)")
(add_net "Net-(J4-Pad8)")
(add_net "Net-(R2-Pad2)")
(add_net "Net-(R3-Pad2)")
(add_net "Net-(R8-Pad2)")
(add_net "Net-(R9-Pad2)")
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(add_net "Net-(U13-Pad1)")
Start layout
2019-06-04 22:43:08 +02:00
(add_net "Net-(U13-Pad10)")
(add_net "Net-(U13-Pad11)")
(add_net "Net-(U13-Pad12)")
(add_net "Net-(U13-Pad3)")
(add_net "Net-(U13-Pad4)")
(add_net "Net-(U13-Pad5)")
(add_net "Net-(U13-Pad6)")
(add_net "Net-(U14-Pad6)")
(add_net "Net-(U16-Pad10)")
(add_net "Net-(U16-Pad12)")
(add_net "Net-(U16-Pad15)")
(add_net "Net-(U17-Pad10)")
(add_net "Net-(U17-Pad11)")
(add_net "Net-(U17-Pad12)")
(add_net "Net-(U17-Pad3)")
(add_net "Net-(U17-Pad4)")
(add_net "Net-(U17-Pad5)")
(add_net "Net-(U17-Pad6)")
(add_net "Net-(U18-Pad6)")
(add_net VCC)
)
(module Package_SO:SOIC-16_3.9x9.9mm_P1.27mm (layer F.Cu) (tedit 5C97300E) (tstamp 5CF7D198)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 223.33346 64.15788)
Start layout
2019-06-04 22:43:08 +02:00
(descr "SOIC, 16 Pin (JEDEC MS-012AC, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/soic_narrow-r/r_16.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py")
(tags "SOIC SO")
(path /5D77FDBE/5DDDB233)
(attr smd)
(fp_text reference U8 (at 0 -5.9) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 74251 (at 0 5.9) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 0 5.06) (end 1.95 5.06) (layer F.SilkS) (width 0.12))
(fp_line (start 0 5.06) (end -1.95 5.06) (layer F.SilkS) (width 0.12))
(fp_line (start 0 -5.06) (end 1.95 -5.06) (layer F.SilkS) (width 0.12))
(fp_line (start 0 -5.06) (end -3.45 -5.06) (layer F.SilkS) (width 0.12))
(fp_line (start -0.975 -4.95) (end 1.95 -4.95) (layer F.Fab) (width 0.1))
(fp_line (start 1.95 -4.95) (end 1.95 4.95) (layer F.Fab) (width 0.1))
(fp_line (start 1.95 4.95) (end -1.95 4.95) (layer F.Fab) (width 0.1))
(fp_line (start -1.95 4.95) (end -1.95 -3.975) (layer F.Fab) (width 0.1))
(fp_line (start -1.95 -3.975) (end -0.975 -4.95) (layer F.Fab) (width 0.1))
(fp_line (start -3.7 -5.2) (end -3.7 5.2) (layer F.CrtYd) (width 0.05))
(fp_line (start -3.7 5.2) (end 3.7 5.2) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.7 5.2) (end 3.7 -5.2) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.7 -5.2) (end -3.7 -5.2) (layer F.CrtYd) (width 0.05))
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.98 0.98) (thickness 0.15)))
)
(pad 1 smd roundrect (at -2.475 -4.445) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 32 /fabric_l2))
Start layout
2019-06-04 22:43:08 +02:00
(pad 2 smd roundrect (at -2.475 -3.175) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 33 /fabric_l3))
Start layout
2019-06-04 22:43:08 +02:00
(pad 3 smd roundrect (at -2.475 -1.905) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 30 /fabric_l0))
Start layout
2019-06-04 22:43:08 +02:00
(pad 4 smd roundrect (at -2.475 -0.635) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 36 /fabric_b2))
Start layout
2019-06-04 22:43:08 +02:00
(pad 5 smd roundrect (at -2.475 0.635) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 76 /LogicBlock/lut_in0))
Start layout
2019-06-04 22:43:08 +02:00
(pad 6 smd roundrect (at -2.475 1.905) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 9 "Net-(D6-Pad1)"))
(pad 7 smd roundrect (at -2.475 3.175) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 1 GND))
(pad 8 smd roundrect (at -2.475 4.445) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 1 GND))
(pad 9 smd roundrect (at 2.475 4.445) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 59 /LogicBlock/cfg19))
Start layout
2019-06-04 22:43:08 +02:00
(pad 10 smd roundrect (at 2.475 3.175) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 67 /LogicBlock/cfg11))
Start layout
2019-06-04 22:43:08 +02:00
(pad 11 smd roundrect (at 2.475 1.905) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 66 /LogicBlock/cfg12))
Start layout
2019-06-04 22:43:08 +02:00
(pad 12 smd roundrect (at 2.475 0.635) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 23 /fabric_t0))
(pad 13 smd roundrect (at 2.475 -0.635) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 38 /fabric_b0))
Layout input muxing
2019-06-05 23:32:39 +02:00
(pad 14 smd roundrect (at 2.475 -1.905) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 37 /fabric_b1))
Start layout
2019-06-04 22:43:08 +02:00
(pad 15 smd roundrect (at 2.475 -3.175) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 31 /fabric_l1))
Start layout
2019-06-04 22:43:08 +02:00
(pad 16 smd roundrect (at 2.475 -4.445) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 2 VCC))
(model ${KISYS3DMOD}/Package_SO.3dshapes/SOIC-16_3.9x9.9mm_P1.27mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5CF2C299)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 191.747021 50.486541)
Start layout
2019-06-04 22:43:08 +02:00
(descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
(tags capacitor)
(path /5D77FDBE/5D1457D8)
(attr smd)
(fp_text reference C2 (at 0 -1.43) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 100n (at 0 1.43) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.4 0.4) (thickness 0.06)))
)
(fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12))
(fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12))
(fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
(pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 1 GND))
(pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 2 VCC))
(model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5CF2C2AA)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 191.747021 55.506541)
Start layout
2019-06-04 22:43:08 +02:00
(descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
(tags capacitor)
(path /5D77FDBE/5D14873A)
(attr smd)
(fp_text reference C3 (at 0 -1.43) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 100n (at 0 1.43) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.4 0.4) (thickness 0.06)))
)
(fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12))
(fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12))
(fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
(pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 1 GND))
(pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 2 VCC))
(model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5CF2C2BB)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 191.357021 58.386541)
Start layout
2019-06-04 22:43:08 +02:00
(descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
(tags capacitor)
(path /5D77FDBE/5D148C32)
(attr smd)
(fp_text reference C4 (at 0 -1.43) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 100n (at 0 1.43) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12))
(fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12))
(fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.4 0.4) (thickness 0.06)))
)
(pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 2 VCC))
(pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 1 GND))
(model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5CF2C2CC)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 191.167021 63.406541)
Start layout
2019-06-04 22:43:08 +02:00
(descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
(tags capacitor)
(path /5D77FDBE/5D1490B6)
(attr smd)
(fp_text reference C5 (at 0 -1.43) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 100n (at 0 1.43) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.4 0.4) (thickness 0.06)))
)
(fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12))
(fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12))
(fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
(pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 1 GND))
(pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 2 VCC))
(model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5CF2C2DD)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 191.367021 60.896541)
Start layout
2019-06-04 22:43:08 +02:00
(descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
(tags capacitor)
(path /5D77FDBE/5D25277D)
(attr smd)
(fp_text reference C6 (at 0 -1.43) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 100n (at 0 1.43) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12))
(fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12))
(fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.4 0.4) (thickness 0.06)))
)
(pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 2 VCC))
(pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 1 GND))
(model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5CF2C2EE)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 191.557021 77.436541)
Start layout
2019-06-04 22:43:08 +02:00
(descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
(tags capacitor)
(path /5D77FDBE/5D252787)
(attr smd)
(fp_text reference C7 (at 0 -1.43) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 100n (at 0 1.43) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.4 0.4) (thickness 0.06)))
)
(fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12))
(fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12))
(fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
(pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 1 GND))
(pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 2 VCC))
(model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5CF2C2FF)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 191.747021 47.976541)
Start layout
2019-06-04 22:43:08 +02:00
(descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
(tags capacitor)
(path /5D77FDBE/5D252791)
(attr smd)
(fp_text reference C8 (at 0 -1.43) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 100n (at 0 1.43) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12))
(fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12))
(fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.4 0.4) (thickness 0.06)))
)
(pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 2 VCC))
(pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 1 GND))
(model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5CF2C310)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 191.82852 67.076541)
Start layout
2019-06-04 22:43:08 +02:00
(descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
(tags capacitor)
(path /5D77FDBE/5D25279B)
(attr smd)
(fp_text reference C9 (at 0 -1.43) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 100n (at 0 1.43) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.4 0.4) (thickness 0.06)))
)
(fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12))
(fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12))
(fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
(pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 1 GND))
(pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 2 VCC))
(model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5CF2C321)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 191.837021 69.666541)
Start layout
2019-06-04 22:43:08 +02:00
(descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
(tags capacitor)
(path /5D77FDBE/5D28B2CB)
(attr smd)
(fp_text reference C10 (at 0 -1.43) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 100n (at 0 1.43) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12))
(fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12))
(fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.4 0.4) (thickness 0.06)))
)
(pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 2 VCC))
(pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 1 GND))
(model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5CF2C332)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 191.837021 72.176541)
Start layout
2019-06-04 22:43:08 +02:00
(descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
(tags capacitor)
(path /5D77FDBE/5D28B2D5)
(attr smd)
(fp_text reference C11 (at 0 -1.43) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 100n (at 0 1.43) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.4 0.4) (thickness 0.06)))
)
(fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12))
(fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12))
(fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
(pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 1 GND))
(pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 2 VCC))
(model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5CF2C343)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 191.597021 74.846541)
Start layout
2019-06-04 22:43:08 +02:00
(descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
(tags capacitor)
(path /5D77FDBE/5E74B4E0)
(attr smd)
(fp_text reference C12 (at 0 -1.43) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 100n (at 0 1.43) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12))
(fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12))
(fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.4 0.4) (thickness 0.06)))
)
(pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 2 VCC))
(pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 1 GND))
(model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5CF2C354)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 191.747021 52.996541)
Start layout
2019-06-04 22:43:08 +02:00
(descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
(tags capacitor)
(path /5D77FDBE/5E74B4EA)
(attr smd)
(fp_text reference C13 (at 0 -1.43) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 100n (at 0 1.43) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12))
(fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12))
(fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.4 0.4) (thickness 0.06)))
)
(pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 2 VCC))
(pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 1 GND))
(model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5CF2C365)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 195.087021 82.916541)
Start layout
2019-06-04 22:43:08 +02:00
(descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
(tags capacitor)
(path /5D77FDBE/5D7AF013/5D182B36)
(attr smd)
(fp_text reference C14 (at 0 -1.43) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 100n (at 0 1.43) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12))
(fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12))
(fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.4 0.4) (thickness 0.06)))
)
(pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 2 VCC))
(pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 1 GND))
(model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5CF2C376)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 187.067021 82.996541)
Start layout
2019-06-04 22:43:08 +02:00
(descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
(tags capacitor)
(path /5D77FDBE/5D7AF013/5D2FCFE7)
(attr smd)
(fp_text reference C15 (at 0 -1.43) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 100n (at 0 1.43) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.4 0.4) (thickness 0.06)))
)
(fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12))
(fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12))
(fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
(pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 1 GND))
(pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 2 VCC))
(model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5CF2C387)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 191.077021 82.996541)
Start layout
2019-06-04 22:43:08 +02:00
(descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
(tags capacitor)
(path /5D77FDBE/5D7AF013/5D2EACB1)
(attr smd)
(fp_text reference C16 (at 0 -1.43) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 100n (at 0 1.43) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12))
(fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12))
(fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.4 0.4) (thickness 0.06)))
)
(pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 2 VCC))
(pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 1 GND))
(model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5CF2C398)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 183.057021 85.506541)
Start layout
2019-06-04 22:43:08 +02:00
(descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
(tags capacitor)
(path /5D77FDBE/5D7AF013/5D2EACB7)
(attr smd)
(fp_text reference C17 (at 0 -1.43) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 100n (at 0 1.43) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.4 0.4) (thickness 0.06)))
)
(fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12))
(fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12))
(fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
(pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 1 GND))
(pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 2 VCC))
(model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5CF2C3A9)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 187.067021 85.506541)
Start layout
2019-06-04 22:43:08 +02:00
(descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
(tags capacitor)
(path /5D77FDBE/5D7AF013/5D2EACBD)
(attr smd)
(fp_text reference C18 (at 0 -1.43) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 100n (at 0 1.43) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12))
(fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12))
(fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.4 0.4) (thickness 0.06)))
)
(pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 2 VCC))
(pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 1 GND))
(model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5CF2C3BA)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 191.077021 85.506541)
Start layout
2019-06-04 22:43:08 +02:00
(descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
(tags capacitor)
(path /5D77FDBE/5D7AF013/5D2EACC3)
(attr smd)
(fp_text reference C19 (at 0 -1.43) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 100n (at 0 1.43) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.4 0.4) (thickness 0.06)))
)
(fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12))
(fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12))
(fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
(pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 1 GND))
(pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 2 VCC))
(model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5CF2C3CB)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 191.157021 80.406541)
Start layout
2019-06-04 22:43:08 +02:00
(descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
(tags capacitor)
(path /5D77FDBE/5D7AF013/5D2FCD73)
(attr smd)
(fp_text reference C20 (at 0 -1.43) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 100n (at 0 1.43) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12))
(fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12))
(fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.4 0.4) (thickness 0.06)))
)
(pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 2 VCC))
(pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 1 GND))
(model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module LED_SMD:LED_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5CF2C3DE)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 255.28006 89.8525)
Start layout
2019-06-04 22:43:08 +02:00
(descr "LED SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
(tags diode)
(path /5D77FDBE/5D3B34E8)
(attr smd)
(fp_text reference D2 (at 0 -1.43) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value A (at 0 1.43) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.4 0.4) (thickness 0.06)))
)
(fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.485 0.735) (end 0.8 0.735) (layer F.SilkS) (width 0.12))
(fp_line (start -1.485 -0.735) (end -1.485 0.735) (layer F.SilkS) (width 0.12))
(fp_line (start 0.8 -0.735) (end -1.485 -0.735) (layer F.SilkS) (width 0.12))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 -0.1) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.5 -0.4) (end -0.8 -0.1) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end -0.5 -0.4) (layer F.Fab) (width 0.1))
(pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 5 "Net-(D2-Pad2)"))
(pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 107 /LogicBlock/cfgX))
Start layout
2019-06-04 22:43:08 +02:00
(model ${KISYS3DMOD}/LED_SMD.3dshapes/LED_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module LED_SMD:LED_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5CF2C3F1)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 255.28006 92.3925)
Start layout
2019-06-04 22:43:08 +02:00
(descr "LED SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
(tags diode)
(path /5D77FDBE/5D3B34EE)
(attr smd)
(fp_text reference D3 (at 0 -1.43) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value C (at 0 1.43) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 0.8 -0.4) (end -0.5 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.5 -0.4) (end -0.8 -0.1) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 -0.1) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.735) (end -1.485 -0.735) (layer F.SilkS) (width 0.12))
(fp_line (start -1.485 -0.735) (end -1.485 0.735) (layer F.SilkS) (width 0.12))
(fp_line (start -1.485 0.735) (end 0.8 0.735) (layer F.SilkS) (width 0.12))
(fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.4 0.4) (thickness 0.06)))
)
(pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 107 /LogicBlock/cfgX))
Start layout
2019-06-04 22:43:08 +02:00
(pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 6 "Net-(D3-Pad2)"))
(model ${KISYS3DMOD}/LED_SMD.3dshapes/LED_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module LED_SMD:LED_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5CF2C404)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 255.28006 94.9325)
Start layout
2019-06-04 22:43:08 +02:00
(descr "LED SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
(tags diode)
(path /5D77FDBE/5D3B34F4)
(attr smd)
(fp_text reference D4 (at 0 -1.43) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value B (at 0 1.43) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.4 0.4) (thickness 0.06)))
)
(fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.485 0.735) (end 0.8 0.735) (layer F.SilkS) (width 0.12))
(fp_line (start -1.485 -0.735) (end -1.485 0.735) (layer F.SilkS) (width 0.12))
(fp_line (start 0.8 -0.735) (end -1.485 -0.735) (layer F.SilkS) (width 0.12))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 -0.1) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.5 -0.4) (end -0.8 -0.1) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end -0.5 -0.4) (layer F.Fab) (width 0.1))
(pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 7 "Net-(D4-Pad2)"))
(pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 107 /LogicBlock/cfgX))
Start layout
2019-06-04 22:43:08 +02:00
(model ${KISYS3DMOD}/LED_SMD.3dshapes/LED_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module LED_SMD:LED_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5CF2C417)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 255.28006 97.4725)
Start layout
2019-06-04 22:43:08 +02:00
(descr "LED SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
(tags diode)
(path /5D77FDBE/5D3B34FA)
(attr smd)
(fp_text reference D5 (at 0 -1.43) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value b (at 0 1.43) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 0.8 -0.4) (end -0.5 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.5 -0.4) (end -0.8 -0.1) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 -0.1) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.735) (end -1.485 -0.735) (layer F.SilkS) (width 0.12))
(fp_line (start -1.485 -0.735) (end -1.485 0.735) (layer F.SilkS) (width 0.12))
(fp_line (start -1.485 0.735) (end 0.8 0.735) (layer F.SilkS) (width 0.12))
(fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.4 0.4) (thickness 0.06)))
)
(pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 107 /LogicBlock/cfgX))
Start layout
2019-06-04 22:43:08 +02:00
(pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 8 "Net-(D5-Pad2)"))
(model ${KISYS3DMOD}/LED_SMD.3dshapes/LED_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module LED_SMD:LED_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5CF2C42A)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 256.01158 38.33876)
Start layout
2019-06-04 22:43:08 +02:00
(descr "LED SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
(tags diode)
(path /5D77FDBE/5E3D1F59)
(attr smd)
(fp_text reference D6 (at 0 -1.43) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 0 (at 0 1.43) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.4 0.4) (thickness 0.06)))
)
(fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.485 0.735) (end 0.8 0.735) (layer F.SilkS) (width 0.12))
(fp_line (start -1.485 -0.735) (end -1.485 0.735) (layer F.SilkS) (width 0.12))
(fp_line (start 0.8 -0.735) (end -1.485 -0.735) (layer F.SilkS) (width 0.12))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 -0.1) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.5 -0.4) (end -0.8 -0.1) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end -0.5 -0.4) (layer F.Fab) (width 0.1))
(pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 10 "Net-(D6-Pad2)"))
(pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 9 "Net-(D6-Pad1)"))
(model ${KISYS3DMOD}/LED_SMD.3dshapes/LED_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module LED_SMD:LED_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5CF2C43D)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 256.01158 40.87876)
Start layout
2019-06-04 22:43:08 +02:00
(descr "LED SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
(tags diode)
(path /5D77FDBE/5E44A4C7)
(attr smd)
(fp_text reference D7 (at 0 -1.43) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 2 (at 0 1.43) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 0.8 -0.4) (end -0.5 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.5 -0.4) (end -0.8 -0.1) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 -0.1) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.735) (end -1.485 -0.735) (layer F.SilkS) (width 0.12))
(fp_line (start -1.485 -0.735) (end -1.485 0.735) (layer F.SilkS) (width 0.12))
(fp_line (start -1.485 0.735) (end 0.8 0.735) (layer F.SilkS) (width 0.12))
(fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.4 0.4) (thickness 0.06)))
)
(pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 11 "Net-(D7-Pad1)"))
(pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 12 "Net-(D7-Pad2)"))
(model ${KISYS3DMOD}/LED_SMD.3dshapes/LED_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module LED_SMD:LED_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5CF2C450)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 256.01158 43.41876)
Start layout
2019-06-04 22:43:08 +02:00
(descr "LED SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
(tags diode)
(path /5D77FDBE/5E49C4FE)
(attr smd)
(fp_text reference D8 (at 0 -1.43) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 1 (at 0 1.43) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 0.8 -0.4) (end -0.5 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.5 -0.4) (end -0.8 -0.1) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 -0.1) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.735) (end -1.485 -0.735) (layer F.SilkS) (width 0.12))
(fp_line (start -1.485 -0.735) (end -1.485 0.735) (layer F.SilkS) (width 0.12))
(fp_line (start -1.485 0.735) (end 0.8 0.735) (layer F.SilkS) (width 0.12))
(fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.4 0.4) (thickness 0.06)))
)
(pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 102 "Net-(D8-Pad1)"))
Start layout
2019-06-04 22:43:08 +02:00
(pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 13 "Net-(D8-Pad2)"))
(model ${KISYS3DMOD}/LED_SMD.3dshapes/LED_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module LED_SMD:LED_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5CF2C463)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 256.01158 45.95876)
Start layout
2019-06-04 22:43:08 +02:00
(descr "LED SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
(tags diode)
(path /5D77FDBE/5E49C517)
(attr smd)
(fp_text reference D9 (at 0 -1.43) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 3 (at 0 1.43) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.4 0.4) (thickness 0.06)))
)
(fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.485 0.735) (end 0.8 0.735) (layer F.SilkS) (width 0.12))
(fp_line (start -1.485 -0.735) (end -1.485 0.735) (layer F.SilkS) (width 0.12))
(fp_line (start 0.8 -0.735) (end -1.485 -0.735) (layer F.SilkS) (width 0.12))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 -0.1) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.5 -0.4) (end -0.8 -0.1) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end -0.5 -0.4) (layer F.Fab) (width 0.1))
(pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 103 "Net-(D9-Pad2)"))
Start layout
2019-06-04 22:43:08 +02:00
(pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 14 /LogicBlock/LUTD/lut_in3_n))
(model ${KISYS3DMOD}/LED_SMD.3dshapes/LED_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Diode_SMD:D_0603_1608Metric (layer B.Cu) (tedit 5B301BBE) (tstamp 5CF54C28)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 221.7675 71.12)
Start layout
2019-06-04 22:43:08 +02:00
(descr "Diode SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
(tags diode)
(path /5D77FDBE/5D7AF013/5D544D70)
(attr smd)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(fp_text reference D10 (at 0 1.43) (layer B.SilkS)
Start layout
2019-06-04 22:43:08 +02:00
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(fp_text value D_Schottky (at 0 -1.43) (layer B.Fab)
Start layout
2019-06-04 22:43:08 +02:00
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_line (start 0.8 0.4) (end -0.5 0.4) (layer B.Fab) (width 0.1))
(fp_line (start -0.5 0.4) (end -0.8 0.1) (layer B.Fab) (width 0.1))
(fp_line (start -0.8 0.1) (end -0.8 -0.4) (layer B.Fab) (width 0.1))
(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer B.Fab) (width 0.1))
(fp_line (start 0.8 0.735) (end -1.485 0.735) (layer B.SilkS) (width 0.12))
(fp_line (start -1.485 0.735) (end -1.485 -0.735) (layer B.SilkS) (width 0.12))
(fp_line (start -1.485 -0.735) (end 0.8 -0.735) (layer B.SilkS) (width 0.12))
(fp_line (start -1.48 -0.73) (end -1.48 0.73) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.48 0.73) (end 1.48 0.73) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.48 0.73) (end 1.48 -0.73) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.48 -0.73) (end -1.48 -0.73) (layer B.CrtYd) (width 0.05))
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(fp_text user %R (at 0 0) (layer B.Fab)
Start layout
2019-06-04 22:43:08 +02:00
(effects (font (size 0.4 0.4) (thickness 0.06)) (justify mirror))
)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 14 /LogicBlock/LUTD/lut_in3_n))
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 15 /LogicBlock/LUTD/lut_b_en_n))
(model ${KISYS3DMOD}/Diode_SMD.3dshapes/D_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Diode_SMD:D_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5CF2C489)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 232.8925 71.12 180)
Start layout
2019-06-04 22:43:08 +02:00
(descr "Diode SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
(tags diode)
(path /5D77FDBE/5D7AF013/5D50C782)
(attr smd)
(fp_text reference D11 (at 0 -1.43) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value D_Schottky (at 0 1.43) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 0.8 -0.4) (end -0.5 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.5 -0.4) (end -0.8 -0.1) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 -0.1) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.735) (end -1.485 -0.735) (layer F.SilkS) (width 0.12))
(fp_line (start -1.485 -0.735) (end -1.485 0.735) (layer F.SilkS) (width 0.12))
(fp_line (start -1.485 0.735) (end 0.8 0.735) (layer F.SilkS) (width 0.12))
(fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.4 0.4) (thickness 0.06)))
)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 79 /LogicBlock/lut_in3))
(pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 16 /LogicBlock/LUTD/lut_a_en_n))
(model ${KISYS3DMOD}/Diode_SMD.3dshapes/D_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Diode_SMD:D_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5CF2C49C)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 237.49 78.5875 270)
Start layout
2019-06-04 22:43:08 +02:00
(descr "Diode SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
(tags diode)
(path /5D77FDBE/5D7AF013/5D7F6986)
(attr smd)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(fp_text reference D12 (at 0 -1.43 90) (layer F.SilkS)
Start layout
2019-06-04 22:43:08 +02:00
(effects (font (size 1 1) (thickness 0.15)))
)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(fp_text value D_Schottky (at 0 1.43 90) (layer F.Fab)
Start layout
2019-06-04 22:43:08 +02:00
(effects (font (size 1 1) (thickness 0.15)))
)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(fp_text user %R (at 0 0 90) (layer F.Fab)
Start layout
2019-06-04 22:43:08 +02:00
(effects (font (size 0.4 0.4) (thickness 0.06)))
)
(fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.485 0.735) (end 0.8 0.735) (layer F.SilkS) (width 0.12))
(fp_line (start -1.485 -0.735) (end -1.485 0.735) (layer F.SilkS) (width 0.12))
(fp_line (start 0.8 -0.735) (end -1.485 -0.735) (layer F.SilkS) (width 0.12))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 -0.1) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.5 -0.4) (end -0.8 -0.1) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end -0.5 -0.4) (layer F.Fab) (width 0.1))
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 17 /LogicBlock/LUTD/async_a))
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 18 /LogicBlock/LUTD/async_c))
(model ${KISYS3DMOD}/Diode_SMD.3dshapes/D_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Diode_SMD:D_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5CF2C4AF)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 237.49 75.4125 90)
Start layout
2019-06-04 22:43:08 +02:00
(descr "Diode SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
(tags diode)
(path /5D77FDBE/5D7AF013/5D7F6FF8)
(attr smd)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(fp_text reference D13 (at 0 -1.43 90) (layer F.SilkS)
Start layout
2019-06-04 22:43:08 +02:00
(effects (font (size 1 1) (thickness 0.15)))
)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(fp_text value D_Schottky (at 0 1.43 90) (layer F.Fab)
Start layout
2019-06-04 22:43:08 +02:00
(effects (font (size 1 1) (thickness 0.15)))
)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(fp_text user %R (at 0 0 90) (layer F.Fab)
Start layout
2019-06-04 22:43:08 +02:00
(effects (font (size 0.4 0.4) (thickness 0.06)))
)
(fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.485 0.735) (end 0.8 0.735) (layer F.SilkS) (width 0.12))
(fp_line (start -1.485 -0.735) (end -1.485 0.735) (layer F.SilkS) (width 0.12))
(fp_line (start 0.8 -0.735) (end -1.485 -0.735) (layer F.SilkS) (width 0.12))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 -0.1) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.5 -0.4) (end -0.8 -0.1) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end -0.5 -0.4) (layer F.Fab) (width 0.1))
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 19 /LogicBlock/LUTD/async_b))
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 18 /LogicBlock/LUTD/async_c))
(model ${KISYS3DMOD}/Diode_SMD.3dshapes/D_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Connector_PinSocket_2.54mm:PinSocket_1x12_P2.54mm_Horizontal (layer F.Cu) (tedit 5A19A41E) (tstamp 5CF37D30)
(at 209.55 53.34)
(descr "Through hole angled socket strip, 1x12, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated")
(tags "Through hole angled socket strip THT 1x12 2.54mm single row")
(path /5FE88CA2)
(fp_text reference J2 (at -4.38 -2.77) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value Left (at -4.38 30.71) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -10.03 -1.27) (end -2.49 -1.27) (layer F.Fab) (width 0.1))
(fp_line (start -2.49 -1.27) (end -1.52 -0.3) (layer F.Fab) (width 0.1))
(fp_line (start -1.52 -0.3) (end -1.52 29.21) (layer F.Fab) (width 0.1))
(fp_line (start -1.52 29.21) (end -10.03 29.21) (layer F.Fab) (width 0.1))
(fp_line (start -10.03 29.21) (end -10.03 -1.27) (layer F.Fab) (width 0.1))
(fp_line (start 0 -0.3) (end -1.52 -0.3) (layer F.Fab) (width 0.1))
(fp_line (start -1.52 0.3) (end 0 0.3) (layer F.Fab) (width 0.1))
(fp_line (start 0 0.3) (end 0 -0.3) (layer F.Fab) (width 0.1))
(fp_line (start 0 2.24) (end -1.52 2.24) (layer F.Fab) (width 0.1))
(fp_line (start -1.52 2.84) (end 0 2.84) (layer F.Fab) (width 0.1))
(fp_line (start 0 2.84) (end 0 2.24) (layer F.Fab) (width 0.1))
(fp_line (start 0 4.78) (end -1.52 4.78) (layer F.Fab) (width 0.1))
(fp_line (start -1.52 5.38) (end 0 5.38) (layer F.Fab) (width 0.1))
(fp_line (start 0 5.38) (end 0 4.78) (layer F.Fab) (width 0.1))
(fp_line (start 0 7.32) (end -1.52 7.32) (layer F.Fab) (width 0.1))
(fp_line (start -1.52 7.92) (end 0 7.92) (layer F.Fab) (width 0.1))
(fp_line (start 0 7.92) (end 0 7.32) (layer F.Fab) (width 0.1))
(fp_line (start 0 9.86) (end -1.52 9.86) (layer F.Fab) (width 0.1))
(fp_line (start -1.52 10.46) (end 0 10.46) (layer F.Fab) (width 0.1))
(fp_line (start 0 10.46) (end 0 9.86) (layer F.Fab) (width 0.1))
(fp_line (start 0 12.4) (end -1.52 12.4) (layer F.Fab) (width 0.1))
(fp_line (start -1.52 13) (end 0 13) (layer F.Fab) (width 0.1))
(fp_line (start 0 13) (end 0 12.4) (layer F.Fab) (width 0.1))
(fp_line (start 0 14.94) (end -1.52 14.94) (layer F.Fab) (width 0.1))
(fp_line (start -1.52 15.54) (end 0 15.54) (layer F.Fab) (width 0.1))
(fp_line (start 0 15.54) (end 0 14.94) (layer F.Fab) (width 0.1))
(fp_line (start 0 17.48) (end -1.52 17.48) (layer F.Fab) (width 0.1))
(fp_line (start -1.52 18.08) (end 0 18.08) (layer F.Fab) (width 0.1))
(fp_line (start 0 18.08) (end 0 17.48) (layer F.Fab) (width 0.1))
(fp_line (start 0 20.02) (end -1.52 20.02) (layer F.Fab) (width 0.1))
(fp_line (start -1.52 20.62) (end 0 20.62) (layer F.Fab) (width 0.1))
(fp_line (start 0 20.62) (end 0 20.02) (layer F.Fab) (width 0.1))
(fp_line (start 0 22.56) (end -1.52 22.56) (layer F.Fab) (width 0.1))
(fp_line (start -1.52 23.16) (end 0 23.16) (layer F.Fab) (width 0.1))
(fp_line (start 0 23.16) (end 0 22.56) (layer F.Fab) (width 0.1))
(fp_line (start 0 25.1) (end -1.52 25.1) (layer F.Fab) (width 0.1))
(fp_line (start -1.52 25.7) (end 0 25.7) (layer F.Fab) (width 0.1))
(fp_line (start 0 25.7) (end 0 25.1) (layer F.Fab) (width 0.1))
(fp_line (start 0 27.64) (end -1.52 27.64) (layer F.Fab) (width 0.1))
(fp_line (start -1.52 28.24) (end 0 28.24) (layer F.Fab) (width 0.1))
(fp_line (start 0 28.24) (end 0 27.64) (layer F.Fab) (width 0.1))
(fp_line (start -10.09 -1.21) (end -1.46 -1.21) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 -1.091905) (end -1.46 -1.091905) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 -0.97381) (end -1.46 -0.97381) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 -0.855715) (end -1.46 -0.855715) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 -0.73762) (end -1.46 -0.73762) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 -0.619525) (end -1.46 -0.619525) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 -0.50143) (end -1.46 -0.50143) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 -0.383335) (end -1.46 -0.383335) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 -0.26524) (end -1.46 -0.26524) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 -0.147145) (end -1.46 -0.147145) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 -0.02905) (end -1.46 -0.02905) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 0.089045) (end -1.46 0.089045) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 0.20714) (end -1.46 0.20714) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 0.325235) (end -1.46 0.325235) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 0.44333) (end -1.46 0.44333) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 0.561425) (end -1.46 0.561425) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 0.67952) (end -1.46 0.67952) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 0.797615) (end -1.46 0.797615) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 0.91571) (end -1.46 0.91571) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 1.033805) (end -1.46 1.033805) (layer F.SilkS) (width 0.12))
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(fp_text user %R (at -5.775 13.97 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 2 VCC))
(pad 2 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 1 GND))
(pad 3 thru_hole oval (at 0 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 29 /LogicBlock/clk))
(pad 4 thru_hole oval (at 0 7.62) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 28 /LogicBlock/rst_n))
(pad 5 thru_hole oval (at 0 10.16) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 27 /LogicBlock/isp_sck))
(pad 6 thru_hole oval (at 0 12.7) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 26 /LogicBlock/isp_mosi))
(pad 7 thru_hole oval (at 0 15.24) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 110 /miso))
Start layout
2019-06-04 22:43:08 +02:00
(pad 8 thru_hole oval (at 0 17.78) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 111 /mosi_d))
Start layout
2019-06-04 22:43:08 +02:00
(pad 9 thru_hole oval (at 0 20.32) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 33 /fabric_l3))
Start layout
2019-06-04 22:43:08 +02:00
(pad 10 thru_hole oval (at 0 22.86) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 32 /fabric_l2))
Start layout
2019-06-04 22:43:08 +02:00
(pad 11 thru_hole oval (at 0 25.4) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 31 /fabric_l1))
Start layout
2019-06-04 22:43:08 +02:00
(pad 12 thru_hole oval (at 0 27.94) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 30 /fabric_l0))
Start layout
2019-06-04 22:43:08 +02:00
(model ${KISYS3DMOD}/Connector_PinSocket_2.54mm.3dshapes/PinSocket_1x12_P2.54mm_Horizontal.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
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(at 255.27 53.34)
(descr "Through hole angled pin header, 1x12, 2.54mm pitch, 6mm pin length, single row")
(tags "Through hole angled pin header THT 1x12 2.54mm single row")
(path /5CF23FEF)
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(fp_line (start 1.44 19.05) (end 4.1 19.05) (layer F.SilkS) (width 0.12))
(fp_line (start 4.1 19.94) (end 10.1 19.94) (layer F.SilkS) (width 0.12))
(fp_line (start 10.1 19.94) (end 10.1 20.7) (layer F.SilkS) (width 0.12))
(fp_line (start 10.1 20.7) (end 4.1 20.7) (layer F.SilkS) (width 0.12))
(fp_line (start 1.042929 19.94) (end 1.44 19.94) (layer F.SilkS) (width 0.12))
(fp_line (start 1.042929 20.7) (end 1.44 20.7) (layer F.SilkS) (width 0.12))
(fp_line (start 1.44 21.59) (end 4.1 21.59) (layer F.SilkS) (width 0.12))
(fp_line (start 4.1 22.48) (end 10.1 22.48) (layer F.SilkS) (width 0.12))
(fp_line (start 10.1 22.48) (end 10.1 23.24) (layer F.SilkS) (width 0.12))
(fp_line (start 10.1 23.24) (end 4.1 23.24) (layer F.SilkS) (width 0.12))
(fp_line (start 1.042929 22.48) (end 1.44 22.48) (layer F.SilkS) (width 0.12))
(fp_line (start 1.042929 23.24) (end 1.44 23.24) (layer F.SilkS) (width 0.12))
(fp_line (start 1.44 24.13) (end 4.1 24.13) (layer F.SilkS) (width 0.12))
(fp_line (start 4.1 25.02) (end 10.1 25.02) (layer F.SilkS) (width 0.12))
(fp_line (start 10.1 25.02) (end 10.1 25.78) (layer F.SilkS) (width 0.12))
(fp_line (start 10.1 25.78) (end 4.1 25.78) (layer F.SilkS) (width 0.12))
(fp_line (start 1.042929 25.02) (end 1.44 25.02) (layer F.SilkS) (width 0.12))
(fp_line (start 1.042929 25.78) (end 1.44 25.78) (layer F.SilkS) (width 0.12))
(fp_line (start 1.44 26.67) (end 4.1 26.67) (layer F.SilkS) (width 0.12))
(fp_line (start 4.1 27.56) (end 10.1 27.56) (layer F.SilkS) (width 0.12))
(fp_line (start 10.1 27.56) (end 10.1 28.32) (layer F.SilkS) (width 0.12))
(fp_line (start 10.1 28.32) (end 4.1 28.32) (layer F.SilkS) (width 0.12))
(fp_line (start 1.042929 27.56) (end 1.44 27.56) (layer F.SilkS) (width 0.12))
(fp_line (start 1.042929 28.32) (end 1.44 28.32) (layer F.SilkS) (width 0.12))
(fp_line (start -1.27 0) (end -1.27 -1.27) (layer F.SilkS) (width 0.12))
(fp_line (start -1.27 -1.27) (end 0 -1.27) (layer F.SilkS) (width 0.12))
(fp_line (start -1.8 -1.8) (end -1.8 29.75) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.8 29.75) (end 10.55 29.75) (layer F.CrtYd) (width 0.05))
(fp_line (start 10.55 29.75) (end 10.55 -1.8) (layer F.CrtYd) (width 0.05))
(fp_line (start 10.55 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05))
(fp_text user %R (at 2.77 13.97 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 2 VCC))
(pad 2 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 1 GND))
(pad 3 thru_hole oval (at 0 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 29 /LogicBlock/clk))
(pad 4 thru_hole oval (at 0 7.62) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 28 /LogicBlock/rst_n))
(pad 5 thru_hole oval (at 0 10.16) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 27 /LogicBlock/isp_sck))
(pad 6 thru_hole oval (at 0 12.7) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 34 /LogicBlock/isp_miso))
Start layout
2019-06-04 22:43:08 +02:00
(pad 7 thru_hole oval (at 0 15.24) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 110 /miso))
Start layout
2019-06-04 22:43:08 +02:00
(pad 8 thru_hole oval (at 0 17.78) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 35 "Net-(J3-Pad8)"))
Start layout
2019-06-04 22:43:08 +02:00
(pad 9 thru_hole oval (at 0 20.32) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 106 /fabric_b3))
Start layout
2019-06-04 22:43:08 +02:00
(pad 10 thru_hole oval (at 0 22.86) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 36 /fabric_b2))
Start layout
2019-06-04 22:43:08 +02:00
(pad 11 thru_hole oval (at 0 25.4) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 37 /fabric_b1))
Start layout
2019-06-04 22:43:08 +02:00
(pad 12 thru_hole oval (at 0 27.94) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 38 /fabric_b0))
Start layout
2019-06-04 22:43:08 +02:00
(model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x12_P2.54mm_Horizontal.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5CF2C722)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 247.1675 52.07 180)
Start layout
2019-06-04 22:43:08 +02:00
(descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
(tags resistor)
(path /5D77FDBE/5F4F0B12)
(attr smd)
(fp_text reference R2 (at 0 -1.43) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 470 (at 0 1.43) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12))
(fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12))
(fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.4 0.4) (thickness 0.06)))
)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 38 /fabric_b0))
(pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 40 "Net-(R2-Pad2)"))
Start layout
2019-06-04 22:43:08 +02:00
(model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5CF2C733)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 249.47118 51.5748 90)
Start layout
2019-06-04 22:43:08 +02:00
(descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
(tags resistor)
(path /5D77FDBE/5F6AC414)
(attr smd)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(fp_text reference R3 (at 0 -1.43 90) (layer F.SilkS)
Start layout
2019-06-04 22:43:08 +02:00
(effects (font (size 1 1) (thickness 0.15)))
)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(fp_text value 470 (at 0 1.43 90) (layer F.Fab)
Start layout
2019-06-04 22:43:08 +02:00
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12))
(fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12))
(fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05))
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(fp_text user %R (at 0 0 90) (layer F.Fab)
Start layout
2019-06-04 22:43:08 +02:00
(effects (font (size 0.4 0.4) (thickness 0.06)))
)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 37 /fabric_b1))
(pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 104 "Net-(R3-Pad2)"))
Start layout
2019-06-04 22:43:08 +02:00
(model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5CF2C744)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 259.09006 89.8525)
Start layout
2019-06-04 22:43:08 +02:00
(descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
(tags resistor)
(path /5D77FDBE/5D3B34C8)
(attr smd)
(fp_text reference R4 (at 0 -1.43) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 470 (at 0 1.43) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12))
(fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12))
(fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.4 0.4) (thickness 0.06)))
)
(pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 41 /LogicBlock/lut_out_a))
Start layout
2019-06-04 22:43:08 +02:00
(pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 5 "Net-(D2-Pad2)"))
(model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5CF2C755)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 258.60756 92.3925)
Start layout
2019-06-04 22:43:08 +02:00
(descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
(tags resistor)
(path /5D77FDBE/5D3B34D6)
(attr smd)
(fp_text reference R5 (at 0 -1.43) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 470 (at 0 1.43) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12))
(fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12))
(fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.4 0.4) (thickness 0.06)))
)
(pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 42 /LogicBlock/lut_out_c))
Start layout
2019-06-04 22:43:08 +02:00
(pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 6 "Net-(D3-Pad2)"))
(model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5CF2C766)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 259.09006 94.9325)
Start layout
2019-06-04 22:43:08 +02:00
(descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
(tags resistor)
(path /5D77FDBE/5D3B34DC)
(attr smd)
(fp_text reference R6 (at 0 -1.43) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 470 (at 0 1.43) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.4 0.4) (thickness 0.06)))
)
(fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12))
(fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12))
(fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
(pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 7 "Net-(D4-Pad2)"))
(pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 43 /LogicBlock/lut_out_b))
Start layout
2019-06-04 22:43:08 +02:00
(model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5CF2C777)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 259.09006 97.4725)
Start layout
2019-06-04 22:43:08 +02:00
(descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
(tags resistor)
(path /5D77FDBE/5D3B34E2)
(attr smd)
(fp_text reference R7 (at 0 -1.43) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 470 (at 0 1.43) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.4 0.4) (thickness 0.06)))
)
(fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12))
(fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12))
(fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
(pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 8 "Net-(D5-Pad2)"))
(pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 44 /LogicBlock/lut_out_b_async))
Start layout
2019-06-04 22:43:08 +02:00
(model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5CF2C788)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 239.5475 52.07 180)
Start layout
2019-06-04 22:43:08 +02:00
(descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
(tags resistor)
(path /5D77FDBE/5F6D346A)
(attr smd)
(fp_text reference R8 (at 0 -1.43) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 470 (at 0 1.43) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.4 0.4) (thickness 0.06)))
)
(fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12))
(fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12))
(fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 45 "Net-(R8-Pad2)"))
(pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 36 /fabric_b2))
Start layout
2019-06-04 22:43:08 +02:00
(model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5CF2C799)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 247.1675 49.53 180)
Start layout
2019-06-04 22:43:08 +02:00
(descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
(tags resistor)
(path /5D77FDBE/5F6FE7F1)
(attr smd)
(fp_text reference R9 (at 0 -1.43) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 470 (at 0 1.43) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12))
(fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12))
(fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.4 0.4) (thickness 0.06)))
)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 106 /fabric_b3))
(pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 105 "Net-(R9-Pad2)"))
Start layout
2019-06-04 22:43:08 +02:00
(model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5CF2C7AA)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 259.33908 38.33876)
Start layout
2019-06-04 22:43:08 +02:00
(descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
(tags resistor)
(path /5D77FDBE/5E3D15E2)
(attr smd)
(fp_text reference R10 (at 0 -1.43) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 470 (at 0 1.43) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12))
(fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12))
(fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.4 0.4) (thickness 0.06)))
)
(pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 10 "Net-(D6-Pad2)"))
(pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 107 /LogicBlock/cfgX))
Start layout
2019-06-04 22:43:08 +02:00
(model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5CF2C7BB)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 259.82158 40.87876)
Start layout
2019-06-04 22:43:08 +02:00
(descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
(tags resistor)
(path /5D77FDBE/5E44A4BD)
(attr smd)
(fp_text reference R11 (at 0 -1.43) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 470 (at 0 1.43) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.4 0.4) (thickness 0.06)))
)
(fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12))
(fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12))
(fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
(pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 107 /LogicBlock/cfgX))
Start layout
2019-06-04 22:43:08 +02:00
(pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 12 "Net-(D7-Pad2)"))
(model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5CF2C7CC)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 259.82158 43.41876)
Start layout
2019-06-04 22:43:08 +02:00
(descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
(tags resistor)
(path /5D77FDBE/5E49C4F4)
(attr smd)
(fp_text reference R12 (at 0 -1.43) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 470 (at 0 1.43) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12))
(fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12))
(fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.4 0.4) (thickness 0.06)))
)
(pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 13 "Net-(D8-Pad2)"))
(pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 107 /LogicBlock/cfgX))
Start layout
2019-06-04 22:43:08 +02:00
(model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5CF2C7DD)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 259.33908 45.95876)
Start layout
2019-06-04 22:43:08 +02:00
(descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
(tags resistor)
(path /5D77FDBE/5E49C50D)
(attr smd)
(fp_text reference R13 (at 0 -1.43) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 470 (at 0 1.43) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.4 0.4) (thickness 0.06)))
)
(fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12))
(fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12))
(fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
(pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 107 /LogicBlock/cfgX))
Start layout
2019-06-04 22:43:08 +02:00
(pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 103 "Net-(D9-Pad2)"))
Start layout
2019-06-04 22:43:08 +02:00
(model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Resistor_SMD:R_0603_1608Metric (layer B.Cu) (tedit 5B301BBD) (tstamp 5CF54C80)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 225.2725 71.12 180)
Start layout
2019-06-04 22:43:08 +02:00
(descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
(tags resistor)
(path /5D77FDBE/5D7AF013/5D544A69)
(attr smd)
(fp_text reference R14 (at 0 1.43) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text value 10k (at 0 -1.43) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text user %R (at 0 0) (layer B.Fab)
(effects (font (size 0.4 0.4) (thickness 0.06)) (justify mirror))
)
(fp_line (start 1.48 -0.73) (end -1.48 -0.73) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.48 0.73) (end 1.48 -0.73) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.48 0.73) (end 1.48 0.73) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.48 -0.73) (end -1.48 0.73) (layer B.CrtYd) (width 0.05))
(fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer B.SilkS) (width 0.12))
(fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer B.SilkS) (width 0.12))
(fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.1))
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.1))
(fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.1))
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 15 /LogicBlock/LUTD/lut_b_en_n))
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 61 /LogicBlock/cfg21))
Start layout
2019-06-04 22:43:08 +02:00
(model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Resistor_SMD:R_0603_1608Metric (layer B.Cu) (tedit 5B301BBD) (tstamp 5CF2C7FF)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 229.0825 71.12)
Start layout
2019-06-04 22:43:08 +02:00
(descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
(tags resistor)
(path /5D77FDBE/5D7AF013/5D4D5C26)
(attr smd)
(fp_text reference R15 (at 0 1.43) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text value 10k (at 0 -1.43) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.1))
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.1))
(fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer B.SilkS) (width 0.12))
(fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer B.SilkS) (width 0.12))
(fp_line (start -1.48 -0.73) (end -1.48 0.73) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.48 0.73) (end 1.48 0.73) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.48 0.73) (end 1.48 -0.73) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.48 -0.73) (end -1.48 -0.73) (layer B.CrtYd) (width 0.05))
(fp_text user %R (at 0 0) (layer B.Fab)
(effects (font (size 0.4 0.4) (thickness 0.06)) (justify mirror))
)
(pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 61 /LogicBlock/cfg21))
Start layout
2019-06-04 22:43:08 +02:00
(pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 16 /LogicBlock/LUTD/lut_a_en_n))
(model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(module Resistor_SMD:R_0603_1608Metric (layer B.Cu) (tedit 5B301BBD) (tstamp 5D004829)
(at 237.49 78.5875 90)
Start layout
2019-06-04 22:43:08 +02:00
(descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
(tags resistor)
(path /5D77FDBE/5D7AF013/5D1A7947)
(attr smd)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(fp_text reference R16 (at 0 1.43 270) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
Start layout
2019-06-04 22:43:08 +02:00
)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(fp_text value 10k (at 0 -1.43 270) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
Start layout
2019-06-04 22:43:08 +02:00
)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(fp_text user %R (at 0 0 270) (layer B.Fab)
(effects (font (size 0.4 0.4) (thickness 0.06)) (justify mirror))
Start layout
2019-06-04 22:43:08 +02:00
)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(fp_line (start 1.48 -0.73) (end -1.48 -0.73) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.48 0.73) (end 1.48 -0.73) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.48 0.73) (end 1.48 0.73) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.48 -0.73) (end -1.48 0.73) (layer B.CrtYd) (width 0.05))
(fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer B.SilkS) (width 0.12))
(fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer B.SilkS) (width 0.12))
(fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.1))
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.1))
(fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.1))
(pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 18 /LogicBlock/LUTD/async_c))
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 1 GND))
(model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Package_SO:SOIC-14_3.9x8.7mm_P1.27mm (layer B.Cu) (tedit 5C97300E) (tstamp 5CF2C830)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 217.11346 53.36288)
Start layout
2019-06-04 22:43:08 +02:00
(descr "SOIC, 14 Pin (JEDEC MS-012AB, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/soic_narrow-r/r_14.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py")
(tags "SOIC SO")
(path /5D77FDBE/5DA6508D)
(attr smd)
(fp_text reference U1 (at 0 5.28) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text value 74164 (at 0 -5.28) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text user %R (at 0 0) (layer B.Fab)
(effects (font (size 0.98 0.98) (thickness 0.15)) (justify mirror))
)
Layout input muxing
2019-06-05 23:32:39 +02:00
(fp_line (start 3.7 4.58) (end -3.7 4.58) (layer B.CrtYd) (width 0.05))
(fp_line (start 3.7 -4.58) (end 3.7 4.58) (layer B.CrtYd) (width 0.05))
(fp_line (start -3.7 -4.58) (end 3.7 -4.58) (layer B.CrtYd) (width 0.05))
(fp_line (start -3.7 4.58) (end -3.7 -4.58) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.95 3.35) (end -0.975 4.325) (layer B.Fab) (width 0.1))
(fp_line (start -1.95 -4.325) (end -1.95 3.35) (layer B.Fab) (width 0.1))
(fp_line (start 1.95 -4.325) (end -1.95 -4.325) (layer B.Fab) (width 0.1))
(fp_line (start 1.95 4.325) (end 1.95 -4.325) (layer B.Fab) (width 0.1))
(fp_line (start -0.975 4.325) (end 1.95 4.325) (layer B.Fab) (width 0.1))
(fp_line (start 0 4.435) (end -3.45 4.435) (layer B.SilkS) (width 0.12))
(fp_line (start 0 4.435) (end 1.95 4.435) (layer B.SilkS) (width 0.12))
(fp_line (start 0 -4.435) (end -1.95 -4.435) (layer B.SilkS) (width 0.12))
(fp_line (start 0 -4.435) (end 1.95 -4.435) (layer B.SilkS) (width 0.12))
(pad 14 smd roundrect (at 2.475 3.81) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 2 VCC))
(pad 13 smd roundrect (at 2.475 2.54) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 54 /LogicBlock/cfg7))
Layout input muxing
2019-06-05 23:32:39 +02:00
(pad 12 smd roundrect (at 2.475 1.27) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 53 /LogicBlock/cfg6))
Layout input muxing
2019-06-05 23:32:39 +02:00
(pad 11 smd roundrect (at 2.475 0) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 52 /LogicBlock/cfg5))
Layout input muxing
2019-06-05 23:32:39 +02:00
(pad 10 smd roundrect (at 2.475 -1.27) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 51 /LogicBlock/cfg4))
Layout input muxing
2019-06-05 23:32:39 +02:00
(pad 9 smd roundrect (at 2.475 -2.54) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 2 VCC))
Layout input muxing
2019-06-05 23:32:39 +02:00
(pad 8 smd roundrect (at 2.475 -3.81) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 27 /LogicBlock/isp_sck))
(pad 7 smd roundrect (at -2.475 -3.81) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 1 GND))
(pad 6 smd roundrect (at -2.475 -2.54) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 50 /LogicBlock/cfg3))
Layout input muxing
2019-06-05 23:32:39 +02:00
(pad 5 smd roundrect (at -2.475 -1.27) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 49 /LogicBlock/cfg2))
Layout input muxing
2019-06-05 23:32:39 +02:00
(pad 4 smd roundrect (at -2.475 0) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 48 /LogicBlock/cfg1))
Layout input muxing
2019-06-05 23:32:39 +02:00
(pad 3 smd roundrect (at -2.475 1.27) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 47 /LogicBlock/cfg0))
Layout input muxing
2019-06-05 23:32:39 +02:00
(pad 2 smd roundrect (at -2.475 2.54) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 26 /LogicBlock/isp_mosi))
(pad 1 smd roundrect (at -2.475 3.81) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 26 /LogicBlock/isp_mosi))
Start layout
2019-06-04 22:43:08 +02:00
(model ${KISYS3DMOD}/Package_SO.3dshapes/SOIC-14_3.9x8.7mm_P1.27mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(module Package_SO:SOIC-14_3.9x8.7mm_P1.27mm (layer F.Cu) (tedit 5C97300E) (tstamp 5CFE5F96)
(at 241.235 67.31)
Start layout
2019-06-04 22:43:08 +02:00
(descr "SOIC, 14 Pin (JEDEC MS-012AB, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/soic_narrow-r/r_14.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py")
(tags "SOIC SO")
(path /5D77FDBE/5DB5F0CD)
(attr smd)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(fp_text reference U2 (at 0 -5.28 180) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
Start layout
2019-06-04 22:43:08 +02:00
)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(fp_text value 74164 (at 0 5.28 180) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
Start layout
2019-06-04 22:43:08 +02:00
)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(fp_line (start 0 4.435) (end 1.95 4.435) (layer F.SilkS) (width 0.12))
(fp_line (start 0 4.435) (end -1.95 4.435) (layer F.SilkS) (width 0.12))
(fp_line (start 0 -4.435) (end 1.95 -4.435) (layer F.SilkS) (width 0.12))
(fp_line (start 0 -4.435) (end -3.45 -4.435) (layer F.SilkS) (width 0.12))
(fp_line (start -0.975 -4.325) (end 1.95 -4.325) (layer F.Fab) (width 0.1))
(fp_line (start 1.95 -4.325) (end 1.95 4.325) (layer F.Fab) (width 0.1))
(fp_line (start 1.95 4.325) (end -1.95 4.325) (layer F.Fab) (width 0.1))
(fp_line (start -1.95 4.325) (end -1.95 -3.35) (layer F.Fab) (width 0.1))
(fp_line (start -1.95 -3.35) (end -0.975 -4.325) (layer F.Fab) (width 0.1))
(fp_line (start -3.7 -4.58) (end -3.7 4.58) (layer F.CrtYd) (width 0.05))
(fp_line (start -3.7 4.58) (end 3.7 4.58) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.7 4.58) (end 3.7 -4.58) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.7 -4.58) (end -3.7 -4.58) (layer F.CrtYd) (width 0.05))
(fp_text user %R (at 0 0 180) (layer F.Fab)
(effects (font (size 0.98 0.98) (thickness 0.15)))
Start layout
2019-06-04 22:43:08 +02:00
)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 1 smd roundrect (at -2.475 -3.81) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 109 /LogicBlock/cfgLO))
(pad 2 smd roundrect (at -2.475 -2.54) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 109 /LogicBlock/cfgLO))
(pad 3 smd roundrect (at -2.475 -1.27) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 56 /LogicBlock/cfg16))
(pad 4 smd roundrect (at -2.475 0) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 57 /LogicBlock/cfg17))
(pad 5 smd roundrect (at -2.475 1.27) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 58 /LogicBlock/cfg18))
(pad 6 smd roundrect (at -2.475 2.54) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 59 /LogicBlock/cfg19))
(pad 7 smd roundrect (at -2.475 3.81) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 1 GND))
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 8 smd roundrect (at 2.475 3.81) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 27 /LogicBlock/isp_sck))
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 9 smd roundrect (at 2.475 2.54) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 2 VCC))
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 10 smd roundrect (at 2.475 1.27) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 60 /LogicBlock/cfg20))
(pad 11 smd roundrect (at 2.475 0) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 61 /LogicBlock/cfg21))
(pad 12 smd roundrect (at 2.475 -1.27) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 62 /LogicBlock/cfg22))
(pad 13 smd roundrect (at 2.475 -2.54) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 63 /LogicBlock/cfg23))
(pad 14 smd roundrect (at 2.475 -3.81) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 2 VCC))
(model ${KISYS3DMOD}/Package_SO.3dshapes/SOIC-14_3.9x8.7mm_P1.27mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(module Package_SO:SOIC-14_3.9x8.7mm_P1.27mm (layer B.Cu) (tedit 5C97300E) (tstamp 5CF2CA92)
(at 215.835 67.31 180)
Start layout
2019-06-04 22:43:08 +02:00
(descr "SOIC, 14 Pin (JEDEC MS-012AB, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/soic_narrow-r/r_14.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py")
(tags "SOIC SO")
(path /5D77FDBE/5DA841D5)
(attr smd)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(fp_text reference U5 (at 0 5.28) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
Start layout
2019-06-04 22:43:08 +02:00
)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(fp_text value 74164 (at 0 -5.28) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
Start layout
2019-06-04 22:43:08 +02:00
)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(fp_text user %R (at 0 0) (layer B.Fab)
(effects (font (size 0.98 0.98) (thickness 0.15)) (justify mirror))
Start layout
2019-06-04 22:43:08 +02:00
)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(fp_line (start 3.7 4.58) (end -3.7 4.58) (layer B.CrtYd) (width 0.05))
(fp_line (start 3.7 -4.58) (end 3.7 4.58) (layer B.CrtYd) (width 0.05))
(fp_line (start -3.7 -4.58) (end 3.7 -4.58) (layer B.CrtYd) (width 0.05))
(fp_line (start -3.7 4.58) (end -3.7 -4.58) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.95 3.35) (end -0.975 4.325) (layer B.Fab) (width 0.1))
(fp_line (start -1.95 -4.325) (end -1.95 3.35) (layer B.Fab) (width 0.1))
(fp_line (start 1.95 -4.325) (end -1.95 -4.325) (layer B.Fab) (width 0.1))
(fp_line (start 1.95 4.325) (end 1.95 -4.325) (layer B.Fab) (width 0.1))
(fp_line (start -0.975 4.325) (end 1.95 4.325) (layer B.Fab) (width 0.1))
(fp_line (start 0 4.435) (end -3.45 4.435) (layer B.SilkS) (width 0.12))
(fp_line (start 0 4.435) (end 1.95 4.435) (layer B.SilkS) (width 0.12))
(fp_line (start 0 -4.435) (end -1.95 -4.435) (layer B.SilkS) (width 0.12))
(fp_line (start 0 -4.435) (end 1.95 -4.435) (layer B.SilkS) (width 0.12))
(pad 14 smd roundrect (at 2.475 3.81 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 2 VCC))
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 13 smd roundrect (at 2.475 2.54 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 55 /LogicBlock/cfg15))
(pad 12 smd roundrect (at 2.475 1.27 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 64 /LogicBlock/cfg14))
(pad 11 smd roundrect (at 2.475 0 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 65 /LogicBlock/cfg13))
(pad 10 smd roundrect (at 2.475 -1.27 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 66 /LogicBlock/cfg12))
(pad 9 smd roundrect (at 2.475 -2.54 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 2 VCC))
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 8 smd roundrect (at 2.475 -3.81 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 27 /LogicBlock/isp_sck))
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 7 smd roundrect (at -2.475 -3.81 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 1 GND))
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 6 smd roundrect (at -2.475 -2.54 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 67 /LogicBlock/cfg11))
(pad 5 smd roundrect (at -2.475 -1.27 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 68 /LogicBlock/cfg10))
(pad 4 smd roundrect (at -2.475 0 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 69 /LogicBlock/cfg9))
(pad 3 smd roundrect (at -2.475 1.27 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 70 /LogicBlock/cfg8))
(pad 2 smd roundrect (at -2.475 2.54 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 54 /LogicBlock/cfg7))
(pad 1 smd roundrect (at -2.475 3.81 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 54 /LogicBlock/cfg7))
Start layout
2019-06-04 22:43:08 +02:00
(model ${KISYS3DMOD}/Package_SO.3dshapes/SOIC-14_3.9x8.7mm_P1.27mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Package_SO:SOIC-14_3.9x8.7mm_P1.27mm (layer F.Cu) (tedit 5C97300E) (tstamp 5CF57B3F)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 241.235 57.15 180)
Start layout
2019-06-04 22:43:08 +02:00
(descr "SOIC, 14 Pin (JEDEC MS-012AB, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/soic_narrow-r/r_14.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py")
(tags "SOIC SO")
(path /5D77FDBE/5DB5F0EE)
(attr smd)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(fp_text reference U6 (at 0 -5.28) (layer F.SilkS)
Start layout
2019-06-04 22:43:08 +02:00
(effects (font (size 1 1) (thickness 0.15)))
)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(fp_text value 74164 (at 0 5.28) (layer F.Fab)
Start layout
2019-06-04 22:43:08 +02:00
(effects (font (size 1 1) (thickness 0.15)))
)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(fp_text user %R (at 0 0) (layer F.Fab)
Start layout
2019-06-04 22:43:08 +02:00
(effects (font (size 0.98 0.98) (thickness 0.15)))
)
(fp_line (start 3.7 -4.58) (end -3.7 -4.58) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.7 4.58) (end 3.7 -4.58) (layer F.CrtYd) (width 0.05))
(fp_line (start -3.7 4.58) (end 3.7 4.58) (layer F.CrtYd) (width 0.05))
(fp_line (start -3.7 -4.58) (end -3.7 4.58) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.95 -3.35) (end -0.975 -4.325) (layer F.Fab) (width 0.1))
(fp_line (start -1.95 4.325) (end -1.95 -3.35) (layer F.Fab) (width 0.1))
(fp_line (start 1.95 4.325) (end -1.95 4.325) (layer F.Fab) (width 0.1))
(fp_line (start 1.95 -4.325) (end 1.95 4.325) (layer F.Fab) (width 0.1))
(fp_line (start -0.975 -4.325) (end 1.95 -4.325) (layer F.Fab) (width 0.1))
(fp_line (start 0 -4.435) (end -3.45 -4.435) (layer F.SilkS) (width 0.12))
(fp_line (start 0 -4.435) (end 1.95 -4.435) (layer F.SilkS) (width 0.12))
(fp_line (start 0 4.435) (end -1.95 4.435) (layer F.SilkS) (width 0.12))
(fp_line (start 0 4.435) (end 1.95 4.435) (layer F.SilkS) (width 0.12))
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 14 smd roundrect (at 2.475 -3.81 180) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 2 VCC))
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 13 smd roundrect (at 2.475 -2.54 180) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 34 /LogicBlock/isp_miso))
(pad 12 smd roundrect (at 2.475 -1.27 180) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 71 /LogicBlock/cfg30))
(pad 11 smd roundrect (at 2.475 0 180) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 4 /LogicBlock/cfg29))
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 10 smd roundrect (at 2.475 1.27 180) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 46 /LogicBlock/cfg28))
(pad 9 smd roundrect (at 2.475 2.54 180) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 2 VCC))
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 8 smd roundrect (at 2.475 3.81 180) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 27 /LogicBlock/isp_sck))
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 7 smd roundrect (at -2.475 3.81 180) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 1 GND))
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 6 smd roundrect (at -2.475 2.54 180) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 72 /LogicBlock/cfg27))
(pad 5 smd roundrect (at -2.475 1.27 180) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 73 /LogicBlock/cfg26))
(pad 4 smd roundrect (at -2.475 0 180) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 74 /LogicBlock/cfg25))
(pad 3 smd roundrect (at -2.475 -1.27 180) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 75 /LogicBlock/cfg24))
(pad 2 smd roundrect (at -2.475 -2.54 180) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 63 /LogicBlock/cfg23))
(pad 1 smd roundrect (at -2.475 -3.81 180) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 63 /LogicBlock/cfg23))
Start layout
2019-06-04 22:43:08 +02:00
(model ${KISYS3DMOD}/Package_SO.3dshapes/SOIC-14_3.9x8.7mm_P1.27mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(module Package_SO:SOIC-16_3.9x9.9mm_P1.27mm (layer B.Cu) (tedit 5C97300E) (tstamp 5CF2CAD4)
(at 248.855 55.245)
Start layout
2019-06-04 22:43:08 +02:00
(descr "SOIC, 16 Pin (JEDEC MS-012AC, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/soic_narrow-r/r_16.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py")
(tags "SOIC SO")
(path /5D77FDBE/5D7AF006)
(attr smd)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(fp_text reference U7 (at 0 5.9) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
Start layout
2019-06-04 22:43:08 +02:00
)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(fp_text value 74253 (at 0 -5.9) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
Start layout
2019-06-04 22:43:08 +02:00
)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(fp_line (start 0 -5.06) (end 1.95 -5.06) (layer B.SilkS) (width 0.12))
(fp_line (start 0 -5.06) (end -1.95 -5.06) (layer B.SilkS) (width 0.12))
(fp_line (start 0 5.06) (end 1.95 5.06) (layer B.SilkS) (width 0.12))
(fp_line (start 0 5.06) (end -3.45 5.06) (layer B.SilkS) (width 0.12))
(fp_line (start -0.975 4.95) (end 1.95 4.95) (layer B.Fab) (width 0.1))
(fp_line (start 1.95 4.95) (end 1.95 -4.95) (layer B.Fab) (width 0.1))
(fp_line (start 1.95 -4.95) (end -1.95 -4.95) (layer B.Fab) (width 0.1))
(fp_line (start -1.95 -4.95) (end -1.95 3.975) (layer B.Fab) (width 0.1))
(fp_line (start -1.95 3.975) (end -0.975 4.95) (layer B.Fab) (width 0.1))
(fp_line (start -3.7 5.2) (end -3.7 -5.2) (layer B.CrtYd) (width 0.05))
(fp_line (start -3.7 -5.2) (end 3.7 -5.2) (layer B.CrtYd) (width 0.05))
(fp_line (start 3.7 -5.2) (end 3.7 5.2) (layer B.CrtYd) (width 0.05))
(fp_line (start 3.7 5.2) (end -3.7 5.2) (layer B.CrtYd) (width 0.05))
(fp_text user %R (at 0 0) (layer B.Fab)
(effects (font (size 0.98 0.98) (thickness 0.15)) (justify mirror))
Start layout
2019-06-04 22:43:08 +02:00
)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 1 smd roundrect (at -2.475 4.445) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 62 /LogicBlock/cfg22))
(pad 2 smd roundrect (at -2.475 3.175) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 63 /LogicBlock/cfg23))
(pad 3 smd roundrect (at -2.475 1.905) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 44 /LogicBlock/lut_out_b_async))
(pad 4 smd roundrect (at -2.475 0.635) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 43 /LogicBlock/lut_out_b))
(pad 5 smd roundrect (at -2.475 -0.635) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 41 /LogicBlock/lut_out_a))
(pad 6 smd roundrect (at -2.475 -1.905) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 42 /LogicBlock/lut_out_c))
(pad 7 smd roundrect (at -2.475 -3.175) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 40 "Net-(R2-Pad2)"))
(pad 8 smd roundrect (at -2.475 -4.445) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 1 GND))
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 9 smd roundrect (at 2.475 -4.445) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 104 "Net-(R3-Pad2)"))
(pad 10 smd roundrect (at 2.475 -3.175) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 42 /LogicBlock/lut_out_c))
(pad 11 smd roundrect (at 2.475 -1.905) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 44 /LogicBlock/lut_out_b_async))
(pad 12 smd roundrect (at 2.475 -0.635) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 43 /LogicBlock/lut_out_b))
(pad 13 smd roundrect (at 2.475 0.635) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 41 /LogicBlock/lut_out_a))
(pad 14 smd roundrect (at 2.475 1.905) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 72 /LogicBlock/cfg27))
(pad 15 smd roundrect (at 2.475 3.175) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 73 /LogicBlock/cfg26))
(pad 16 smd roundrect (at 2.475 4.445) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 2 VCC))
(model ${KISYS3DMOD}/Package_SO.3dshapes/SOIC-16_3.9x9.9mm_P1.27mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Package_SO:SOIC-16_3.9x9.9mm_P1.27mm (layer B.Cu) (tedit 5C97300E) (tstamp 5CF84EFF)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 232.22346 64.15788 180)
Start layout
2019-06-04 22:43:08 +02:00
(descr "SOIC, 16 Pin (JEDEC MS-012AC, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/soic_narrow-r/r_16.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py")
(tags "SOIC SO")
(path /5D77FDBE/5E01B8F6)
(attr smd)
(fp_text reference U9 (at 0 5.9) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text value 74251 (at 0 -5.9) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_line (start 0 -5.06) (end 1.95 -5.06) (layer B.SilkS) (width 0.12))
(fp_line (start 0 -5.06) (end -1.95 -5.06) (layer B.SilkS) (width 0.12))
(fp_line (start 0 5.06) (end 1.95 5.06) (layer B.SilkS) (width 0.12))
(fp_line (start 0 5.06) (end -3.45 5.06) (layer B.SilkS) (width 0.12))
(fp_line (start -0.975 4.95) (end 1.95 4.95) (layer B.Fab) (width 0.1))
(fp_line (start 1.95 4.95) (end 1.95 -4.95) (layer B.Fab) (width 0.1))
(fp_line (start 1.95 -4.95) (end -1.95 -4.95) (layer B.Fab) (width 0.1))
(fp_line (start -1.95 -4.95) (end -1.95 3.975) (layer B.Fab) (width 0.1))
(fp_line (start -1.95 3.975) (end -0.975 4.95) (layer B.Fab) (width 0.1))
(fp_line (start -3.7 5.2) (end -3.7 -5.2) (layer B.CrtYd) (width 0.05))
(fp_line (start -3.7 -5.2) (end 3.7 -5.2) (layer B.CrtYd) (width 0.05))
(fp_line (start 3.7 -5.2) (end 3.7 5.2) (layer B.CrtYd) (width 0.05))
(fp_line (start 3.7 5.2) (end -3.7 5.2) (layer B.CrtYd) (width 0.05))
(fp_text user %R (at 0 0) (layer B.Fab)
(effects (font (size 0.98 0.98) (thickness 0.15)) (justify mirror))
)
(pad 1 smd roundrect (at -2.475 4.445 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 32 /fabric_l2))
Start layout
2019-06-04 22:43:08 +02:00
(pad 2 smd roundrect (at -2.475 3.175 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 33 /fabric_l3))
Start layout
2019-06-04 22:43:08 +02:00
(pad 3 smd roundrect (at -2.475 1.905 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 30 /fabric_l0))
Start layout
2019-06-04 22:43:08 +02:00
(pad 4 smd roundrect (at -2.475 0.635 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 106 /fabric_b3))
Start layout
2019-06-04 22:43:08 +02:00
(pad 5 smd roundrect (at -2.475 -0.635 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 77 /LogicBlock/lut_in2))
Start layout
2019-06-04 22:43:08 +02:00
(pad 6 smd roundrect (at -2.475 -1.905 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 11 "Net-(D7-Pad1)"))
(pad 7 smd roundrect (at -2.475 -3.175 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 1 GND))
(pad 8 smd roundrect (at -2.475 -4.445 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 1 GND))
(pad 9 smd roundrect (at 2.475 -4.445 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 65 /LogicBlock/cfg13))
Start layout
2019-06-04 22:43:08 +02:00
(pad 10 smd roundrect (at 2.475 -3.175 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 64 /LogicBlock/cfg14))
Start layout
2019-06-04 22:43:08 +02:00
(pad 11 smd roundrect (at 2.475 -1.905 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 55 /LogicBlock/cfg15))
Start layout
2019-06-04 22:43:08 +02:00
(pad 12 smd roundrect (at 2.475 -0.635 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 21 /fabric_t2))
(pad 13 smd roundrect (at 2.475 0.635 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 38 /fabric_b0))
Layout input muxing
2019-06-05 23:32:39 +02:00
(pad 14 smd roundrect (at 2.475 1.905 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 37 /fabric_b1))
Start layout
2019-06-04 22:43:08 +02:00
(pad 15 smd roundrect (at 2.475 3.175 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 31 /fabric_l1))
Start layout
2019-06-04 22:43:08 +02:00
(pad 16 smd roundrect (at 2.475 4.445 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 2 VCC))
(model ${KISYS3DMOD}/Package_SO.3dshapes/SOIC-16_3.9x9.9mm_P1.27mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(module Package_SO:SOIC-16_3.9x9.9mm_P1.27mm (layer B.Cu) (tedit 5C97300E) (tstamp 5CF2CB3A)
(at 241.235 55.245)
Start layout
2019-06-04 22:43:08 +02:00
(descr "SOIC, 16 Pin (JEDEC MS-012AC, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/soic_narrow-r/r_16.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py")
(tags "SOIC SO")
(path /5D77FDBE/5D7AEFF3)
(attr smd)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(fp_text reference U10 (at 0 5.9) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
Start layout
2019-06-04 22:43:08 +02:00
)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(fp_text value 74253 (at 0 -5.9) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
Start layout
2019-06-04 22:43:08 +02:00
)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(fp_text user %R (at 0 0) (layer B.Fab)
(effects (font (size 0.98 0.98) (thickness 0.15)) (justify mirror))
Start layout
2019-06-04 22:43:08 +02:00
)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(fp_line (start 3.7 5.2) (end -3.7 5.2) (layer B.CrtYd) (width 0.05))
(fp_line (start 3.7 -5.2) (end 3.7 5.2) (layer B.CrtYd) (width 0.05))
(fp_line (start -3.7 -5.2) (end 3.7 -5.2) (layer B.CrtYd) (width 0.05))
(fp_line (start -3.7 5.2) (end -3.7 -5.2) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.95 3.975) (end -0.975 4.95) (layer B.Fab) (width 0.1))
(fp_line (start -1.95 -4.95) (end -1.95 3.975) (layer B.Fab) (width 0.1))
(fp_line (start 1.95 -4.95) (end -1.95 -4.95) (layer B.Fab) (width 0.1))
(fp_line (start 1.95 4.95) (end 1.95 -4.95) (layer B.Fab) (width 0.1))
(fp_line (start -0.975 4.95) (end 1.95 4.95) (layer B.Fab) (width 0.1))
(fp_line (start 0 5.06) (end -3.45 5.06) (layer B.SilkS) (width 0.12))
(fp_line (start 0 5.06) (end 1.95 5.06) (layer B.SilkS) (width 0.12))
(fp_line (start 0 -5.06) (end -1.95 -5.06) (layer B.SilkS) (width 0.12))
(fp_line (start 0 -5.06) (end 1.95 -5.06) (layer B.SilkS) (width 0.12))
(pad 16 smd roundrect (at 2.475 4.445) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 2 VCC))
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 15 smd roundrect (at 2.475 3.175) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 75 /LogicBlock/cfg24))
(pad 14 smd roundrect (at 2.475 1.905) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 74 /LogicBlock/cfg25))
(pad 13 smd roundrect (at 2.475 0.635) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 41 /LogicBlock/lut_out_a))
(pad 12 smd roundrect (at 2.475 -0.635) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 43 /LogicBlock/lut_out_b))
(pad 11 smd roundrect (at 2.475 -1.905) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 44 /LogicBlock/lut_out_b_async))
(pad 10 smd roundrect (at 2.475 -3.175) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 42 /LogicBlock/lut_out_c))
(pad 9 smd roundrect (at 2.475 -4.445) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 105 "Net-(R9-Pad2)"))
(pad 8 smd roundrect (at -2.475 -4.445) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 1 GND))
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 7 smd roundrect (at -2.475 -3.175) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 45 "Net-(R8-Pad2)"))
(pad 6 smd roundrect (at -2.475 -1.905) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 42 /LogicBlock/lut_out_c))
(pad 5 smd roundrect (at -2.475 -0.635) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 41 /LogicBlock/lut_out_a))
(pad 4 smd roundrect (at -2.475 0.635) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 43 /LogicBlock/lut_out_b))
(pad 3 smd roundrect (at -2.475 1.905) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 44 /LogicBlock/lut_out_b_async))
(pad 2 smd roundrect (at -2.475 3.175) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 71 /LogicBlock/cfg30))
(pad 1 smd roundrect (at -2.475 4.445) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 34 /LogicBlock/isp_miso))
Start layout
2019-06-04 22:43:08 +02:00
(model ${KISYS3DMOD}/Package_SO.3dshapes/SOIC-16_3.9x9.9mm_P1.27mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Package_SO:SOIC-16_3.9x9.9mm_P1.27mm (layer B.Cu) (tedit 5C97300E) (tstamp 5CF6D4AF)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 223.33346 64.15788 180)
Start layout
2019-06-04 22:43:08 +02:00
(descr "SOIC, 16 Pin (JEDEC MS-012AC, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/soic_narrow-r/r_16.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py")
(tags "SOIC SO")
(path /5D77FDBE/5DF0DB18)
(attr smd)
(fp_text reference U11 (at 0 5.9) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text value 74251 (at 0 -5.9) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text user %R (at 0 0) (layer B.Fab)
(effects (font (size 0.98 0.98) (thickness 0.15)) (justify mirror))
)
(fp_line (start 3.7 5.2) (end -3.7 5.2) (layer B.CrtYd) (width 0.05))
(fp_line (start 3.7 -5.2) (end 3.7 5.2) (layer B.CrtYd) (width 0.05))
(fp_line (start -3.7 -5.2) (end 3.7 -5.2) (layer B.CrtYd) (width 0.05))
(fp_line (start -3.7 5.2) (end -3.7 -5.2) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.95 3.975) (end -0.975 4.95) (layer B.Fab) (width 0.1))
(fp_line (start -1.95 -4.95) (end -1.95 3.975) (layer B.Fab) (width 0.1))
(fp_line (start 1.95 -4.95) (end -1.95 -4.95) (layer B.Fab) (width 0.1))
(fp_line (start 1.95 4.95) (end 1.95 -4.95) (layer B.Fab) (width 0.1))
(fp_line (start -0.975 4.95) (end 1.95 4.95) (layer B.Fab) (width 0.1))
(fp_line (start 0 5.06) (end -3.45 5.06) (layer B.SilkS) (width 0.12))
(fp_line (start 0 5.06) (end 1.95 5.06) (layer B.SilkS) (width 0.12))
(fp_line (start 0 -5.06) (end -1.95 -5.06) (layer B.SilkS) (width 0.12))
(fp_line (start 0 -5.06) (end 1.95 -5.06) (layer B.SilkS) (width 0.12))
(pad 16 smd roundrect (at 2.475 4.445 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 2 VCC))
(pad 15 smd roundrect (at 2.475 3.175 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 33 /fabric_l3))
Start layout
2019-06-04 22:43:08 +02:00
(pad 14 smd roundrect (at 2.475 1.905 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 30 /fabric_l0))
Start layout
2019-06-04 22:43:08 +02:00
(pad 13 smd roundrect (at 2.475 0.635 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 36 /fabric_b2))
Start layout
2019-06-04 22:43:08 +02:00
(pad 12 smd roundrect (at 2.475 -0.635 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 22 /fabric_t1))
(pad 11 smd roundrect (at 2.475 -1.905 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 70 /LogicBlock/cfg8))
Start layout
2019-06-04 22:43:08 +02:00
(pad 10 smd roundrect (at 2.475 -3.175 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 69 /LogicBlock/cfg9))
Start layout
2019-06-04 22:43:08 +02:00
(pad 9 smd roundrect (at 2.475 -4.445 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 68 /LogicBlock/cfg10))
Start layout
2019-06-04 22:43:08 +02:00
(pad 8 smd roundrect (at -2.475 -4.445 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 1 GND))
(pad 7 smd roundrect (at -2.475 -3.175 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 1 GND))
(pad 6 smd roundrect (at -2.475 -1.905 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 102 "Net-(D8-Pad1)"))
Start layout
2019-06-04 22:43:08 +02:00
(pad 5 smd roundrect (at -2.475 -0.635 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 78 /LogicBlock/lut_in1))
Start layout
2019-06-04 22:43:08 +02:00
(pad 4 smd roundrect (at -2.475 0.635 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 38 /fabric_b0))
Layout input muxing
2019-06-05 23:32:39 +02:00
(pad 3 smd roundrect (at -2.475 1.905 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 37 /fabric_b1))
Start layout
2019-06-04 22:43:08 +02:00
(pad 2 smd roundrect (at -2.475 3.175 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 31 /fabric_l1))
Start layout
2019-06-04 22:43:08 +02:00
(pad 1 smd roundrect (at -2.475 4.445 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 32 /fabric_l2))
Start layout
2019-06-04 22:43:08 +02:00
(model ${KISYS3DMOD}/Package_SO.3dshapes/SOIC-16_3.9x9.9mm_P1.27mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Package_SO:SOIC-16_3.9x9.9mm_P1.27mm (layer F.Cu) (tedit 5C97300E) (tstamp 5CF733FC)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 232.22346 64.15788)
Start layout
2019-06-04 22:43:08 +02:00
(descr "SOIC, 16 Pin (JEDEC MS-012AC, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/soic_narrow-r/r_16.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py")
(tags "SOIC SO")
(path /5D77FDBE/5E01B8D6)
(attr smd)
(fp_text reference U12 (at 0 -5.9) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 74251 (at 0 5.9) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.98 0.98) (thickness 0.15)))
)
(fp_line (start 3.7 -5.2) (end -3.7 -5.2) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.7 5.2) (end 3.7 -5.2) (layer F.CrtYd) (width 0.05))
(fp_line (start -3.7 5.2) (end 3.7 5.2) (layer F.CrtYd) (width 0.05))
(fp_line (start -3.7 -5.2) (end -3.7 5.2) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.95 -3.975) (end -0.975 -4.95) (layer F.Fab) (width 0.1))
(fp_line (start -1.95 4.95) (end -1.95 -3.975) (layer F.Fab) (width 0.1))
(fp_line (start 1.95 4.95) (end -1.95 4.95) (layer F.Fab) (width 0.1))
(fp_line (start 1.95 -4.95) (end 1.95 4.95) (layer F.Fab) (width 0.1))
(fp_line (start -0.975 -4.95) (end 1.95 -4.95) (layer F.Fab) (width 0.1))
(fp_line (start 0 -5.06) (end -3.45 -5.06) (layer F.SilkS) (width 0.12))
(fp_line (start 0 -5.06) (end 1.95 -5.06) (layer F.SilkS) (width 0.12))
(fp_line (start 0 5.06) (end -1.95 5.06) (layer F.SilkS) (width 0.12))
(fp_line (start 0 5.06) (end 1.95 5.06) (layer F.SilkS) (width 0.12))
(pad 16 smd roundrect (at 2.475 -4.445) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 2 VCC))
(pad 15 smd roundrect (at 2.475 -3.175) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 33 /fabric_l3))
Start layout
2019-06-04 22:43:08 +02:00
(pad 14 smd roundrect (at 2.475 -1.905) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 30 /fabric_l0))
Start layout
2019-06-04 22:43:08 +02:00
(pad 13 smd roundrect (at 2.475 -0.635) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 106 /fabric_b3))
Start layout
2019-06-04 22:43:08 +02:00
(pad 12 smd roundrect (at 2.475 0.635) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 20 /fabric_t3))
(pad 11 smd roundrect (at 2.475 1.905) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 56 /LogicBlock/cfg16))
Start layout
2019-06-04 22:43:08 +02:00
(pad 10 smd roundrect (at 2.475 3.175) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 57 /LogicBlock/cfg17))
Start layout
2019-06-04 22:43:08 +02:00
(pad 9 smd roundrect (at 2.475 4.445) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 58 /LogicBlock/cfg18))
Start layout
2019-06-04 22:43:08 +02:00
(pad 8 smd roundrect (at -2.475 4.445) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 1 GND))
(pad 7 smd roundrect (at -2.475 3.175) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 1 GND))
(pad 6 smd roundrect (at -2.475 1.905) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 14 /LogicBlock/LUTD/lut_in3_n))
(pad 5 smd roundrect (at -2.475 0.635) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 79 /LogicBlock/lut_in3))
Start layout
2019-06-04 22:43:08 +02:00
(pad 4 smd roundrect (at -2.475 -0.635) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 38 /fabric_b0))
Layout input muxing
2019-06-05 23:32:39 +02:00
(pad 3 smd roundrect (at -2.475 -1.905) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 37 /fabric_b1))
Start layout
2019-06-04 22:43:08 +02:00
(pad 2 smd roundrect (at -2.475 -3.175) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 31 /fabric_l1))
Start layout
2019-06-04 22:43:08 +02:00
(pad 1 smd roundrect (at -2.475 -4.445) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 32 /fabric_l2))
Start layout
2019-06-04 22:43:08 +02:00
(model ${KISYS3DMOD}/Package_SO.3dshapes/SOIC-16_3.9x9.9mm_P1.27mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Package_SO:SOIC-14_3.9x8.7mm_P1.27mm (layer B.Cu) (tedit 5C97300E) (tstamp 5CF33DA5)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 232.2845 80.01 180)
Start layout
2019-06-04 22:43:08 +02:00
(descr "SOIC, 14 Pin (JEDEC MS-012AB, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/soic_narrow-r/r_14.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py")
(tags "SOIC SO")
(path /5D77FDBE/5D7AF013/5CF42176)
(attr smd)
(fp_text reference U13 (at 0 5.28) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text value 74164 (at 0 -5.28) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text user %R (at 0 0) (layer B.Fab)
(effects (font (size 0.98 0.98) (thickness 0.15)) (justify mirror))
)
(fp_line (start 3.7 4.58) (end -3.7 4.58) (layer B.CrtYd) (width 0.05))
(fp_line (start 3.7 -4.58) (end 3.7 4.58) (layer B.CrtYd) (width 0.05))
(fp_line (start -3.7 -4.58) (end 3.7 -4.58) (layer B.CrtYd) (width 0.05))
(fp_line (start -3.7 4.58) (end -3.7 -4.58) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.95 3.35) (end -0.975 4.325) (layer B.Fab) (width 0.1))
(fp_line (start -1.95 -4.325) (end -1.95 3.35) (layer B.Fab) (width 0.1))
(fp_line (start 1.95 -4.325) (end -1.95 -4.325) (layer B.Fab) (width 0.1))
(fp_line (start 1.95 4.325) (end 1.95 -4.325) (layer B.Fab) (width 0.1))
(fp_line (start -0.975 4.325) (end 1.95 4.325) (layer B.Fab) (width 0.1))
(fp_line (start 0 4.435) (end -3.45 4.435) (layer B.SilkS) (width 0.12))
(fp_line (start 0 4.435) (end 1.95 4.435) (layer B.SilkS) (width 0.12))
(fp_line (start 0 -4.435) (end -1.95 -4.435) (layer B.SilkS) (width 0.12))
(fp_line (start 0 -4.435) (end 1.95 -4.435) (layer B.SilkS) (width 0.12))
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 14 smd roundrect (at 2.475 3.81 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 2 VCC))
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 13 smd roundrect (at 2.475 2.54 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 109 /LogicBlock/cfgLO))
(pad 12 smd roundrect (at 2.475 1.27 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 80 "Net-(U13-Pad12)"))
(pad 11 smd roundrect (at 2.475 0 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 81 "Net-(U13-Pad11)"))
(pad 10 smd roundrect (at 2.475 -1.27 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 82 "Net-(U13-Pad10)"))
(pad 9 smd roundrect (at 2.475 -2.54 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 2 VCC))
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 8 smd roundrect (at 2.475 -3.81 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 27 /LogicBlock/isp_sck))
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 7 smd roundrect (at -2.475 -3.81 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 1 GND))
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 6 smd roundrect (at -2.475 -2.54 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 83 "Net-(U13-Pad6)"))
(pad 5 smd roundrect (at -2.475 -1.27 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 84 "Net-(U13-Pad5)"))
(pad 4 smd roundrect (at -2.475 0 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 85 "Net-(U13-Pad4)"))
(pad 3 smd roundrect (at -2.475 1.27 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 86 "Net-(U13-Pad3)"))
(pad 2 smd roundrect (at -2.475 2.54 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 108 "Net-(U13-Pad1)"))
(pad 1 smd roundrect (at -2.475 3.81 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 108 "Net-(U13-Pad1)"))
Start layout
2019-06-04 22:43:08 +02:00
(model ${KISYS3DMOD}/Package_SO.3dshapes/SOIC-14_3.9x8.7mm_P1.27mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Package_SO:SOIC-16_3.9x9.9mm_P1.27mm (layer B.Cu) (tedit 5C97300E) (tstamp 5CF2CBE0)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 242.505 78.105 180)
Start layout
2019-06-04 22:43:08 +02:00
(descr "SOIC, 16 Pin (JEDEC MS-012AC, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/soic_narrow-r/r_16.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py")
(tags "SOIC SO")
(path /5D77FDBE/5D7AF013/5D187D09)
(attr smd)
(fp_text reference U15 (at 0 5.9) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text value 74157 (at 0 -5.9) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_line (start 0 -5.06) (end 1.95 -5.06) (layer B.SilkS) (width 0.12))
(fp_line (start 0 -5.06) (end -1.95 -5.06) (layer B.SilkS) (width 0.12))
(fp_line (start 0 5.06) (end 1.95 5.06) (layer B.SilkS) (width 0.12))
(fp_line (start 0 5.06) (end -3.45 5.06) (layer B.SilkS) (width 0.12))
(fp_line (start -0.975 4.95) (end 1.95 4.95) (layer B.Fab) (width 0.1))
(fp_line (start 1.95 4.95) (end 1.95 -4.95) (layer B.Fab) (width 0.1))
(fp_line (start 1.95 -4.95) (end -1.95 -4.95) (layer B.Fab) (width 0.1))
(fp_line (start -1.95 -4.95) (end -1.95 3.975) (layer B.Fab) (width 0.1))
(fp_line (start -1.95 3.975) (end -0.975 4.95) (layer B.Fab) (width 0.1))
(fp_line (start -3.7 5.2) (end -3.7 -5.2) (layer B.CrtYd) (width 0.05))
(fp_line (start -3.7 -5.2) (end 3.7 -5.2) (layer B.CrtYd) (width 0.05))
(fp_line (start 3.7 -5.2) (end 3.7 5.2) (layer B.CrtYd) (width 0.05))
(fp_line (start 3.7 5.2) (end -3.7 5.2) (layer B.CrtYd) (width 0.05))
(fp_text user %R (at 0 0) (layer B.Fab)
(effects (font (size 0.98 0.98) (thickness 0.15)) (justify mirror))
)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 1 smd roundrect (at -2.475 4.445 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 60 /LogicBlock/cfg20))
(pad 2 smd roundrect (at -2.475 3.175 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 19 /LogicBlock/LUTD/async_b))
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 3 smd roundrect (at -2.475 1.905 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 19 /LogicBlock/LUTD/async_b))
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 4 smd roundrect (at -2.475 0.635 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 44 /LogicBlock/lut_out_b_async))
(pad 5 smd roundrect (at -2.475 -0.635 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 89 /LogicBlock/LUTD/sync_c))
(pad 6 smd roundrect (at -2.475 -1.905 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 18 /LogicBlock/LUTD/async_c))
(pad 7 smd roundrect (at -2.475 -3.175 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 42 /LogicBlock/lut_out_c))
(pad 8 smd roundrect (at -2.475 -4.445 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 1 GND))
(pad 9 smd roundrect (at 2.475 -4.445 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 41 /LogicBlock/lut_out_a))
(pad 10 smd roundrect (at 2.475 -3.175 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 17 /LogicBlock/LUTD/async_a))
(pad 11 smd roundrect (at 2.475 -1.905 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 88 /LogicBlock/LUTD/sync_a))
(pad 12 smd roundrect (at 2.475 -0.635 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 43 /LogicBlock/lut_out_b))
(pad 13 smd roundrect (at 2.475 0.635 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 19 /LogicBlock/LUTD/async_b))
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 14 smd roundrect (at 2.475 1.905 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 90 /LogicBlock/LUTD/sync_b))
(pad 15 smd roundrect (at 2.475 3.175 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 1 GND))
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 16 smd roundrect (at 2.475 4.445 180) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 2 VCC))
(model ${KISYS3DMOD}/Package_SO.3dshapes/SOIC-16_3.9x9.9mm_P1.27mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Package_SO:SOIC-16_3.9x9.9mm_P1.27mm (layer F.Cu) (tedit 5C97300E) (tstamp 5CF2CC02)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 242.505 79.375)
Start layout
2019-06-04 22:43:08 +02:00
(descr "SOIC, 16 Pin (JEDEC MS-012AC, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/soic_narrow-r/r_16.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py")
(tags "SOIC SO")
(path /5D77FDBE/5D7AF013/5CF941AD)
(attr smd)
(fp_text reference U16 (at 0 -5.9) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 74LS174 (at 0 5.9) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.98 0.98) (thickness 0.15)))
)
(fp_line (start 3.7 -5.2) (end -3.7 -5.2) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.7 5.2) (end 3.7 -5.2) (layer F.CrtYd) (width 0.05))
(fp_line (start -3.7 5.2) (end 3.7 5.2) (layer F.CrtYd) (width 0.05))
(fp_line (start -3.7 -5.2) (end -3.7 5.2) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.95 -3.975) (end -0.975 -4.95) (layer F.Fab) (width 0.1))
(fp_line (start -1.95 4.95) (end -1.95 -3.975) (layer F.Fab) (width 0.1))
(fp_line (start 1.95 4.95) (end -1.95 4.95) (layer F.Fab) (width 0.1))
(fp_line (start 1.95 -4.95) (end 1.95 4.95) (layer F.Fab) (width 0.1))
(fp_line (start -0.975 -4.95) (end 1.95 -4.95) (layer F.Fab) (width 0.1))
(fp_line (start 0 -5.06) (end -3.45 -5.06) (layer F.SilkS) (width 0.12))
(fp_line (start 0 -5.06) (end 1.95 -5.06) (layer F.SilkS) (width 0.12))
(fp_line (start 0 5.06) (end -1.95 5.06) (layer F.SilkS) (width 0.12))
(fp_line (start 0 5.06) (end 1.95 5.06) (layer F.SilkS) (width 0.12))
(pad 16 smd roundrect (at 2.475 -4.445) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 2 VCC))
(pad 15 smd roundrect (at 2.475 -3.175) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 91 "Net-(U16-Pad15)"))
Start layout
2019-06-04 22:43:08 +02:00
(pad 14 smd roundrect (at 2.475 -1.905) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 1 GND))
(pad 13 smd roundrect (at 2.475 -0.635) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 1 GND))
(pad 12 smd roundrect (at 2.475 0.635) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 92 "Net-(U16-Pad12)"))
Start layout
2019-06-04 22:43:08 +02:00
(pad 11 smd roundrect (at 2.475 1.905) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 1 GND))
(pad 10 smd roundrect (at 2.475 3.175) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 93 "Net-(U16-Pad10)"))
Start layout
2019-06-04 22:43:08 +02:00
(pad 9 smd roundrect (at 2.475 4.445) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 29 /LogicBlock/clk))
(pad 8 smd roundrect (at -2.475 4.445) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 1 GND))
(pad 7 smd roundrect (at -2.475 3.175) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 88 /LogicBlock/LUTD/sync_a))
Start layout
2019-06-04 22:43:08 +02:00
(pad 6 smd roundrect (at -2.475 1.905) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 17 /LogicBlock/LUTD/async_a))
Start layout
2019-06-04 22:43:08 +02:00
(pad 5 smd roundrect (at -2.475 0.635) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 89 /LogicBlock/LUTD/sync_c))
Start layout
2019-06-04 22:43:08 +02:00
(pad 4 smd roundrect (at -2.475 -0.635) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 18 /LogicBlock/LUTD/async_c))
(pad 3 smd roundrect (at -2.475 -1.905) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 19 /LogicBlock/LUTD/async_b))
Start layout
2019-06-04 22:43:08 +02:00
(pad 2 smd roundrect (at -2.475 -3.175) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 90 /LogicBlock/LUTD/sync_b))
Start layout
2019-06-04 22:43:08 +02:00
(pad 1 smd roundrect (at -2.475 -4.445) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 28 /LogicBlock/rst_n))
(model ${KISYS3DMOD}/Package_SO.3dshapes/SOIC-16_3.9x9.9mm_P1.27mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Package_SO:SOIC-14_3.9x8.7mm_P1.27mm (layer F.Cu) (tedit 5C97300E) (tstamp 5CF5447F)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 223.3945 80.01)
Start layout
2019-06-04 22:43:08 +02:00
(descr "SOIC, 14 Pin (JEDEC MS-012AB, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/soic_narrow-r/r_14.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py")
(tags "SOIC SO")
(path /5D77FDBE/5D7AF013/5CF427E5)
(attr smd)
(fp_text reference U17 (at 0 -5.28) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 74164 (at 0 5.28) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 0 4.435) (end 1.95 4.435) (layer F.SilkS) (width 0.12))
(fp_line (start 0 4.435) (end -1.95 4.435) (layer F.SilkS) (width 0.12))
(fp_line (start 0 -4.435) (end 1.95 -4.435) (layer F.SilkS) (width 0.12))
(fp_line (start 0 -4.435) (end -3.45 -4.435) (layer F.SilkS) (width 0.12))
(fp_line (start -0.975 -4.325) (end 1.95 -4.325) (layer F.Fab) (width 0.1))
(fp_line (start 1.95 -4.325) (end 1.95 4.325) (layer F.Fab) (width 0.1))
(fp_line (start 1.95 4.325) (end -1.95 4.325) (layer F.Fab) (width 0.1))
(fp_line (start -1.95 4.325) (end -1.95 -3.35) (layer F.Fab) (width 0.1))
(fp_line (start -1.95 -3.35) (end -0.975 -4.325) (layer F.Fab) (width 0.1))
(fp_line (start -3.7 -4.58) (end -3.7 4.58) (layer F.CrtYd) (width 0.05))
(fp_line (start -3.7 4.58) (end 3.7 4.58) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.7 4.58) (end 3.7 -4.58) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.7 -4.58) (end -3.7 -4.58) (layer F.CrtYd) (width 0.05))
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.98 0.98) (thickness 0.15)))
)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 1 smd roundrect (at -2.475 -3.81) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 55 /LogicBlock/cfg15))
(pad 2 smd roundrect (at -2.475 -2.54) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 55 /LogicBlock/cfg15))
(pad 3 smd roundrect (at -2.475 -1.27) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 94 "Net-(U17-Pad3)"))
(pad 4 smd roundrect (at -2.475 0) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 95 "Net-(U17-Pad4)"))
(pad 5 smd roundrect (at -2.475 1.27) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 96 "Net-(U17-Pad5)"))
(pad 6 smd roundrect (at -2.475 2.54) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 97 "Net-(U17-Pad6)"))
(pad 7 smd roundrect (at -2.475 3.81) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 1 GND))
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 8 smd roundrect (at 2.475 3.81) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 27 /LogicBlock/isp_sck))
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 9 smd roundrect (at 2.475 2.54) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 2 VCC))
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 10 smd roundrect (at 2.475 1.27) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 98 "Net-(U17-Pad10)"))
(pad 11 smd roundrect (at 2.475 0) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 99 "Net-(U17-Pad11)"))
(pad 12 smd roundrect (at 2.475 -1.27) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 100 "Net-(U17-Pad12)"))
(pad 13 smd roundrect (at 2.475 -2.54) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 108 "Net-(U13-Pad1)"))
(pad 14 smd roundrect (at 2.475 -3.81) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 2 VCC))
(model ${KISYS3DMOD}/Package_SO.3dshapes/SOIC-14_3.9x8.7mm_P1.27mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Package_SO:SOIC-16_3.9x9.9mm_P1.27mm (layer B.Cu) (tedit 5C97300E) (tstamp 5CF5451F)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 223.3945 78.105)
Start layout
2019-06-04 22:43:08 +02:00
(descr "SOIC, 16 Pin (JEDEC MS-012AC, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/soic_narrow-r/r_16.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py")
(tags "SOIC SO")
(path /5D77FDBE/5D7AF013/5CF5B900)
(attr smd)
(fp_text reference U18 (at 0 5.9) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text value 74251 (at 0 -5.9) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_line (start 0 -5.06) (end 1.95 -5.06) (layer B.SilkS) (width 0.12))
(fp_line (start 0 -5.06) (end -1.95 -5.06) (layer B.SilkS) (width 0.12))
(fp_line (start 0 5.06) (end 1.95 5.06) (layer B.SilkS) (width 0.12))
(fp_line (start 0 5.06) (end -3.45 5.06) (layer B.SilkS) (width 0.12))
(fp_line (start -0.975 4.95) (end 1.95 4.95) (layer B.Fab) (width 0.1))
(fp_line (start 1.95 4.95) (end 1.95 -4.95) (layer B.Fab) (width 0.1))
(fp_line (start 1.95 -4.95) (end -1.95 -4.95) (layer B.Fab) (width 0.1))
(fp_line (start -1.95 -4.95) (end -1.95 3.975) (layer B.Fab) (width 0.1))
(fp_line (start -1.95 3.975) (end -0.975 4.95) (layer B.Fab) (width 0.1))
(fp_line (start -3.7 5.2) (end -3.7 -5.2) (layer B.CrtYd) (width 0.05))
(fp_line (start -3.7 -5.2) (end 3.7 -5.2) (layer B.CrtYd) (width 0.05))
(fp_line (start 3.7 -5.2) (end 3.7 5.2) (layer B.CrtYd) (width 0.05))
(fp_line (start 3.7 5.2) (end -3.7 5.2) (layer B.CrtYd) (width 0.05))
(fp_text user %R (at 0 0) (layer B.Fab)
(effects (font (size 0.98 0.98) (thickness 0.15)) (justify mirror))
)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 1 smd roundrect (at -2.475 4.445) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 97 "Net-(U17-Pad6)"))
(pad 2 smd roundrect (at -2.475 3.175) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 96 "Net-(U17-Pad5)"))
(pad 3 smd roundrect (at -2.475 1.905) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 95 "Net-(U17-Pad4)"))
(pad 4 smd roundrect (at -2.475 0.635) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 94 "Net-(U17-Pad3)"))
(pad 5 smd roundrect (at -2.475 -0.635) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 19 /LogicBlock/LUTD/async_b))
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 6 smd roundrect (at -2.475 -1.905) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 101 "Net-(U18-Pad6)"))
(pad 7 smd roundrect (at -2.475 -3.175) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 15 /LogicBlock/LUTD/lut_b_en_n))
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 8 smd roundrect (at -2.475 -4.445) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 1 GND))
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 9 smd roundrect (at 2.475 -4.445) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 77 /LogicBlock/lut_in2))
(pad 10 smd roundrect (at 2.475 -3.175) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 78 /LogicBlock/lut_in1))
(pad 11 smd roundrect (at 2.475 -1.905) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 76 /LogicBlock/lut_in0))
(pad 12 smd roundrect (at 2.475 -0.635) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 108 "Net-(U13-Pad1)"))
(pad 13 smd roundrect (at 2.475 0.635) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 100 "Net-(U17-Pad12)"))
(pad 14 smd roundrect (at 2.475 1.905) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 99 "Net-(U17-Pad11)"))
(pad 15 smd roundrect (at 2.475 3.175) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 98 "Net-(U17-Pad10)"))
(pad 16 smd roundrect (at 2.475 4.445) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 2 VCC))
(model ${KISYS3DMOD}/Package_SO.3dshapes/SOIC-16_3.9x9.9mm_P1.27mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
Layout input muxing
2019-06-05 23:32:39 +02:00
(module Package_SO:SOIC-14_3.9x8.7mm_P1.27mm (layer B.Cu) (tedit 5C97300E) (tstamp 5CF8DCF5)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 226.57346 53.29788 270)
Start layout
2019-06-04 22:43:08 +02:00
(descr "SOIC, 14 Pin (JEDEC MS-012AB, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/soic_narrow-r/r_14.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py")
(tags "SOIC SO")
(path /5D77FDBE/5E0E0FAE)
(attr smd)
Layout input muxing
2019-06-05 23:32:39 +02:00
(fp_text reference U3 (at 0 5.28 90) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
Start layout
2019-06-04 22:43:08 +02:00
)
Layout input muxing
2019-06-05 23:32:39 +02:00
(fp_text value 4066 (at 0 -5.28 90) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
Start layout
2019-06-04 22:43:08 +02:00
)
Layout input muxing
2019-06-05 23:32:39 +02:00
(fp_line (start 0 -4.435) (end 1.95 -4.435) (layer B.SilkS) (width 0.12))
(fp_line (start 0 -4.435) (end -1.95 -4.435) (layer B.SilkS) (width 0.12))
(fp_line (start 0 4.435) (end 1.95 4.435) (layer B.SilkS) (width 0.12))
(fp_line (start 0 4.435) (end -3.45 4.435) (layer B.SilkS) (width 0.12))
(fp_line (start -0.975 4.325) (end 1.95 4.325) (layer B.Fab) (width 0.1))
(fp_line (start 1.95 4.325) (end 1.95 -4.325) (layer B.Fab) (width 0.1))
(fp_line (start 1.95 -4.325) (end -1.95 -4.325) (layer B.Fab) (width 0.1))
(fp_line (start -1.95 -4.325) (end -1.95 3.35) (layer B.Fab) (width 0.1))
(fp_line (start -1.95 3.35) (end -0.975 4.325) (layer B.Fab) (width 0.1))
(fp_line (start -3.7 4.58) (end -3.7 -4.58) (layer B.CrtYd) (width 0.05))
(fp_line (start -3.7 -4.58) (end 3.7 -4.58) (layer B.CrtYd) (width 0.05))
(fp_line (start 3.7 -4.58) (end 3.7 4.58) (layer B.CrtYd) (width 0.05))
(fp_line (start 3.7 4.58) (end -3.7 4.58) (layer B.CrtYd) (width 0.05))
(fp_text user %R (at 0 0 90) (layer B.Fab)
(effects (font (size 0.98 0.98) (thickness 0.15)) (justify mirror))
Start layout
2019-06-04 22:43:08 +02:00
)
Layout input muxing
2019-06-05 23:32:39 +02:00
(pad 1 smd roundrect (at -2.475 3.81 270) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 20 /fabric_t3))
Layout input muxing
2019-06-05 23:32:39 +02:00
(pad 2 smd roundrect (at -2.475 2.54 270) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 106 /fabric_b3))
Layout input muxing
2019-06-05 23:32:39 +02:00
(pad 3 smd roundrect (at -2.475 1.27 270) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 36 /fabric_b2))
Layout input muxing
2019-06-05 23:32:39 +02:00
(pad 4 smd roundrect (at -2.475 0 270) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 32 /fabric_l2))
Layout input muxing
2019-06-05 23:32:39 +02:00
(pad 5 smd roundrect (at -2.475 -1.27 270) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 51 /LogicBlock/cfg4))
Layout input muxing
2019-06-05 23:32:39 +02:00
(pad 6 smd roundrect (at -2.475 -2.54 270) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 50 /LogicBlock/cfg3))
Layout input muxing
2019-06-05 23:32:39 +02:00
(pad 7 smd roundrect (at -2.475 -3.81 270) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 1 GND))
Layout input muxing
2019-06-05 23:32:39 +02:00
(pad 8 smd roundrect (at 2.475 -3.81 270) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 30 /fabric_l0))
Layout input muxing
2019-06-05 23:32:39 +02:00
(pad 9 smd roundrect (at 2.475 -2.54 270) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 38 /fabric_b0))
Layout input muxing
2019-06-05 23:32:39 +02:00
(pad 10 smd roundrect (at 2.475 -1.27 270) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 37 /fabric_b1))
Layout input muxing
2019-06-05 23:32:39 +02:00
(pad 11 smd roundrect (at 2.475 0 270) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 31 /fabric_l1))
Layout input muxing
2019-06-05 23:32:39 +02:00
(pad 12 smd roundrect (at 2.475 1.27 270) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 53 /LogicBlock/cfg6))
Layout input muxing
2019-06-05 23:32:39 +02:00
(pad 13 smd roundrect (at 2.475 2.54 270) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 54 /LogicBlock/cfg7))
Layout input muxing
2019-06-05 23:32:39 +02:00
(pad 14 smd roundrect (at 2.475 3.81 270) (size 1.95 0.6) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 2 VCC))
(model ${KISYS3DMOD}/Package_SO.3dshapes/SOIC-14_3.9x8.7mm_P1.27mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
Layout input muxing
2019-06-05 23:32:39 +02:00
(module Package_SO:SOIC-14_3.9x8.7mm_P1.27mm (layer F.Cu) (tedit 5C97300E) (tstamp 5CF8DDB0)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 227.14346 52.72788)
Start layout
2019-06-04 22:43:08 +02:00
(descr "SOIC, 14 Pin (JEDEC MS-012AB, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/soic_narrow-r/r_14.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py")
(tags "SOIC SO")
(path /5D77FDBE/5E0E1A05)
(attr smd)
(fp_text reference U4 (at 0 -5.28) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 4066 (at 0 5.28) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.98 0.98) (thickness 0.15)))
)
(fp_line (start 3.7 -4.58) (end -3.7 -4.58) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.7 4.58) (end 3.7 -4.58) (layer F.CrtYd) (width 0.05))
(fp_line (start -3.7 4.58) (end 3.7 4.58) (layer F.CrtYd) (width 0.05))
(fp_line (start -3.7 -4.58) (end -3.7 4.58) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.95 -3.35) (end -0.975 -4.325) (layer F.Fab) (width 0.1))
(fp_line (start -1.95 4.325) (end -1.95 -3.35) (layer F.Fab) (width 0.1))
(fp_line (start 1.95 4.325) (end -1.95 4.325) (layer F.Fab) (width 0.1))
(fp_line (start 1.95 -4.325) (end 1.95 4.325) (layer F.Fab) (width 0.1))
(fp_line (start -0.975 -4.325) (end 1.95 -4.325) (layer F.Fab) (width 0.1))
(fp_line (start 0 -4.435) (end -3.45 -4.435) (layer F.SilkS) (width 0.12))
(fp_line (start 0 -4.435) (end 1.95 -4.435) (layer F.SilkS) (width 0.12))
(fp_line (start 0 4.435) (end -1.95 4.435) (layer F.SilkS) (width 0.12))
(fp_line (start 0 4.435) (end 1.95 4.435) (layer F.SilkS) (width 0.12))
(pad 14 smd roundrect (at 2.475 -3.81) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 2 VCC))
(pad 13 smd roundrect (at 2.475 -2.54) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 49 /LogicBlock/cfg2))
Start layout
2019-06-04 22:43:08 +02:00
(pad 12 smd roundrect (at 2.475 -1.27) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 48 /LogicBlock/cfg1))
Start layout
2019-06-04 22:43:08 +02:00
(pad 11 smd roundrect (at 2.475 0) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Layout input muxing
2019-06-05 23:32:39 +02:00
(net 22 /fabric_t1))
Start layout
2019-06-04 22:43:08 +02:00
(pad 10 smd roundrect (at 2.475 1.27) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 37 /fabric_b1))
Start layout
2019-06-04 22:43:08 +02:00
(pad 9 smd roundrect (at 2.475 2.54) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 38 /fabric_b0))
Start layout
2019-06-04 22:43:08 +02:00
(pad 8 smd roundrect (at 2.475 3.81) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Layout input muxing
2019-06-05 23:32:39 +02:00
(net 23 /fabric_t0))
Start layout
2019-06-04 22:43:08 +02:00
(pad 7 smd roundrect (at -2.475 3.81) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 1 GND))
(pad 6 smd roundrect (at -2.475 2.54) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 52 /LogicBlock/cfg5))
Layout input muxing
2019-06-05 23:32:39 +02:00
(pad 5 smd roundrect (at -2.475 1.27) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 47 /LogicBlock/cfg0))
Start layout
2019-06-04 22:43:08 +02:00
(pad 4 smd roundrect (at -2.475 0) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 33 /fabric_l3))
Start layout
2019-06-04 22:43:08 +02:00
(pad 3 smd roundrect (at -2.475 -1.27) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 106 /fabric_b3))
Start layout
2019-06-04 22:43:08 +02:00
(pad 2 smd roundrect (at -2.475 -2.54) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 36 /fabric_b2))
Start layout
2019-06-04 22:43:08 +02:00
(pad 1 smd roundrect (at -2.475 -3.81) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Layout input muxing
2019-06-05 23:32:39 +02:00
(net 21 /fabric_t2))
Start layout
2019-06-04 22:43:08 +02:00
(model ${KISYS3DMOD}/Package_SO.3dshapes/SOIC-14_3.9x8.7mm_P1.27mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Package_SO:SOIC-16_3.9x9.9mm_P1.27mm (layer F.Cu) (tedit 5C97300E) (tstamp 5CF2ED55)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 232.2845 78.105 180)
Start layout
2019-06-04 22:43:08 +02:00
(descr "SOIC, 16 Pin (JEDEC MS-012AC, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/soic_narrow-r/r_16.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py")
(tags "SOIC SO")
(path /5D77FDBE/5D7AF013/5CF4F8AB)
(attr smd)
(fp_text reference U14 (at 0 -5.9) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 74251 (at 0 5.9) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 0 5.06) (end 1.95 5.06) (layer F.SilkS) (width 0.12))
(fp_line (start 0 5.06) (end -1.95 5.06) (layer F.SilkS) (width 0.12))
(fp_line (start 0 -5.06) (end 1.95 -5.06) (layer F.SilkS) (width 0.12))
(fp_line (start 0 -5.06) (end -3.45 -5.06) (layer F.SilkS) (width 0.12))
(fp_line (start -0.975 -4.95) (end 1.95 -4.95) (layer F.Fab) (width 0.1))
(fp_line (start 1.95 -4.95) (end 1.95 4.95) (layer F.Fab) (width 0.1))
(fp_line (start 1.95 4.95) (end -1.95 4.95) (layer F.Fab) (width 0.1))
(fp_line (start -1.95 4.95) (end -1.95 -3.975) (layer F.Fab) (width 0.1))
(fp_line (start -1.95 -3.975) (end -0.975 -4.95) (layer F.Fab) (width 0.1))
(fp_line (start -3.7 -5.2) (end -3.7 5.2) (layer F.CrtYd) (width 0.05))
(fp_line (start -3.7 5.2) (end 3.7 5.2) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.7 5.2) (end 3.7 -5.2) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.7 -5.2) (end -3.7 -5.2) (layer F.CrtYd) (width 0.05))
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.98 0.98) (thickness 0.15)))
)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 1 smd roundrect (at -2.475 -4.445 180) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 83 "Net-(U13-Pad6)"))
(pad 2 smd roundrect (at -2.475 -3.175 180) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 84 "Net-(U13-Pad5)"))
(pad 3 smd roundrect (at -2.475 -1.905 180) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 85 "Net-(U13-Pad4)"))
(pad 4 smd roundrect (at -2.475 -0.635 180) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 86 "Net-(U13-Pad3)"))
(pad 5 smd roundrect (at -2.475 0.635 180) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 17 /LogicBlock/LUTD/async_a))
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 6 smd roundrect (at -2.475 1.905 180) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 87 "Net-(U14-Pad6)"))
(pad 7 smd roundrect (at -2.475 3.175 180) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 16 /LogicBlock/LUTD/lut_a_en_n))
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 8 smd roundrect (at -2.475 4.445 180) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 1 GND))
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 9 smd roundrect (at 2.475 4.445 180) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 77 /LogicBlock/lut_in2))
(pad 10 smd roundrect (at 2.475 3.175 180) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 78 /LogicBlock/lut_in1))
(pad 11 smd roundrect (at 2.475 1.905 180) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 76 /LogicBlock/lut_in0))
(pad 12 smd roundrect (at 2.475 0.635 180) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 109 /LogicBlock/cfgLO))
(pad 13 smd roundrect (at 2.475 -0.635 180) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 80 "Net-(U13-Pad12)"))
(pad 14 smd roundrect (at 2.475 -1.905 180) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 81 "Net-(U13-Pad11)"))
(pad 15 smd roundrect (at 2.475 -3.175 180) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 82 "Net-(U13-Pad10)"))
(pad 16 smd roundrect (at 2.475 -4.445 180) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
Start layout
2019-06-04 22:43:08 +02:00
(net 2 VCC))
(model ${KISYS3DMOD}/Package_SO.3dshapes/SOIC-16_3.9x9.9mm_P1.27mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Connector_PinHeader_2.54mm:PinHeader_1x12_P2.54mm_Horizontal (layer F.Cu) (tedit 59FED5CB) (tstamp 5CF396F4)
(at 218.44 44.45 90)
(descr "Through hole angled pin header, 1x12, 2.54mm pitch, 6mm pin length, single row")
(tags "Through hole angled pin header THT 1x12 2.54mm single row")
(path /5CF30EFB)
(fp_text reference J1 (at 4.385 -2.27 90) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value Top (at 4.385 30.21 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 2.135 -1.27) (end 4.04 -1.27) (layer F.Fab) (width 0.1))
(fp_line (start 4.04 -1.27) (end 4.04 29.21) (layer F.Fab) (width 0.1))
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(fp_line (start -1.27 -1.27) (end 0 -1.27) (layer F.SilkS) (width 0.12))
(fp_line (start -1.8 -1.8) (end -1.8 29.75) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.8 29.75) (end 10.55 29.75) (layer F.CrtYd) (width 0.05))
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(fp_text user %R (at 2.77 13.97) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(pad 1 thru_hole rect (at 0 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 2 VCC))
(pad 2 thru_hole oval (at 0 2.54 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 1 GND))
(pad 3 thru_hole oval (at 0 5.08 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 29 /LogicBlock/clk))
(pad 4 thru_hole oval (at 0 7.62 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 28 /LogicBlock/rst_n))
(pad 5 thru_hole oval (at 0 10.16 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 27 /LogicBlock/isp_sck))
(pad 6 thru_hole oval (at 0 12.7 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 26 /LogicBlock/isp_mosi))
(pad 7 thru_hole oval (at 0 15.24 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 25 "Net-(J1-Pad7)"))
(pad 8 thru_hole oval (at 0 17.78 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 24 "Net-(J1-Pad8)"))
(pad 9 thru_hole oval (at 0 20.32 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 20 /fabric_t3))
Start layout
2019-06-04 22:43:08 +02:00
(pad 10 thru_hole oval (at 0 22.86 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 21 /fabric_t2))
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(pad 11 thru_hole oval (at 0 25.4 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 22 /fabric_t1))
Start layout
2019-06-04 22:43:08 +02:00
(pad 12 thru_hole oval (at 0 27.94 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 23 /fabric_t0))
Start layout
2019-06-04 22:43:08 +02:00
(model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x12_P2.54mm_Horizontal.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Connector_PinSocket_2.54mm:PinSocket_1x12_P2.54mm_Horizontal (layer F.Cu) (tedit 5A19A41E) (tstamp 5CF38B22)
(at 218.44 90.17 90)
(descr "Through hole angled socket strip, 1x12, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated")
(tags "Through hole angled socket strip THT 1x12 2.54mm single row")
(path /60090C3D)
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(effects (font (size 1 1) (thickness 0.15)))
)
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(effects (font (size 1 1) (thickness 0.15)))
)
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(fp_line (start -1.52 18.08) (end 0 18.08) (layer F.Fab) (width 0.1))
(fp_line (start 0 18.08) (end 0 17.48) (layer F.Fab) (width 0.1))
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(fp_line (start 0 20.62) (end 0 20.02) (layer F.Fab) (width 0.1))
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(fp_line (start 0 25.7) (end 0 25.1) (layer F.Fab) (width 0.1))
(fp_line (start 0 27.64) (end -1.52 27.64) (layer F.Fab) (width 0.1))
(fp_line (start -1.52 28.24) (end 0 28.24) (layer F.Fab) (width 0.1))
(fp_line (start 0 28.24) (end 0 27.64) (layer F.Fab) (width 0.1))
(fp_line (start -10.09 -1.21) (end -1.46 -1.21) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 -1.091905) (end -1.46 -1.091905) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 -0.97381) (end -1.46 -0.97381) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 -0.855715) (end -1.46 -0.855715) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 -0.73762) (end -1.46 -0.73762) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 -0.619525) (end -1.46 -0.619525) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 -0.50143) (end -1.46 -0.50143) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 -0.383335) (end -1.46 -0.383335) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 -0.26524) (end -1.46 -0.26524) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 -0.147145) (end -1.46 -0.147145) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 -0.02905) (end -1.46 -0.02905) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 0.089045) (end -1.46 0.089045) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 0.20714) (end -1.46 0.20714) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 0.325235) (end -1.46 0.325235) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 0.44333) (end -1.46 0.44333) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 0.561425) (end -1.46 0.561425) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 0.67952) (end -1.46 0.67952) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 0.797615) (end -1.46 0.797615) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 0.91571) (end -1.46 0.91571) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 1.033805) (end -1.46 1.033805) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 1.1519) (end -1.46 1.1519) (layer F.SilkS) (width 0.12))
(fp_line (start -1.46 -0.36) (end -1.11 -0.36) (layer F.SilkS) (width 0.12))
(fp_line (start -1.46 0.36) (end -1.11 0.36) (layer F.SilkS) (width 0.12))
(fp_line (start -1.46 2.18) (end -1.05 2.18) (layer F.SilkS) (width 0.12))
(fp_line (start -1.46 2.9) (end -1.05 2.9) (layer F.SilkS) (width 0.12))
(fp_line (start -1.46 4.72) (end -1.05 4.72) (layer F.SilkS) (width 0.12))
(fp_line (start -1.46 5.44) (end -1.05 5.44) (layer F.SilkS) (width 0.12))
(fp_line (start -1.46 7.26) (end -1.05 7.26) (layer F.SilkS) (width 0.12))
(fp_line (start -1.46 7.98) (end -1.05 7.98) (layer F.SilkS) (width 0.12))
(fp_line (start -1.46 9.8) (end -1.05 9.8) (layer F.SilkS) (width 0.12))
(fp_line (start -1.46 10.52) (end -1.05 10.52) (layer F.SilkS) (width 0.12))
(fp_line (start -1.46 12.34) (end -1.05 12.34) (layer F.SilkS) (width 0.12))
(fp_line (start -1.46 13.06) (end -1.05 13.06) (layer F.SilkS) (width 0.12))
(fp_line (start -1.46 14.88) (end -1.05 14.88) (layer F.SilkS) (width 0.12))
(fp_line (start -1.46 15.6) (end -1.05 15.6) (layer F.SilkS) (width 0.12))
(fp_line (start -1.46 17.42) (end -1.05 17.42) (layer F.SilkS) (width 0.12))
(fp_line (start -1.46 18.14) (end -1.05 18.14) (layer F.SilkS) (width 0.12))
(fp_line (start -1.46 19.96) (end -1.05 19.96) (layer F.SilkS) (width 0.12))
(fp_line (start -1.46 20.68) (end -1.05 20.68) (layer F.SilkS) (width 0.12))
(fp_line (start -1.46 22.5) (end -1.05 22.5) (layer F.SilkS) (width 0.12))
(fp_line (start -1.46 23.22) (end -1.05 23.22) (layer F.SilkS) (width 0.12))
(fp_line (start -1.46 25.04) (end -1.05 25.04) (layer F.SilkS) (width 0.12))
(fp_line (start -1.46 25.76) (end -1.05 25.76) (layer F.SilkS) (width 0.12))
(fp_line (start -1.46 27.58) (end -1.05 27.58) (layer F.SilkS) (width 0.12))
(fp_line (start -1.46 28.3) (end -1.05 28.3) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 1.27) (end -1.46 1.27) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 3.81) (end -1.46 3.81) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 6.35) (end -1.46 6.35) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 8.89) (end -1.46 8.89) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 11.43) (end -1.46 11.43) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 13.97) (end -1.46 13.97) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 16.51) (end -1.46 16.51) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 19.05) (end -1.46 19.05) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 21.59) (end -1.46 21.59) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 24.13) (end -1.46 24.13) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 26.67) (end -1.46 26.67) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 -1.33) (end -1.46 -1.33) (layer F.SilkS) (width 0.12))
(fp_line (start -1.46 -1.33) (end -1.46 29.27) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 29.27) (end -1.46 29.27) (layer F.SilkS) (width 0.12))
(fp_line (start -10.09 -1.33) (end -10.09 29.27) (layer F.SilkS) (width 0.12))
(fp_line (start 1.11 -1.33) (end 1.11 0) (layer F.SilkS) (width 0.12))
(fp_line (start 0 -1.33) (end 1.11 -1.33) (layer F.SilkS) (width 0.12))
(fp_line (start 1.75 -1.75) (end -10.55 -1.75) (layer F.CrtYd) (width 0.05))
(fp_line (start -10.55 -1.75) (end -10.55 29.75) (layer F.CrtYd) (width 0.05))
(fp_line (start -10.55 29.75) (end 1.75 29.75) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.75 29.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05))
(fp_text user %R (at -5.775 13.97) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(pad 1 thru_hole rect (at 0 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 2 VCC))
(pad 2 thru_hole oval (at 0 2.54 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 1 GND))
(pad 3 thru_hole oval (at 0 5.08 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 29 /LogicBlock/clk))
(pad 4 thru_hole oval (at 0 7.62 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 28 /LogicBlock/rst_n))
(pad 5 thru_hole oval (at 0 10.16 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 27 /LogicBlock/isp_sck))
(pad 6 thru_hole oval (at 0 12.7 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 111 /mosi_d))
Start layout
2019-06-04 22:43:08 +02:00
(pad 7 thru_hole oval (at 0 15.24 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 25 "Net-(J1-Pad7)"))
(pad 8 thru_hole oval (at 0 17.78 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 39 "Net-(J4-Pad8)"))
Start layout
2019-06-04 22:43:08 +02:00
(pad 9 thru_hole oval (at 0 20.32 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 106 /fabric_b3))
Start layout
2019-06-04 22:43:08 +02:00
(pad 10 thru_hole oval (at 0 22.86 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 36 /fabric_b2))
Start layout
2019-06-04 22:43:08 +02:00
(pad 11 thru_hole oval (at 0 25.4 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 37 /fabric_b1))
Start layout
2019-06-04 22:43:08 +02:00
(pad 12 thru_hole oval (at 0 27.94 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(net 38 /fabric_b0))
Start layout
2019-06-04 22:43:08 +02:00
(model ${KISYS3DMOD}/Connector_PinSocket_2.54mm.3dshapes/PinSocket_1x12_P2.54mm_Horizontal.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Capacitor_SMD:C_1206_3216Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5CF6C2AF)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 170.486021 83.951541)
Start layout
2019-06-04 22:43:08 +02:00
(descr "Capacitor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
(tags capacitor)
(path /5CF70F0E)
(attr smd)
(fp_text reference C1 (at 0 -1.82) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 10u (at 0 1.82) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1))
(fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1))
(fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1))
(fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1))
(fp_line (start -0.602064 -0.91) (end 0.602064 -0.91) (layer F.SilkS) (width 0.12))
(fp_line (start -0.602064 0.91) (end 0.602064 0.91) (layer F.SilkS) (width 0.12))
(fp_line (start -2.28 1.12) (end -2.28 -1.12) (layer F.CrtYd) (width 0.05))
(fp_line (start -2.28 -1.12) (end 2.28 -1.12) (layer F.CrtYd) (width 0.05))
(fp_line (start 2.28 -1.12) (end 2.28 1.12) (layer F.CrtYd) (width 0.05))
(fp_line (start 2.28 1.12) (end -2.28 1.12) (layer F.CrtYd) (width 0.05))
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.8 0.8) (thickness 0.12)))
)
(pad 1 smd roundrect (at -1.4 0) (size 1.25 1.75) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.2)
(net 2 VCC))
(pad 2 smd roundrect (at 1.4 0) (size 1.25 1.75) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.2)
(net 1 GND))
(model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_1206_3216Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module LED_SMD:LED_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5CF6C2C2)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 175.336021 83.601541)
Start layout
2019-06-04 22:43:08 +02:00
(descr "LED SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
(tags diode)
(path /5CFB92E6)
(attr smd)
(fp_text reference D1 (at 0 -1.43) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value PWR (at 0 1.43) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 0.8 -0.4) (end -0.5 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.5 -0.4) (end -0.8 -0.1) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 -0.1) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.735) (end -1.485 -0.735) (layer F.SilkS) (width 0.12))
(fp_line (start -1.485 -0.735) (end -1.485 0.735) (layer F.SilkS) (width 0.12))
(fp_line (start -1.485 0.735) (end 0.8 0.735) (layer F.SilkS) (width 0.12))
(fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.4 0.4) (thickness 0.06)))
)
(pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 1 GND))
(pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 3 "Net-(D1-Pad2)"))
(model ${KISYS3DMOD}/LED_SMD.3dshapes/LED_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5CF6C2D3)
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(at 175.296021 86.151541)
Start layout
2019-06-04 22:43:08 +02:00
(descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
(tags resistor)
(path /5CFB92EC)
(attr smd)
(fp_text reference R1 (at 0 -1.43) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 470 (at 0 1.43) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12))
(fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12))
(fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05))
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.4 0.4) (thickness 0.06)))
)
(pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 2 VCC))
(pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 3 "Net-(D1-Pad2)"))
(model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(gr_line (start 256.54 43.18) (end 208.28 43.18) (layer Edge.Cuts) (width 0.05) (tstamp 5CF2CF37))
(gr_line (start 256.54 91.44) (end 256.54 43.18) (layer Edge.Cuts) (width 0.05))
(gr_line (start 208.28 91.44) (end 256.54 91.44) (layer Edge.Cuts) (width 0.05))
(gr_line (start 208.28 43.18) (end 208.28 91.44) (layer Edge.Cuts) (width 0.05))
Every day I'm layoutin'
2019-06-09 23:22:42 +02:00
(segment (start 225.80846 68.60288) (end 225.80846 67.33288) (width 0.1524) (layer B.Cu) (net 1))
(segment (start 234.69846 68.60288) (end 234.69846 67.33288) (width 0.1524) (layer B.Cu) (net 1))
(segment (start 220.85846 68.60288) (end 220.85846 67.33288) (width 0.1524) (layer F.Cu) (net 1))
(segment (start 225.80846 67.33288) (end 223.69018 67.33288) (width 0.1524) (layer B.Cu) (net 1))
(segment (start 223.69018 67.33288) (end 222.55736 67.33288) (width 0.1524) (layer B.Cu) (net 1))
(segment (start 222.55736 67.33288) (end 222.52432 67.29984) (width 0.1524) (layer B.Cu) (net 1))
(via (at 222.52432 67.29984) (size 0.6) (drill 0.3) (layers F.Cu B.Cu) (net 1))
(segment (start 220.8915 67.29984) (end 220.85846 67.33288) (width 0.1524) (layer F.Cu) (net 1))
(segment (start 222.52432 67.29984) (end 220.8915 67.29984) (width 0.1524) (layer F.Cu) (net 1))
(segment (start 220.85846 69.647028) (end 220.850221 69.655267) (width 0.1524) (layer F.Cu) (net 1))
(via (at 220.850221 69.655267) (size 0.6) (drill 0.3) (layers F.Cu B.Cu) (net 1))
(segment (start 220.85846 68.60288) (end 220.85846 69.647028) (width 0.1524) (layer F.Cu) (net 1))
(segment (start 218.68071 70.74929) (end 218.31 71.12) (width 0.1524) (layer B.Cu) (net 1))
(segment (start 219.331934 70.74929) (end 218.68071 70.74929) (width 0.1524) (layer B.Cu) (net 1))
(segment (start 220.425957 69.655267) (end 219.331934 70.74929) (width 0.1524) (layer B.Cu) (net 1))
(segment (start 220.850221 69.655267) (end 220.425957 69.655267) (width 0.1524) (layer B.Cu) (net 1))
(segment (start 220.130001 45.299999) (end 220.98 44.45) (width 0.1524) (layer F.Cu) (net 1))
(segment (start 219.901399 45.528601) (end 220.130001 45.299999) (width 0.1524) (layer F.Cu) (net 1))
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Layout input muxing
2019-06-05 23:32:39 +02:00
Start layout
2019-06-04 22:43:08 +02:00
)
Reference in New Issue Copy Permalink