electronics/ttl-fpga
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Remove incorrect junction

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Fixes #7.
This commit is contained in:
Markus Koch 2019-06-13 19:18:58 +02:00
parent dc5b791b6d
commit 01043be425
1 changed files with 2 additions and 5 deletions
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7
kicad_clean/logic_block.sch
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@ -2447,10 +2447,6 @@ Text Label 13000 7750 1 50 Italic 0
fabric_b0 fabric_b0
Text Label 14650 6050 0 50 Italic 0 Text Label 14650 6050 0 50 Italic 0
fabric_r0 fabric_r0
Wire Wire Line
14350 6050 14350 5600
Wire Wire Line
14350 7400 14350 6050
Wire Wire Line Wire Wire Line
14650 6500 13450 6500 14650 6500 13450 6500
Wire Wire Line Wire Wire Line
@ -2461,7 +2457,6 @@ Text Label 14650 6950 0 50 Italic 0
fabric_r2 fabric_r2
Text Label 14650 7400 0 50 Italic 0 Text Label 14650 7400 0 50 Italic 0
fabric_r3 fabric_r3
Connection ~ 14350 6050
Wire Wire Line Wire Wire Line
14350 6050 14650 6050 14350 6050 14650 6050
$Sheet $Sheet
@ -2527,4 +2522,6 @@ Wire Bus Line
7750 1800 7750 4350 7750 1800 7750 4350
Wire Bus Line Wire Bus Line
5900 1800 5900 4350 5900 1800 5900 4350
Wire Wire Line
14350 5600 14350 7400
$EndSCHEMATC $EndSCHEMATC