parent
28b9ad42c3
commit
037d13c5f6
@ -1229,7 +1229,7 @@ Wire Wire Line
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Wire Wire Line
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5200 7350 4800 7350
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Text Label 5200 7950 2 50 ~ 0
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fabric_2
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fabric_3
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Text Label 5200 9600 2 50 ~ 0
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fabric_t3
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Text Label 5200 9500 2 50 ~ 0
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@ -1430,8 +1430,8 @@ Wire Wire Line
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3600 9750 3600 9650
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Wire Wire Line
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3600 9650 3700 9650
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Text Notes 2950 9400 0 50 ~ 0
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LUT Input Limitations:\n* 4-bit: Never F3\n* 3-bit: Never F3, L3
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Text Notes 2900 9400 0 50 ~ 0
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LUT Input Limitations:\n* 4-bit: Never F3+L2\n* 3-bit: Never F3+L2, L3
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Text Label 4450 6100 0 50 ~ 0
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lut_in[3..0]
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Wire Bus Line
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@ -2462,6 +2462,22 @@ Wire Notes Line
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6450 4550 6400 4600
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Wire Notes Line
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6450 4550 6400 4500
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Wire Wire Line
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10050 5900 10400 5900
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Wire Wire Line
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9650 5900 9750 5900
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Wire Wire Line
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9650 6400 9750 6400
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Wire Wire Line
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10050 6400 10400 6400
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Wire Wire Line
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9650 7750 9750 7750
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Wire Wire Line
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10050 7750 10400 7750
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Wire Wire Line
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10050 8250 10400 8250
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Wire Wire Line
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9650 8250 9750 8250
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Wire Bus Line
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12900 7850 13500 7850
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Wire Bus Line
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@ -2486,20 +2502,6 @@ Wire Bus Line
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7750 1800 7750 4350
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Wire Bus Line
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5900 1800 5900 4350
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Wire Wire Line
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10050 5900 10400 5900
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Wire Wire Line
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9650 5900 9750 5900
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Wire Wire Line
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9650 6400 9750 6400
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Wire Wire Line
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10050 6400 10400 6400
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Wire Wire Line
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9650 7750 9750 7750
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Wire Wire Line
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10050 7750 10400 7750
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Wire Wire Line
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10050 8250 10400 8250
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Wire Wire Line
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9650 8250 9750 8250
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Text Notes 5200 7950 0 50 ~ 0
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*
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$EndSCHEMATC
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