diff --git a/ttl-fpga.pro b/ttl-fpga.pro index 1bff05d..ad6987c 100644 --- a/ttl-fpga.pro +++ b/ttl-fpga.pro @@ -1,4 +1,4 @@ -update=Thu 30 May 2019 02:28:07 PM CEST +update=Sat 01 Jun 2019 09:25:42 PM CEST version=1 last_client=kicad [general] @@ -22,15 +22,15 @@ AllowMicroVias=0 AllowBlindVias=0 RequireCourtyardDefinitions=0 ProhibitOverlappingCourtyards=1 -MinTrackWidth=0.2 +MinTrackWidth=0.1524 MinViaDiameter=0.4 MinViaDrill=0.3 MinMicroViaDiameter=0.2 MinMicroViaDrill=0.09999999999999999 MinHoleToHole=0.25 -TrackWidth1=0.25 -ViaDiameter1=0.8 -ViaDrill1=0.4 +TrackWidth1=0.1524 +ViaDiameter1=0.6 +ViaDrill1=0.3 dPairWidth1=0.2 dPairGap1=0.25 dPairViaGap1=0.25 @@ -57,7 +57,7 @@ OthersTextUpright=1 SolderMaskClearance=0.051 SolderMaskMinWidth=0.25 SolderPasteClearance=0 -SolderPasteRatio=0 +SolderPasteRatio=-0 [pcbnew/Layer.F.Cu] Name=F.Cu Type=0 @@ -223,14 +223,14 @@ Enabled=1 [pcbnew/Layer.F.Fab] Enabled=1 [pcbnew/Layer.Rescue] -Enabled=1 +Enabled=0 [pcbnew/Netclasses] [pcbnew/Netclasses/Default] Name=Default -Clearance=0.2 -TrackWidth=0.25 -ViaDiameter=0.8 -ViaDrill=0.4 +Clearance=0.1524 +TrackWidth=0.1524 +ViaDiameter=0.6 +ViaDrill=0.3 uViaDiameter=0.3 uViaDrill=0.1 dPairWidth=0.2