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master
Markus Koch 3 years ago
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commit
9f96e5cf82
  1. 16
      kicad_clean/ttl-fpga.sch

16
kicad_clean/ttl-fpga.sch

@ -581,14 +581,6 @@ F 3 "" H 3550 5400 50 0001 C CNN
1 3550 5400
1 0 0 -1
$EndComp
Wire Bus Line
6150 2600 6900 2600
Wire Bus Line
6150 5050 6900 5050
Wire Bus Line
3900 4250 3900 4550
Wire Bus Line
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Wire Wire Line
4150 5350 4150 5400
$Comp
@ -602,4 +594,12 @@ F 3 "" H 4150 5400 50 0001 C CNN
1 4150 5400
1 0 0 -1
$EndComp
Wire Bus Line
7450 4250 7450 4550
Wire Bus Line
3900 4250 3900 4550
Wire Bus Line
6150 2600 6900 2600
Wire Bus Line
6150 5050 6900 5050
$EndSCHEMATC

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