This commit is contained in:
Markus Koch 2019-06-19 18:32:59 +02:00
parent 925e17372a
commit a1d635889c
4 changed files with 20 additions and 6 deletions

View File

@ -191,10 +191,19 @@ struct fpga_chain *fpga_isp_chain_new(struct fpga_cell *entry)
report(LL_INFO,
"Generating ISP chain...");
if (entry->type->identifier != 'P') {
report(LL_CRITICAL,
"Entry cell must be of type P, was '%c'",
entry->type->identifier);
errno = EINVAL;
return NULL;
}
chain = calloc(sizeof (struct fpga_chain), 1);
if (!chain) {
report (LL_CRITICAL,
"Out of memory during ISP chain generation.");
errno = ENOMEM;
return NULL;
}
@ -226,6 +235,7 @@ struct fpga_chain *fpga_isp_chain_new(struct fpga_cell *entry)
&current_channel);
if (current_channel == FPGA_ISP_CHANNEL_ERROR) {
/* TODO: Clean up memory */
errno = ETYPE;
return NULL;
}
}
@ -241,7 +251,7 @@ struct fpga_chain *fpga_isp_chain_new(struct fpga_cell *entry)
}
report(LL_INFO,
"ISP chain generated finished.");
"ISP chain generation finished.");
return chain;
}

View File

@ -31,3 +31,8 @@ enum log_level report(enum log_level log_level, const char *format, ...)
return log_level;
}
void set_log_level(enum log_level log_level)
{
current_log_level = log_level;
}

View File

@ -10,8 +10,10 @@ enum log_level {LL_CRITICAL = 0,
LL_DEBUG,
LL_COUNT};
enum log_level report(enum log_level log_level, const char *format, ...);
void set_log_level(enum log_level log_level);
/* Error codes */
#define ECONN 1000 /* Tried to connect to already connected port */
#define ETYPE 1001 /* Tried an operation on a cell that does not support it */
#endif // FPGA_GLOBAL_H

View File

@ -11,6 +11,8 @@ int development_test_main(int argc, char *argv[])
{
struct fpga_cell *entry_cell;
set_log_level(LL_DEBUG);
entry_cell = fpga_fdef_loader_load("fdef/4x4.fdef");
if (!entry_cell) {
@ -18,11 +20,6 @@ int development_test_main(int argc, char *argv[])
return E_FDEF;
}
// if (entry_cell->type != FPGA_CELL_PROG) {
// report(LL_CRITICAL, "Entry cell must be of type P.");
// return E_FDEF;
// }
report(LL_INFO, "FDEF loaded.");
if (!fpga_isp_chain_new(entry_cell)) {