diff --git a/sw/kousaten/src/fpga.c b/sw/kousaten/src/fpga.c index 62d8c6f..54284aa 100644 --- a/sw/kousaten/src/fpga.c +++ b/sw/kousaten/src/fpga.c @@ -5,7 +5,7 @@ #include int fpga_generate_bitstream(struct fpga_chain *chain, - char *filename) + char *filename, int ascii) { int i; char *buf = NULL; @@ -37,9 +37,13 @@ int fpga_generate_bitstream(struct fpga_chain *chain, goto fail; } for (int j = 0; j < chain->head[i]->type->isp_length; ++j) { - fprintf(bitstream, "%02X ", buf[j] & 0xFF); + if (ascii) + fprintf(bitstream, "%02X ", buf[j] & 0xFF); + else + fputc(buf[j] & 0xFF, bitstream); } - fprintf(bitstream, "\n"); + if (ascii) + fprintf(bitstream, "\n"); free(buf); } diff --git a/sw/kousaten/src/fpga.h b/sw/kousaten/src/fpga.h index e347dd9..c9dbd18 100644 --- a/sw/kousaten/src/fpga.h +++ b/sw/kousaten/src/fpga.h @@ -3,6 +3,6 @@ #include "fpga_cell.h" int fpga_generate_bitstream(struct fpga_chain *chain, - char *filename); + char *filename, int ascii); #endif // FPGA_H diff --git a/sw/kousaten/src/main.c b/sw/kousaten/src/main.c index d2e939e..ee3b966 100644 --- a/sw/kousaten/src/main.c +++ b/sw/kousaten/src/main.c @@ -18,10 +18,11 @@ int development_test_main(int argc, char *argv[]) char *fdef_filename = "fdef/4x4.fdef"; char *kst_filename = "-"; char *bitstream_filename = "-"; + int bitstream_ascii = 0; set_log_level(LL_DEBUG); - while((opt = getopt(argc, argv, "f:i:o:")) != -1) + while((opt = getopt(argc, argv, "f:i:o:a")) != -1) { switch(opt) { @@ -35,11 +36,20 @@ int development_test_main(int argc, char *argv[]) case 'o': bitstream_filename = optarg; break; + case 'h': + bitstream_ascii = 1; + break; case ':': case '?': - printf("Usage: %s [-f fdef] [-i input.kst] [-o output.bin]", + printf("Usage: %s [-f fdef] [-i input.kst] [-o output.bin] [-h]\n" + "Generate bitstreams for the TTL-FPGA.\n\n" + "When INPUT or OUTPUT is -, read/write standard input.\n\n" + " -f\tFDEF FPGA description file, default fdef/4x4.fdef\n" + " -i\tKousaten input file, default stdin\n" + " -o\tOutput file, default stdout\n" + " -a\tGenerate output as ASCII HEX\n", argv[0]); - break; + return 0; default: break; } @@ -62,9 +72,9 @@ int development_test_main(int argc, char *argv[]) /* TODO: Configure application specific logic */ ((struct fpga_cell_lut34 *)(entry_cell->cell_connections[RIGHT]))->lut_in_sel[0] = 'A'; ((struct fpga_cell_lut34 *)(entry_cell->cell_connections[RIGHT]))->drive_sel[0] = 'C'; - ((struct fpga_cell_lut34 *)(entry_cell->cell_connections[RIGHT]))->LUT4 = 0; + ((struct fpga_cell_lut34 *)(entry_cell->cell_connections[RIGHT]))->LUT4 = 0x0F; - if (fpga_generate_bitstream(chain, bitstream_filename)) { + if (fpga_generate_bitstream(chain, bitstream_filename, bitstream_ascii)) { report(LL_ERROR, "Bitstream generation failed."); return E_BITSTREAM; }