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No commits in common. "6fbdcf901650a917d0a2a6f6423e781eb45ed05f" and "f27c7284729ba3dc4c03d112314570a7f4ffca27" have entirely different histories.
6fbdcf9016
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f27c728472
@ -10,12 +10,12 @@ static int need_fix = 1;
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/* LUT Definitions (correct offset, no fix must be applied) */
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/* LUT Definitions (correct offset, no fix must be applied) */
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static int LUT4_BITMAP[16] = {
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static int LUT4_BITMAP[16] = {
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24, 25, 26, 27, 28, 29, 30, 31,
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16, 17, 18, 19, 20, 21, 22, 23,
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16, 17, 18, 19, 20, 21, 22, 23
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24, 25, 26, 27, 28, 29, 30, 31
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};
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};
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static int LUT3_BITMAP[2][8] = {
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static int LUT3_BITMAP[2][8] = {
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{24, 25, 26, 27, 28, 29, 30, 31},
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{16, 17, 18, 19, 20, 21, 22, 23},
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{16, 17, 18, 19, 20, 21, 22, 23}
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{24, 25, 26, 27, 28, 29, 30, 31}
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};
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};
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/* LUT Config Definitions */
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/* LUT Config Definitions */
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@ -61,13 +61,7 @@ static int ROUTE_BITMAP[8] = {
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static int BIT_LED_LUT_IN = 28;
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static int BIT_LED_LUT_IN = 28;
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static int BIT_LED_LUT_OUT_N = 29; /* Low-active */
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static int BIT_LED_LUT_OUT_N = 29; /* Low-active */
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static inline int fpga_cell_lut34_is_driven(char drive_sel)
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static int fpga_cell_lut34_lut_get_mux(int lut, char port) {
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{
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return (drive_sel != LUT_OUT_DC && drive_sel != LUT_OUT_Z);
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}
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static int fpga_cell_lut34_lut_get_mux(int lut, char port)
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{
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int i;
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int i;
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if (port == LUT_NET_DC)
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if (port == LUT_NET_DC)
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@ -80,8 +74,7 @@ static int fpga_cell_lut34_lut_get_mux(int lut, char port)
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return -1;
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return -1;
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}
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}
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static int fpga_cell_lut34_lut_get_out_mux(int lut_group, char *ports)
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static int fpga_cell_lut34_lut_get_out_mux(int lut_group, char *ports) {
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{
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int i;
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int i;
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int lut;
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int lut;
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@ -95,9 +88,11 @@ static int fpga_cell_lut34_lut_get_out_mux(int lut_group, char *ports)
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ports = ports + lut;
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ports = ports + lut;
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for (i = 0; i < 4; ++i) {
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for (i = 0; i < 4; ++i) {
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if (!fpga_cell_lut34_is_driven(ports[0]) ||
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if (ports[0] == LUT_OUT_DC ||
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ports[0] == LUT_OUT_Z ||
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ports[0] == LUT_OUT_MUX[lut][i]) {
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ports[0] == LUT_OUT_MUX[lut][i]) {
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if (!fpga_cell_lut34_is_driven(ports[1]) ||
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if (ports[1] == LUT_OUT_DC ||
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ports[1] == LUT_OUT_Z ||
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ports[1] == LUT_OUT_MUX[lut + 1][i])
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ports[1] == LUT_OUT_MUX[lut + 1][i])
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return i;
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return i;
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}
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}
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@ -237,11 +232,15 @@ char *fpga_cell_lut34_isp_generate_bitstream(struct fpga_cell *cell)
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"Couldn't set LUT output sel %d for output %d.", temp, i);
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"Couldn't set LUT output sel %d for output %d.", temp, i);
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}
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}
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for (i = 0; i < 4; ++i) {
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for (i = 0; i < 2; ++i) {
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temp = fpga_cell_lut34_is_driven(lut34->drive_sel[i]);
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temp = fpga_cell_bitstream_is_set(sbuf, LUT_OUT_BITMAP[i][0]); /* At some point, we set a specific output on this MUX */
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BS_SET_BIT(LUT_OUT_EN_N_BITMAP[i], !temp,
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BS_SET_BIT(LUT_OUT_EN_N_BITMAP[i], !temp,
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"Couldn't %s output for output %d.",
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"Couldn't %s output for output %d.",
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(!temp ? "enable" : "disabled"), i);
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(!temp ? "enable" : "disabled"), i);
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if (!temp) {
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BS_SET_BITS(0, 2 , LUT_OUT_BITMAP[i],
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"Couldn't set LUT output sel 0 for output %d (undriven by user logic).", i);
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}
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}
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}
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/* Routing */
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/* Routing */
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@ -281,10 +280,8 @@ char *fpga_cell_lut34_isp_generate_bitstream(struct fpga_cell *cell)
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report(LL_DEBUG, "Bitstream result for %p:", cell);
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report(LL_DEBUG, "Bitstream result for %p:", cell);
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for (i = 0; i < 48; ++i) {
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for (i = 0; i < 48; ++i) {
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report(LL_DEBUG,
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report(LL_DEBUG,
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" %d: %d%s",
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" %d: %d",
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i,
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i, fpga_cell_bitstream_is_set(buf, i));
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fpga_cell_bitstream_is_set(buf, i),
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(fpga_cell_bitstream_is_set(sbuf, i) ? "" : " (Z)"));
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}
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}
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free(sbuf);
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free(sbuf);
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