electronics/ttl-fpga
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compare: electronics:f27c7284729ba3dc4c03d112314570a7f4ffca27
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electronics:sw
electronics:rev02
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No commits in common. "6fbdcf901650a917d0a2a6f6423e781eb45ed05f" and "f27c7284729ba3dc4c03d112314570a7f4ffca27" have entirely different histories.
6fbdcf9016 ... f27c728472

1 changed files with 18 additions and 21 deletions
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39
sw/kousaten/src/fpga_cell_lut34.c
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@ -10,12 +10,12 @@ static int need_fix = 1;
/* LUT Definitions (correct offset, no fix must be applied) */
static int LUT4_BITMAP[16] = {
24, 25, 26, 27, 28, 29, 30, 31,
16, 17, 18, 19, 20, 21, 22, 23
16, 17, 18, 19, 20, 21, 22, 23,
24, 25, 26, 27, 28, 29, 30, 31
};
static int LUT3_BITMAP[2][8] = {
{24, 25, 26, 27, 28, 29, 30, 31},
{16, 17, 18, 19, 20, 21, 22, 23}
{16, 17, 18, 19, 20, 21, 22, 23},
{24, 25, 26, 27, 28, 29, 30, 31}
};
/* LUT Config Definitions */
@ -61,13 +61,7 @@ static int ROUTE_BITMAP[8] = {
static int BIT_LED_LUT_IN = 28;
static int BIT_LED_LUT_OUT_N = 29; /* Low-active */
static inline int fpga_cell_lut34_is_driven(char drive_sel)
{
return (drive_sel != LUT_OUT_DC && drive_sel != LUT_OUT_Z);
}
static int fpga_cell_lut34_lut_get_mux(int lut, char port)
{
static int fpga_cell_lut34_lut_get_mux(int lut, char port) {
int i;
if (port == LUT_NET_DC)
@ -80,8 +74,7 @@ static int fpga_cell_lut34_lut_get_mux(int lut, char port)
return -1;
}
static int fpga_cell_lut34_lut_get_out_mux(int lut_group, char *ports)
{
static int fpga_cell_lut34_lut_get_out_mux(int lut_group, char *ports) {
int i;
int lut;
@ -95,9 +88,11 @@ static int fpga_cell_lut34_lut_get_out_mux(int lut_group, char *ports)
ports = ports + lut;
for (i = 0; i < 4; ++i) {
if (!fpga_cell_lut34_is_driven(ports[0]) ||
if (ports[0] == LUT_OUT_DC ||
ports[0] == LUT_OUT_Z ||
ports[0] == LUT_OUT_MUX[lut][i]) {
if (!fpga_cell_lut34_is_driven(ports[1]) ||
if (ports[1] == LUT_OUT_DC ||
ports[1] == LUT_OUT_Z ||
ports[1] == LUT_OUT_MUX[lut + 1][i])
return i;
}
@ -237,11 +232,15 @@ char *fpga_cell_lut34_isp_generate_bitstream(struct fpga_cell *cell)
"Couldn't set LUT output sel %d for output %d.", temp, i);
}
for (i = 0; i < 4; ++i) {
temp = fpga_cell_lut34_is_driven(lut34->drive_sel[i]);
for (i = 0; i < 2; ++i) {
temp = fpga_cell_bitstream_is_set(sbuf, LUT_OUT_BITMAP[i][0]); /* At some point, we set a specific output on this MUX */
BS_SET_BIT(LUT_OUT_EN_N_BITMAP[i], !temp,
"Couldn't %s output for output %d.",
(!temp ? "enable" : "disabled"), i);
if (!temp) {
BS_SET_BITS(0, 2 , LUT_OUT_BITMAP[i],
"Couldn't set LUT output sel 0 for output %d (undriven by user logic).", i);
}
}
/* Routing */
@ -281,10 +280,8 @@ char *fpga_cell_lut34_isp_generate_bitstream(struct fpga_cell *cell)
report(LL_DEBUG, "Bitstream result for %p:", cell);
for (i = 0; i < 48; ++i) {
report(LL_DEBUG,
" %d: %d%s",
i,
fpga_cell_bitstream_is_set(buf, i),
(fpga_cell_bitstream_is_set(sbuf, i) ? "" : " (Z)"));
" %d: %d",
i, fpga_cell_bitstream_is_set(buf, i));
}
free(sbuf);