electronics/ttl-fpga
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Building an FPGA from 74-series logic ICs. For fun and education. https://l.notsyncing.net/ttlfpga
17 Commits 2 Branches 2 Tags 762 KiB
KiCad Layout 81.9%
KiCad Schematic 15.8%
C 2.3%
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Markus Koch 6b2fa97a6f Fix right and bottom bus connections 
Fixes #2.
2019-06-01 18:20:26 +02:00
.gitignore Add pdf and plt to gitignore 2019-05-31 21:59:20 +02:00
logic_block.sch Fix right and bottom bus connections 2019-06-01 18:20:26 +02:00
lutd.sch Annotate, and assign preliminary parts 2019-06-01 18:12:15 +02:00
README.MD Design first draft of core logic 2019-05-30 20:24:33 +02:00
sym-lib-table Fix LUT split enable logic 2019-05-30 21:12:52 +02:00
ttl-fpga-cache.lib Change gender of right and bottom connector 2019-05-31 22:19:01 +02:00
ttl-fpga-rescue.dcm Fix LUT split enable logic 2019-05-30 21:12:52 +02:00
ttl-fpga-rescue.lib Fix LUT split enable logic 2019-05-30 21:12:52 +02:00
ttl-fpga.pro Design first draft of core logic 2019-05-30 20:24:33 +02:00
ttl-fpga.sch Annotate, and assign preliminary parts 2019-06-01 18:12:15 +02:00

README.MD

DISCRETE TTL FPGA

WIP.