ttl-fpga/sw/kousaten
Markus Koch 7bb7049eea sw: Fix logic to determine when to enable the output drivers
Before, it was always enabling all outputs,
even when they should have been tristated.
2019-09-23 21:28:54 +02:00
..
fdef Add FDEF for single-cell FPGA 2019-06-21 21:17:32 +02:00
sample-project Add program.sh script 2019-06-22 17:47:20 +02:00
src sw: Fix logic to determine when to enable the output drivers 2019-09-23 21:28:54 +02:00
.gitignore Initialize CMakeProject for Kousaten 2019-06-16 17:11:20 +02:00
CMakeLists.txt Initialize CMakeProject for Kousaten 2019-06-16 17:11:20 +02:00
README.MD Initialize CMakeProject for Kousaten 2019-06-16 17:11:20 +02:00

README.MD

TTL-FPGA Compiler Kousaten

Tool to generate bitstreams for the TTL-FPGA after manual synthesis and PNR.