<?xml version="1.0" encoding="UTF-8"?>
<simPackage>
 <file path="ddr3_sim/ddr3/ddr3_pll0.vho" type="VHDL" library="pll0" />
 <file
   path="ddr3_sim/ddr3/ddr3_pll0_sim_delay.vhd"
   type="VHDL"
   library="pll0" />
 <file path="ddr3_sim/ddr3/ddr3_0002.vhd" type="VHDL" library="ddr3" />
 <file path="ddr3_sim/ddr3.vhd" type="VHDL" />
 <topLevel name="ddr3" />
 <deviceFamily name="cyclonev" />
 <modelMap controllerPath="ddr3" modelPath="ddr3" />
</simPackage>
