diff --git a/design/top.vhd b/design/top.vhd index 2ec68f3..b259048 100644 --- a/design/top.vhd +++ b/design/top.vhd @@ -59,12 +59,12 @@ architecture RTL of top is -- WB config constant masters : natural := 3; - constant slaves : natural := 4; + constant slaves : natural := 5; constant INTERCON_ID_SRAM : natural := 0; constant INTERCON_ID_DDR3 : natural := 1; constant INTERCON_ID_FLASH : natural := 2; constant INTERCON_ID_GPIO : natural := 3; - -- constant INTERCON_ID_UART : natural := 3; + constant INTERCON_ID_UART : natural := 4; -- constant INTERCON_ID_NS16550 : natural := 4; constant in_simulation : boolean := false @@ -333,6 +333,21 @@ begin gpio => GPIOA ); + -- UART + uart_wb_inst : entity work.uart_wb + generic map( + portcount => 1 + ) + port map( + clk => clk, + rst => rst, + slave_i => intercon_slave_i(INTERCON_ID_UART), + slave_o => intercon_slave_o(INTERCON_ID_UART), + irq_o => open, -- TODO + rx(0) => uart_rx, + tx(0) => uart_tx + ); + -- Intercon crossbar_inst : entity ip.crossbar generic map( @@ -351,13 +366,15 @@ begin INTERCON_ID_SRAM => x"00000000", INTERCON_ID_DDR3 => x"10000000", INTERCON_ID_FLASH => x"40000000", - INTERCON_ID_GPIO => x"80000000" + INTERCON_ID_GPIO => x"80000000", + INTERCON_ID_UART => x"80000100" ), mask => ( INTERCON_ID_SRAM => x"ffff0000", INTERCON_ID_DDR3 => x"f0000000", INTERCON_ID_FLASH => x"f0000000", - INTERCON_ID_GPIO => x"fffffffc" + INTERCON_ID_GPIO => x"fffffff0", + INTERCON_ID_UART => x"ffffffc0" ) ); end architecture RTL;