diff --git a/design/top.vhd b/design/top.vhd index fed183f..e472806 100644 --- a/design/top.vhd +++ b/design/top.vhd @@ -306,16 +306,18 @@ begin ) port map( clk => clk, - rst => rst, + rst => rst, slave_i => intercon_master_o, slave_o => intercon_master_i, master_i => intercon_slave_o, master_o => intercon_slave_i, - address => (0 => x"00000000", -- SRAM - 1 => x"80000000" + address => ( + INTERCON_ID_SRAM => x"00000000", + INTERCON_ID_DDR3 => x"80000000" ), - mask => (0 => x"ffff0000", - 1 => x"f0000000" + mask => ( + INTERCON_ID_SRAM => x"ffff0000", + INTERCON_ID_DDR3 => x"f0000000" ) ); end architecture RTL;