flashrom: Transmitted one clock cycle too long -> buffer shifted

cores/flashrom-wb/flashrom_spi.vhd

@@ -87,14 +87,20 @@ begin
 							bitCounter       <= 0;
 							bitCounterIn     <= 0;
 							data_in_length_i <= 0;
-							pseudoEdge  <= true;
+							pseudoEdge       <= true;
 						end if;
 						ckDiv <= 0;
 					when TX =>
 						if ckDiv = clk_divider - 2 or pseudoEdge then
+							ckDiv <= 0;
 							if not pseudoEdge then
 								spi_sck <= not spi_sck;
 							end if;
+							if spi_sck = '0' and bitCounter = data_in_length_i and data_in_valid = '0' then
+								-- Prevent last clock cycle (make it a "passive" one)
+								spi_sck    <= '0';
+								pseudoEdge <= true;
+							end if;
 							if spi_sck = '1' or pseudoEdge then -- falling edge -> provide data
 								if bitCounter = data_in_length_i then
 									bitCounter <= 0;