diff --git a/trashernet/synchronizer.vhd b/trashernet/synchronizer.vhd index f29901f..4408936 100644 --- a/trashernet/synchronizer.vhd +++ b/trashernet/synchronizer.vhd @@ -3,6 +3,9 @@ use ieee.std_logic_1164.all; use ieee.numeric_std.all; entity synchronizer is + generic( + SIZE : integer := 3 + ); port( clk : in std_logic; rst : in std_logic; @@ -12,7 +15,7 @@ entity synchronizer is end entity synchronizer; architecture RTL of synchronizer is - signal sr : std_logic_vector(2 downto 0); + signal sr : std_logic_vector(SIZE - 1 downto 0); begin sync : process(clk, rst) is begin