diff --git a/trashernet/trashernet_phy.vhd b/trashernet/trashernet_phy.vhd index 9c164e3..597458c 100644 --- a/trashernet/trashernet_phy.vhd +++ b/trashernet/trashernet_phy.vhd @@ -297,8 +297,11 @@ begin -- ------------------------------------------------------------------------- transmitter : block - constant TX_STB_CNT_MAX : integer := integer(round(real(F_CLK) / real((F_ETH * 2)))) - 1; - signal tx_stb_cnt : integer range 0 to TX_STB_CNT_MAX; + constant TX_STB_CNT_IDEAL : real := real(F_CLK) / real((F_ETH * 2)); + constant TX_STB_SKIP_ERROR : real := abs (round(TX_STB_CNT_IDEAL) - TX_STB_CNT_IDEAL); + constant TX_STB_CNT_MAX : integer := integer(round(TX_STB_CNT_IDEAL + 0.25)) - 1; -- Round up starting for error > 0.25 + constant TX_STB_SKIP_SECOND : boolean := TX_STB_SKIP_ERROR >= 0.25; -- Skip one clock cycle every other symbol to hit clock rate in between when the divider is close to x.5 + signal tx_stb_cnt : integer range 0 to TX_STB_CNT_MAX; type tx_state_t is (IDLE, NLP, TX, IPG); signal tx_state : tx_state_t; @@ -368,6 +371,9 @@ begin if tx_stb_cnt = 0 then tx_stb_cnt <= TX_STB_CNT_MAX; + if TX_STB_SKIP_SECOND and bit_stage = '1' then + tx_stb_cnt <= TX_STB_CNT_MAX - 1; + end if; else tx_stb_cnt <= tx_stb_cnt - 1; end if;