fpga/ws2812b-vhdl
1
0
Fork 0
mirror of https://github.com/cclassic/ws2812b-vhdl synced 2024-11-24 09:15:05 +01:00
Code Issues Releases Wiki Activity

Bugfix and cleanup in demo rainbow

Browse Source
This commit is contained in:
Markus Koch 2016-10-16 14:41:20 +02:00
parent 21d75d5d2f
commit afef8ef269
1 changed files with 11 additions and 13 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

22
design/demo_rainbow.vhd
View File

@ -149,24 +149,22 @@ begin
end procedure;
begin
if rst = '1' then
pixData_red <= to_unsigned(PIXDATA_MAX, pixData_red'length);
pixData_green <= (others => '0');
pixData_blue <= (others => '0');
pixData_red_start <= to_unsigned(PIXDATA_MAX, pixData_red'length);
pixData_green_start <= (others => '0');
pixData_blue_start <= (others => '0');
--pixData_valid <= '0';
color_transition_live <= RY;
pixCount <= 0;
render_active <= '0';
pixData_red <= to_unsigned(PIXDATA_MAX, pixData_red'length);
pixData_green <= (others => '0');
pixData_blue <= (others => '0');
pixData_red_start <= to_unsigned(PIXDATA_MAX, pixData_red'length);
pixData_green_start <= (others => '0');
pixData_blue_start <= (others => '0');
color_transition_live <= RY;
color_transition_start <= RY;
pixCount <= 0;
render_active <= '0';
elsif rising_edge(clk) then
-- Render one strip
if render_active = '1' then
if pixData_next = '1' then
--pixData_valid <= '1';
if pixCount = LENGTH - 1 then
pixCount <= 0;
--pixData_valid <= '0'; -- Insert inter-strip delay
render_active <= '0';
else
pixCount <= pixCount + 1;