Add preliminary PCB outlines
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156
kicad/aux.kicad_pcb
Normal file
156
kicad/aux.kicad_pcb
Normal file
@ -0,0 +1,156 @@
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(kicad_pcb (version 20171130) (host pcbnew 5.1.9)
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||||
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||||
(general
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||||
(thickness 1.6)
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||||
(drawings 50)
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||||
(tracks 0)
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||||
(zones 0)
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||||
(modules 0)
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||||
(nets 1)
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||||
)
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||||
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||||
(page A4)
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||||
(layers
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||||
(0 F.Cu signal)
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||||
(31 B.Cu signal)
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||||
(32 B.Adhes user)
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||||
(33 F.Adhes user)
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||||
(34 B.Paste user)
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(35 F.Paste user)
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(36 B.SilkS user)
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(37 F.SilkS user)
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(38 B.Mask user)
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(39 F.Mask user)
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(40 Dwgs.User user)
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(41 Cmts.User user)
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||||
(42 Eco1.User user)
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(43 Eco2.User user)
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(44 Edge.Cuts user)
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(45 Margin user)
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(46 B.CrtYd user)
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(47 F.CrtYd user)
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(48 B.Fab user)
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(49 F.Fab user)
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)
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||||
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(setup
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(last_trace_width 0.25)
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(trace_clearance 0.2)
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||||
(zone_clearance 0.508)
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(zone_45_only no)
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||||
(trace_min 0.2)
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(via_size 0.8)
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(via_drill 0.4)
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(via_min_size 0.4)
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(via_min_drill 0.3)
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(uvia_size 0.3)
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(uvia_drill 0.1)
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(uvias_allowed no)
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(uvia_min_size 0.2)
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(uvia_min_drill 0.1)
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(edge_width 0.1)
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(segment_width 0.2)
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(pcb_text_width 0.3)
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(pcb_text_size 1.5 1.5)
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(mod_edge_width 0.15)
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(mod_text_size 1 1)
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(mod_text_width 0.15)
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(pad_size 1.524 1.524)
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(pad_drill 0.762)
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(pad_to_mask_clearance 0)
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(aux_axis_origin 0 0)
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(pcbplotparams
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(usegerberextensions false)
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(usegerberattributes true)
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(usegerberadvancedattributes true)
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(creategerberjobfile true)
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(excludeedgelayer true)
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(linewidth 0.100000)
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(plotframeref false)
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(viasonmask false)
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(mode 1)
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(useauxorigin false)
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(hpglpennumber 1)
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(hpglpenspeed 20)
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(hpglpendiameter 15.000000)
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(psnegative false)
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(psa4output false)
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(plotreference true)
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(plotvalue true)
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(plotinvisibletext false)
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(padsonsilk false)
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(subtractmaskfromsilk false)
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(drillshape 1)
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(scaleselection 1)
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(outputdirectory ""))
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)
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(net 0 "")
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|
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(net_class Default "This is the default net class."
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(clearance 0.2)
|
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(trace_width 0.25)
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(via_dia 0.8)
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(via_drill 0.4)
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(uvia_dia 0.3)
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(uvia_drill 0.1)
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)
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)
|
158
kicad/power.kicad_pcb
Normal file
158
kicad/power.kicad_pcb
Normal file
@ -0,0 +1,158 @@
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||||
(kicad_pcb (version 20171130) (host pcbnew 5.1.9)
|
||||
|
||||
(general
|
||||
(thickness 1.6)
|
||||
(drawings 52)
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||||
(tracks 0)
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||||
(zones 0)
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||||
(modules 0)
|
||||
(nets 1)
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||||
)
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||||
|
||||
(page A4)
|
||||
(layers
|
||||
(0 F.Cu signal)
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||||
(31 B.Cu signal)
|
||||
(32 B.Adhes user)
|
||||
(33 F.Adhes user)
|
||||
(34 B.Paste user)
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||||
(35 F.Paste user)
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||||
(36 B.SilkS user)
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||||
(37 F.SilkS user)
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||||
(38 B.Mask user)
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||||
(39 F.Mask user)
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||||
(40 Dwgs.User user)
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||||
(41 Cmts.User user)
|
||||
(42 Eco1.User user)
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||||
(43 Eco2.User user)
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||||
(44 Edge.Cuts user)
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||||
(45 Margin user)
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||||
(46 B.CrtYd user)
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||||
(47 F.CrtYd user)
|
||||
(48 B.Fab user)
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||||
(49 F.Fab user)
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||||
)
|
||||
|
||||
(setup
|
||||
(last_trace_width 0.25)
|
||||
(trace_clearance 0.2)
|
||||
(zone_clearance 0.508)
|
||||
(zone_45_only no)
|
||||
(trace_min 0.2)
|
||||
(via_size 0.8)
|
||||
(via_drill 0.4)
|
||||
(via_min_size 0.4)
|
||||
(via_min_drill 0.3)
|
||||
(uvia_size 0.3)
|
||||
(uvia_drill 0.1)
|
||||
(uvias_allowed no)
|
||||
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|
||||
(uvia_min_drill 0.1)
|
||||
(edge_width 0.1)
|
||||
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||||
(pcb_text_width 0.3)
|
||||
(pcb_text_size 1.5 1.5)
|
||||
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||||
(mod_text_size 1 1)
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||||
(mod_text_width 0.15)
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||||
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||||
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||||
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|
||||
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|
||||
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|
||||
(pcbplotparams
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
(outputformat 1)
|
||||
(mirror false)
|
||||
(drillshape 1)
|
||||
(scaleselection 1)
|
||||
(outputdirectory ""))
|
||||
)
|
||||
|
||||
(net 0 "")
|
||||
|
||||
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|
||||
(clearance 0.2)
|
||||
(trace_width 0.25)
|
||||
(via_dia 0.8)
|
||||
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|
||||
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|
||||
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||||
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(gr_line (start 144.8 98.8) (end 143.2 98.8) (layer Edge.Cuts) (width 0.1) (tstamp 60449E7F))
|
||||
(gr_line (start 143.2 93.8) (end 144.8 93.8) (layer Edge.Cuts) (width 0.1) (tstamp 60449E7E))
|
||||
(gr_line (start 143.2 88.8) (end 144.8 88.8) (layer Edge.Cuts) (width 0.1) (tstamp 60449E7D))
|
||||
(gr_line (start 144.8 93.8) (end 144.8 98.8) (layer Edge.Cuts) (width 0.1) (tstamp 60449E7C))
|
||||
(gr_line (start 158.2 112.2) (end 158.2 113.8) (layer Edge.Cuts) (width 0.1) (tstamp 60449E77))
|
||||
(gr_text power-out (at 157 98) (layer F.SilkS) (tstamp 60449E76)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(gr_line (start 153.2 112.2) (end 158.2 112.2) (layer Edge.Cuts) (width 0.1) (tstamp 60449E75))
|
||||
(gr_line (start 168.2 113.8) (end 171.6 113.8) (layer Edge.Cuts) (width 0.1) (tstamp 60449E73))
|
||||
(gr_line (start 153.2 113.8) (end 153.2 112.2) (layer Edge.Cuts) (width 0.1) (tstamp 60449E72))
|
||||
(gr_line (start 148.2 113.8) (end 153.2 113.8) (layer Edge.Cuts) (width 0.1) (tstamp 60449E71))
|
||||
|
||||
)
|
Loading…
Reference in New Issue
Block a user