79 lines
1.6 KiB
Plaintext
79 lines
1.6 KiB
Plaintext
EESchema Schematic File Version 4
|
|
EELAYER 30 0
|
|
EELAYER END
|
|
$Descr A4 11693 8268
|
|
encoding utf-8
|
|
Sheet 1 4
|
|
Title ""
|
|
Date "2020-10-03"
|
|
Rev "01"
|
|
Comp "Macrocell"
|
|
Comment1 "#followtheling"
|
|
Comment2 ""
|
|
Comment3 ""
|
|
Comment4 "Schematic overview"
|
|
$EndDescr
|
|
$Sheet
|
|
S 650 650 1400 1100
|
|
U 5F7CBB94
|
|
F0 "power" 50
|
|
F1 "power.sch" 50
|
|
$EndSheet
|
|
$Sheet
|
|
S 2250 650 1400 1400
|
|
U 5F7D680C
|
|
F0 "cpu" 50
|
|
F1 "cpu.sch" 50
|
|
F2 "DMX_RO" I R 3650 800 50
|
|
F3 "DMX_RE" O R 3650 900 50
|
|
F4 "DMX_DI" O R 3650 1000 50
|
|
F5 "DMX_DE" O R 3650 1100 50
|
|
F6 "WS0_TX" O R 3650 1250 50
|
|
F7 "WS1_TX" O R 3650 1450 50
|
|
F8 "WS0_RX" I R 3650 1350 50
|
|
F9 "CONTROL_UART_IN" I R 3650 1800 50
|
|
F10 "CONTROL_UART_OUT" O R 3650 1700 50
|
|
F11 "WS1_RX" I R 3650 1550 50
|
|
F12 "CONTROL_UART_RST" I R 3650 1900 50
|
|
$EndSheet
|
|
$Sheet
|
|
S 3850 650 1250 1400
|
|
U 5F8467A7
|
|
F0 "io" 50
|
|
F1 "io.sch" 50
|
|
F2 "DMX_RO" O L 3850 800 50
|
|
F3 "DMX_RE" I L 3850 900 50
|
|
F4 "DMX_DI" I L 3850 1000 50
|
|
F5 "DMX_DE" I L 3850 1100 50
|
|
F6 "WS0_TX" I L 3850 1250 50
|
|
F7 "WS1_RX" O L 3850 1550 50
|
|
F8 "WS1_TX" I L 3850 1450 50
|
|
F9 "WS0_RX" O L 3850 1350 50
|
|
F10 "USB_UART_IN" O L 3850 1800 50
|
|
F11 "USB_UART_OUT" I L 3850 1700 50
|
|
F12 "USB_UART_DTR" O L 3850 1900 50
|
|
$EndSheet
|
|
Wire Wire Line
|
|
3650 800 3850 800
|
|
Wire Wire Line
|
|
3650 900 3850 900
|
|
Wire Wire Line
|
|
3650 1000 3850 1000
|
|
Wire Wire Line
|
|
3650 1100 3850 1100
|
|
Wire Wire Line
|
|
3650 1250 3850 1250
|
|
Wire Wire Line
|
|
3650 1350 3850 1350
|
|
Wire Wire Line
|
|
3650 1450 3850 1450
|
|
Wire Wire Line
|
|
3650 1550 3850 1550
|
|
Wire Wire Line
|
|
3650 1700 3850 1700
|
|
Wire Wire Line
|
|
3650 1800 3850 1800
|
|
Wire Wire Line
|
|
3650 1900 3850 1900
|
|
$EndSCHEMATC
|