sabik-cpu/firmware/adc.c

160 lines
5.5 KiB
C

#include "adc.h"
#include <stm32f4xx_adc.h>
#include <stm32f4xx_rcc.h>
#include <stm32f4xx_dma.h>
#include <stdio.h>
#include "systems.h"
#include <stm32f4xx.h>
volatile uint16_t adc_buffer[2] = {0,};
void adc_init()
{
ADC_CommonInitTypeDef ADC_CommonInitStruct;
ADC_InitTypeDef ADC_InitStructure;
GPIO_InitTypeDef GPIO_InitStruct;
printf("ADC init\r\n");
// Enable Clocks
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE);
RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM5, ENABLE);
RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_DMA1, ENABLE);
// Set up GPIO
GPIO_InitStruct.GPIO_Pin = GPIO_Pin_4 | GPIO_Pin_5;
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AN;
GPIO_Init(GPIOA, &GPIO_InitStruct);
// Set up timer
TIM_TimeBaseInitTypeDef Timer_InitStruct;
TIM_TimeBaseStructInit(&Timer_InitStruct);
Timer_InitStruct.TIM_Prescaler = 0;
Timer_InitStruct.TIM_CounterMode = TIM_CounterMode_Up;
Timer_InitStruct.TIM_Period = (ADC_F_TIM / ADC_SAMPLE_RATE);
Timer_InitStruct.TIM_ClockDivision = TIM_CKD_DIV1;
Timer_InitStruct.TIM_RepetitionCounter = 0;
TIM_TimeBaseInit(TIM5, &Timer_InitStruct);
TIM_Cmd(TIM5, ENABLE);
TIM_OCInitTypeDef TIM_OCInitStructure;
TIM_OCStructInit (&TIM_OCInitStructure);
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
TIM_OCInitStructure.TIM_OCIdleState = TIM_OCNIdleState_Reset;
TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_Active;
TIM_OC1Init (TIM5, &TIM_OCInitStructure);
TIM_SetCompare1(TIM5, 0xFFFF);
TIM_ITConfig(TIM5, TIM_IT_CC1, ENABLE);
TIM_CCxCmd(TIM5, TIM_Channel_1, TIM_CCx_Enable);
TIM_CCxNCmd(TIM5, TIM_Channel_1, TIM_CCx_Enable);
NVIC_InitTypeDef NVIC_InitStruct;
NVIC_InitStruct.NVIC_IRQChannel = TIM5_IRQn;
NVIC_InitStruct.NVIC_IRQChannelPreemptionPriority = 0x00;
NVIC_InitStruct.NVIC_IRQChannelSubPriority = 0x00;
NVIC_InitStruct.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStruct);
// Set up DMA
DMA_InitTypeDef DMA_InitStruct;
DMA_StructInit(&DMA_InitStruct);
DMA_DeInit(ADC_RX_DMA_STREAM);
DMA_InitStruct.DMA_Channel = ADC_RX_DMA_CHANNEL;
DMA_InitStruct.DMA_PeripheralBaseAddr = (uint32_t) & (ADC1->DR);
DMA_InitStruct.DMA_Memory0BaseAddr = (uint32_t)adc_buffer;
DMA_InitStruct.DMA_DIR = DMA_DIR_PeripheralToMemory;
DMA_InitStruct.DMA_BufferSize = 2;
DMA_InitStruct.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStruct.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStruct.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
DMA_InitStruct.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
DMA_InitStruct.DMA_Mode = DMA_Mode_Circular;
DMA_InitStruct.DMA_Priority = DMA_Priority_High;
DMA_InitStruct.DMA_FIFOMode = DMA_FIFOMode_Disable;
DMA_InitStruct.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull;
DMA_InitStruct.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_InitStruct.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(ADC_RX_DMA_STREAM, &DMA_InitStruct);
DMA_ITConfig(ADC_RX_DMA_STREAM, DMA_IT_TC, ENABLE);
NVIC_InitStruct.NVIC_IRQChannel = ADC_RX_DMA_IRQn;
NVIC_InitStruct.NVIC_IRQChannelPreemptionPriority = 0x00;
NVIC_InitStruct.NVIC_IRQChannelSubPriority = 0x00;
NVIC_InitStruct.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStruct);
DMA_Cmd(ADC_RX_DMA_STREAM, ENABLE);
// Set up ADC
ADC_DeInit();
ADC_CommonStructInit(&ADC_CommonInitStruct);
ADC_CommonInitStruct.ADC_Mode = ADC_Mode_Independent;
ADC_CommonInitStruct.ADC_Prescaler = ADC_Prescaler_Div8;
ADC_CommonInitStruct.ADC_DMAAccessMode = ADC_DMAAccessMode_Disabled;
ADC_CommonInitStruct.ADC_TwoSamplingDelay = ADC_TwoSamplingDelay_20Cycles;
ADC_CommonInit(&ADC_CommonInitStruct);
ADC_StructInit(&ADC_InitStructure);
ADC_InitStructure.ADC_Resolution = ADC_Resolution_12b;
ADC_InitStructure.ADC_ScanConvMode = ENABLE;
ADC_InitStructure.ADC_ContinuousConvMode = DISABLE;
ADC_InitStructure.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_None; // TODO: trig via event
ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_T5_CC1;
ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right;
ADC_InitStructure.ADC_NbrOfConversion = 2;
ADC_Init(ADC1, &ADC_InitStructure);
ADC_ITConfig(ADC1, ADC_IT_EOC, ENABLE);
NVIC_InitStruct.NVIC_IRQChannel = ADC_IRQn;
NVIC_InitStruct.NVIC_IRQChannelPreemptionPriority = 0x00;
NVIC_InitStruct.NVIC_IRQChannelSubPriority = 0x00;
NVIC_InitStruct.NVIC_IRQChannelCmd = DISABLE; // !
NVIC_Init(&NVIC_InitStruct);
ADC_DMARequestAfterLastTransferCmd(ADC1, ENABLE);
ADC_EOCOnEachRegularChannelCmd(ADC1, DISABLE);
ADC_RegularChannelConfig(ADC1, ADC_Channel_5, 1, ADC_SampleTime_28Cycles);
ADC_RegularChannelConfig(ADC1, ADC_Channel_4, 2, ADC_SampleTime_28Cycles);
// Turn it all on
ADC_Cmd(ADC1, ENABLE);
ADC_DMACmd(ADC1, ENABLE);
printf("adc init done.\r\n");
printf("ADC CR1: %08x, CR2: %08x\r\n", ADC1->CR1, ADC1->CR2);
printf("ADC SQR1: %08x, SQR3: %08x\r\n", ADC1->SQR1, ADC1->SQR3);
printf("DMA2 S0CR: %08x\r\n", ADC_RX_DMA_STREAM->CR);
printf("ADC init complete.\r\n");
}
void DMA2_Stream0_IRQHandler()
{
int sample;
DMA_ClearFlag(ADC_RX_DMA_STREAM, DMA_FLAG_TCIF0);
//printf("[DMA-IRQ] %d, %d\r\n", adc_buffer[0], adc_buffer[1]);
sample = 2048 - ((adc_buffer[0] + adc_buffer[1]) / 2);
GotSample(sample);
}
// Not used:
void ADC_IRQHandler()
{
ADC_ClearFlag(ADC1, ADC_FLAG_EOC);
//printf("[ADC-IRQ] %d, %d\r\n", adc_buffer[0], adc_buffer[1]);
}
void TIM5_IRQHandler()
{
TIM_ClearFlag(TIM5, TIM_FLAG_CC1);
// I would really like to this in HW via events, but somehow it's broken...
ADC_SoftwareStartConv(ADC1);
}