tiny-xo2/tiny-xo2.kicad_pcb

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2017-09-29 22:56:25 +02:00
(kicad_pcb (version 20170922) (host pcbnew "(2017-09-28 revision 6006b54dd)-master")
(general
(thickness 1.6)
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(drawings 37)
(tracks 411)
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(zones 0)
(modules 37)
(nets 48)
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)
(page A4)
(layers
(0 F.Cu signal)
(31 B.Cu signal)
(32 B.Adhes user)
(33 F.Adhes user)
(34 B.Paste user)
(35 F.Paste user)
(36 B.SilkS user)
(37 F.SilkS user)
(38 B.Mask user)
(39 F.Mask user)
(40 Dwgs.User user)
(41 Cmts.User user)
(42 Eco1.User user)
(43 Eco2.User user)
(44 Edge.Cuts user)
(45 Margin user)
(46 B.CrtYd user hide)
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(47 F.CrtYd user)
(48 B.Fab user hide)
(49 F.Fab user hide)
)
(setup
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(last_trace_width 0.25)
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(user_trace_width 0.15)
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(user_trace_width 0.4)
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(trace_clearance 0.15)
(zone_clearance 0.2)
(zone_45_only yes)
(trace_min 0.15)
(segment_width 0.2)
(edge_width 0.15)
(via_size 0.45)
(via_drill 0.3)
(via_min_size 0.45)
(via_min_drill 0.3)
(user_via 0.45 0.3)
(user_via 0.55 0.4)
(uvia_size 0.3)
(uvia_drill 0.1)
(uvias_allowed no)
(uvia_min_size 0.2)
(uvia_min_drill 0.1)
(pcb_text_width 0.3)
(pcb_text_size 1.5 1.5)
(mod_edge_width 0.15)
(mod_text_size 1 1)
(mod_text_width 0.15)
(pad_size 1.524 1.524)
(pad_drill 0.762)
(pad_to_mask_clearance 0.2)
(aux_axis_origin 0 0)
(visible_elements FFFFFF7F)
(pcbplotparams
(layerselection 0x010fc_ffffffff)
(usegerberextensions true)
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(usegerberattributes true)
(usegerberadvancedattributes true)
(creategerberjobfile true)
(excludeedgelayer true)
(linewidth 0.100000)
(plotframeref false)
(viasonmask false)
(mode 1)
(useauxorigin false)
(hpglpennumber 1)
(hpglpenspeed 20)
(hpglpendiameter 15)
(psnegative false)
(psa4output false)
(plotreference true)
(plotvalue true)
(plotinvisibletext false)
(padsonsilk false)
(subtractmaskfromsilk true)
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(outputformat 1)
(mirror false)
(drillshape 0)
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(scaleselection 1)
(outputdirectory gerber/))
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)
(net 0 "")
(net 1 /fpga/TX)
(net 2 /fpga/RX)
(net 3 /fpga/RS)
(net 4 GND)
(net 5 VBUS)
(net 6 /fpga/VCCIO23)
(net 7 +3V3)
(net 8 /fpga/JTAG_TDI)
(net 9 /fpga/JTAG_TCK)
(net 10 /fpga/JTAG_TMS)
(net 11 /fpga/JTAG_EN)
(net 12 /fpga/JTAG_TDO)
(net 13 /usbserial/DTR)
(net 14 "Net-(U3-Pad8)")
(net 15 /usbserial/USB-)
(net 16 /usbserial/USB+)
(net 17 /fpga/P27)
(net 18 /fpga/P25)
(net 19 /fpga/P16)
(net 20 /fpga/P14)
(net 21 /fpga/P13)
(net 22 /fpga/P12)
(net 23 /fpga/P11)
(net 24 /fpga/P10)
(net 25 /fpga/P9)
(net 26 /fpga/P8)
(net 27 /fpga/P5)
(net 28 /fpga/P4)
(net 29 /fpga/P17)
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(net 30 "Net-(D1-Pad2)")
(net 31 /fpga/TXD)
(net 32 /fpga/RXD)
(net 33 /fpga/CLK_FPGA)
(net 34 /fpga/CLK_USBSER)
(net 35 "Net-(U4-Pad1)")
(net 36 "Net-(U3-Pad15)")
(net 37 "Net-(U3-Pad14)")
(net 38 "Net-(U3-Pad12)")
(net 39 "Net-(U3-Pad11)")
(net 40 "Net-(U3-Pad10)")
(net 41 "Net-(U3-Pad9)")
(net 42 /usbserial/VU)
(net 43 "Net-(D3-Pad1)")
(net 44 "Net-(D4-Pad1)")
(net 45 "Net-(J1-Pad4)")
(net 46 "Net-(J2-Pad6)")
(net 47 "Net-(R2-Pad2)")
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(net_class Default "This is the default net class."
(clearance 0.15)
(trace_width 0.25)
(via_dia 0.45)
(via_drill 0.3)
(uvia_dia 0.3)
(uvia_drill 0.1)
(add_net /fpga/CLK_FPGA)
(add_net /fpga/CLK_USBSER)
(add_net /fpga/JTAG_EN)
(add_net /fpga/JTAG_TCK)
(add_net /fpga/JTAG_TDI)
(add_net /fpga/JTAG_TDO)
(add_net /fpga/JTAG_TMS)
(add_net /fpga/P10)
(add_net /fpga/P11)
(add_net /fpga/P12)
(add_net /fpga/P13)
(add_net /fpga/P14)
(add_net /fpga/P16)
(add_net /fpga/P17)
(add_net /fpga/P25)
(add_net /fpga/P27)
(add_net /fpga/P4)
(add_net /fpga/P5)
(add_net /fpga/P8)
(add_net /fpga/P9)
(add_net /fpga/RS)
(add_net /fpga/RX)
(add_net /fpga/RXD)
(add_net /fpga/TX)
(add_net /fpga/TXD)
(add_net /usbserial/DTR)
(add_net /usbserial/USB+)
(add_net /usbserial/USB-)
(add_net GND)
(add_net "Net-(D1-Pad2)")
(add_net "Net-(D3-Pad1)")
(add_net "Net-(D4-Pad1)")
(add_net "Net-(J1-Pad4)")
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(add_net "Net-(J2-Pad6)")
(add_net "Net-(R2-Pad2)")
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(add_net "Net-(U3-Pad10)")
(add_net "Net-(U3-Pad11)")
(add_net "Net-(U3-Pad12)")
(add_net "Net-(U3-Pad14)")
(add_net "Net-(U3-Pad15)")
(add_net "Net-(U3-Pad8)")
(add_net "Net-(U3-Pad9)")
(add_net "Net-(U4-Pad1)")
)
(net_class power ""
(clearance 0.15)
(trace_width 0.4)
(via_dia 0.55)
(via_drill 0.4)
(uvia_dia 0.3)
(uvia_drill 0.1)
(add_net +3V3)
(add_net /fpga/VCCIO23)
(add_net /usbserial/VU)
(add_net VBUS)
)
(module Symbols:OSHW-Logo2_7.3x6mm_SilkScreen (layer F.Cu) (tedit 0) (tstamp 5A32F57D)
2017-10-01 11:42:30 +02:00
(at 117.221 98.0567)
2017-09-29 22:56:25 +02:00
(descr "Open Source Hardware Symbol")
(tags "Logo Symbol OSHW")
(attr virtual)
(fp_text reference REF*** (at 0 0) (layer F.SilkS) hide
(effects (font (size 1 1) (thickness 0.15)))
)
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(xy -1.72304 -0.032048) (xy -1.765666 -0.043863) (xy -1.825855 -0.057819) (xy -1.898078 -0.072578)
(xy -1.9304 -0.078645) (xy -2.012478 -0.093727) (xy -2.091205 -0.108331) (xy -2.158891 -0.12102)
(xy -2.20784 -0.130358) (xy -2.217057 -0.132161) (xy -2.293257 -0.147201) (xy -2.293257 -0.464508)
(xy -2.293086 -0.568846) (xy -2.292384 -0.647787) (xy -2.290866 -0.704962) (xy -2.288251 -0.744001)
(xy -2.284254 -0.768535) (xy -2.278591 -0.782195) (xy -2.27098 -0.788611) (xy -2.267857 -0.789801)
(xy -2.249022 -0.79402) (xy -2.207412 -0.802438) (xy -2.14837 -0.814039) (xy -2.077243 -0.827805)
(xy -1.999375 -0.84272) (xy -1.920113 -0.857768) (xy -1.844802 -0.871931) (xy -1.778787 -0.884194)
(xy -1.727413 -0.893539) (xy -1.696025 -0.89895) (xy -1.689041 -0.899886) (xy -1.682715 -0.912404)
(xy -1.66871 -0.945754) (xy -1.649645 -0.993623) (xy -1.642366 -1.012371) (xy -1.613004 -1.084805)
(xy -1.578429 -1.16483) (xy -1.547463 -1.232272) (xy -1.524677 -1.283841) (xy -1.509518 -1.326215)
(xy -1.504458 -1.352166) (xy -1.505264 -1.355644) (xy -1.515959 -1.372064) (xy -1.54038 -1.408583)
(xy -1.575905 -1.461313) (xy -1.619913 -1.526365) (xy -1.669783 -1.599849) (xy -1.679644 -1.614355)
(xy -1.737508 -1.700296) (xy -1.780044 -1.765739) (xy -1.808946 -1.813696) (xy -1.82591 -1.84718)
(xy -1.832633 -1.869205) (xy -1.83081 -1.882783) (xy -1.830764 -1.882869) (xy -1.816414 -1.900703)
(xy -1.784677 -1.935183) (xy -1.73899 -1.982732) (xy -1.682796 -2.039778) (xy -1.619532 -2.102745)
(xy -1.612398 -2.109773) (xy -1.53267 -2.18698) (xy -1.471143 -2.24367) (xy -1.426579 -2.28089)
(xy -1.397743 -2.299685) (xy -1.385042 -2.302111) (xy -1.366506 -2.291529) (xy -1.328039 -2.267084)
(xy -1.273614 -2.231388) (xy -1.207202 -2.187053) (xy -1.132775 -2.136689) (xy -1.115399 -2.12484)
(xy -0.868703 -1.956374) (xy -0.757294 -2.006938) (xy -0.689543 -2.036405) (xy -0.616817 -2.066041)
(xy -0.554297 -2.08967) (xy -0.551543 -2.090642) (xy -0.50264 -2.108543) (xy -0.464943 -2.12368)
(xy -0.446575 -2.13279) (xy -0.446544 -2.132816) (xy -0.440715 -2.149283) (xy -0.430808 -2.189781)
(xy -0.417805 -2.249758) (xy -0.402691 -2.32466) (xy -0.386448 -2.409936) (xy -0.385119 -2.417125)
(xy -0.368825 -2.504986) (xy -0.353867 -2.58474) (xy -0.341209 -2.651319) (xy -0.331814 -2.699653)
(xy -0.326646 -2.724675) (xy -0.326556 -2.725057) (xy -0.323411 -2.735701) (xy -0.317296 -2.743738)
(xy -0.304547 -2.749533) (xy -0.2815 -2.753453) (xy -0.244491 -2.755865) (xy -0.189856 -2.757135)
(xy -0.113933 -2.757629) (xy -0.013056 -2.757714) (xy 0 -2.757714) (xy 0.10391 -2.757652)) (layer F.SilkS) (width 0.01))
)
(module LEDs:LED_0603 (layer F.Cu) (tedit 57FE93A5) (tstamp 59E00625)
(at 119.888 105.41 90)
(descr "LED 0603 smd package")
(tags "LED led 0603 SMD smd SMT smt smdled SMDLED smtled SMTLED")
(path /59CE819F/59CEB277)
(attr smd)
(fp_text reference D3 (at 0 -1.25 90) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value Rd (at 0 1.35 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -1.45 -0.65) (end 1.45 -0.65) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.45 0.65) (end -1.45 -0.65) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.45 0.65) (end -1.45 0.65) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.45 -0.65) (end 1.45 0.65) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.3 -0.5) (end 0.8 -0.5) (layer F.SilkS) (width 0.12))
(fp_line (start -1.3 0.5) (end 0.8 0.5) (layer F.SilkS) (width 0.12))
(fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.15 -0.2) (end 0.15 0.2) (layer F.Fab) (width 0.1))
(fp_line (start 0.15 0.2) (end -0.15 0) (layer F.Fab) (width 0.1))
(fp_line (start -0.15 0) (end 0.15 -0.2) (layer F.Fab) (width 0.1))
(fp_line (start -0.2 -0.2) (end -0.2 0.2) (layer F.Fab) (width 0.1))
(fp_line (start -1.3 -0.5) (end -1.3 0.5) (layer F.SilkS) (width 0.12))
(pad 1 smd rect (at -0.8 0 270) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask)
2017-10-01 23:12:04 +02:00
(net 43 "Net-(D3-Pad1)"))
2017-09-29 22:56:25 +02:00
(pad 2 smd rect (at 0.8 0 270) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask)
(net 7 +3V3))
(model ${KISYS3DMOD}/LEDs.3dshapes/LED_0603.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
)
(module LEDs:LED_0603 (layer F.Cu) (tedit 57FE93A5) (tstamp 59E0063A)
(at 116.84 105.41 90)
(descr "LED 0603 smd package")
(tags "LED led 0603 SMD smd SMT smt smdled SMDLED smtled SMTLED")
(path /59CE819F/59CEAE2F)
(attr smd)
(fp_text reference D4 (at 0 -1.25 90) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value Or (at 0 1.35 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -1.3 -0.5) (end -1.3 0.5) (layer F.SilkS) (width 0.12))
(fp_line (start -0.2 -0.2) (end -0.2 0.2) (layer F.Fab) (width 0.1))
(fp_line (start -0.15 0) (end 0.15 -0.2) (layer F.Fab) (width 0.1))
(fp_line (start 0.15 0.2) (end -0.15 0) (layer F.Fab) (width 0.1))
(fp_line (start 0.15 -0.2) (end 0.15 0.2) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start -1.3 0.5) (end 0.8 0.5) (layer F.SilkS) (width 0.12))
(fp_line (start -1.3 -0.5) (end 0.8 -0.5) (layer F.SilkS) (width 0.12))
(fp_line (start 1.45 -0.65) (end 1.45 0.65) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.45 0.65) (end -1.45 0.65) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.45 0.65) (end -1.45 -0.65) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.45 -0.65) (end 1.45 -0.65) (layer F.CrtYd) (width 0.05))
(pad 2 smd rect (at 0.8 0 270) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask)
(net 7 +3V3))
(pad 1 smd rect (at -0.8 0 270) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask)
2017-10-01 23:12:04 +02:00
(net 44 "Net-(D4-Pad1)"))
2017-09-29 22:56:25 +02:00
(model ${KISYS3DMOD}/LEDs.3dshapes/LED_0603.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
)
(module Pin_Headers:Pin_Header_Straight_1x15_Pitch2.54mm (layer B.Cu) (tedit 59650532) (tstamp 59E0065D)
(at 109.22 81.28 180)
(descr "Through hole straight pin header, 1x15, 2.54mm pitch, single row")
(tags "Through hole pin header THT 1x15 2.54mm single row")
(path /59CE819F/59CE37F9)
2017-10-01 23:12:04 +02:00
(fp_text reference J3 (at 0 2.33 180) (layer B.SilkS)
2017-09-29 22:56:25 +02:00
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text value Conn_Left (at 0 -37.89 180) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_line (start -0.635 1.27) (end 1.27 1.27) (layer B.Fab) (width 0.1))
(fp_line (start 1.27 1.27) (end 1.27 -36.83) (layer B.Fab) (width 0.1))
(fp_line (start 1.27 -36.83) (end -1.27 -36.83) (layer B.Fab) (width 0.1))
(fp_line (start -1.27 -36.83) (end -1.27 0.635) (layer B.Fab) (width 0.1))
(fp_line (start -1.27 0.635) (end -0.635 1.27) (layer B.Fab) (width 0.1))
(fp_line (start -1.33 -36.89) (end 1.33 -36.89) (layer B.SilkS) (width 0.12))
(fp_line (start -1.33 -1.27) (end -1.33 -36.89) (layer B.SilkS) (width 0.12))
(fp_line (start 1.33 -1.27) (end 1.33 -36.89) (layer B.SilkS) (width 0.12))
(fp_line (start -1.33 -1.27) (end 1.33 -1.27) (layer B.SilkS) (width 0.12))
(fp_line (start -1.33 0) (end -1.33 1.33) (layer B.SilkS) (width 0.12))
(fp_line (start -1.33 1.33) (end 0 1.33) (layer B.SilkS) (width 0.12))
(fp_line (start -1.8 1.8) (end -1.8 -37.35) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.8 -37.35) (end 1.8 -37.35) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.8 -37.35) (end 1.8 1.8) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.8 1.8) (end -1.8 1.8) (layer B.CrtYd) (width 0.05))
(fp_text user %R (at 0 -17.78 90) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(pad 1 thru_hole rect (at 0 0 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 7 +3V3))
(pad 2 thru_hole oval (at 0 -2.54 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 6 /fpga/VCCIO23))
(pad 3 thru_hole oval (at 0 -5.08 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 28 /fpga/P4))
(pad 4 thru_hole oval (at 0 -7.62 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 27 /fpga/P5))
(pad 5 thru_hole oval (at 0 -10.16 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 26 /fpga/P8))
(pad 6 thru_hole oval (at 0 -12.7 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 25 /fpga/P9))
(pad 7 thru_hole oval (at 0 -15.24 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 24 /fpga/P10))
(pad 8 thru_hole oval (at 0 -17.78 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 23 /fpga/P11))
(pad 9 thru_hole oval (at 0 -20.32 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 22 /fpga/P12))
(pad 10 thru_hole oval (at 0 -22.86 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 21 /fpga/P13))
(pad 11 thru_hole oval (at 0 -25.4 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 20 /fpga/P14))
(pad 12 thru_hole oval (at 0 -27.94 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 19 /fpga/P16))
(pad 13 thru_hole oval (at 0 -30.48 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 29 /fpga/P17))
(pad 14 thru_hole oval (at 0 -33.02 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 4 GND))
(pad 15 thru_hole oval (at 0 -35.56 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 5 VBUS))
(model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Straight_1x15_Pitch2.54mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Pin_Headers:Pin_Header_Straight_1x15_Pitch2.54mm (layer B.Cu) (tedit 59650532) (tstamp 59E00680)
(at 124.46 81.28 180)
(descr "Through hole straight pin header, 1x15, 2.54mm pitch, single row")
(tags "Through hole pin header THT 1x15 2.54mm single row")
(path /59CE819F/59CE3A58)
2017-10-01 23:12:04 +02:00
(fp_text reference J4 (at 0 2.33 180) (layer B.SilkS)
2017-09-29 22:56:25 +02:00
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text value Conn_Right (at 0 -37.89 180) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text user %R (at 0 -17.78 90) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_line (start 1.8 1.8) (end -1.8 1.8) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.8 -37.35) (end 1.8 1.8) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.8 -37.35) (end 1.8 -37.35) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.8 1.8) (end -1.8 -37.35) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.33 1.33) (end 0 1.33) (layer B.SilkS) (width 0.12))
(fp_line (start -1.33 0) (end -1.33 1.33) (layer B.SilkS) (width 0.12))
(fp_line (start -1.33 -1.27) (end 1.33 -1.27) (layer B.SilkS) (width 0.12))
(fp_line (start 1.33 -1.27) (end 1.33 -36.89) (layer B.SilkS) (width 0.12))
(fp_line (start -1.33 -1.27) (end -1.33 -36.89) (layer B.SilkS) (width 0.12))
(fp_line (start -1.33 -36.89) (end 1.33 -36.89) (layer B.SilkS) (width 0.12))
(fp_line (start -1.27 0.635) (end -0.635 1.27) (layer B.Fab) (width 0.1))
(fp_line (start -1.27 -36.83) (end -1.27 0.635) (layer B.Fab) (width 0.1))
(fp_line (start 1.27 -36.83) (end -1.27 -36.83) (layer B.Fab) (width 0.1))
(fp_line (start 1.27 1.27) (end 1.27 -36.83) (layer B.Fab) (width 0.1))
(fp_line (start -0.635 1.27) (end 1.27 1.27) (layer B.Fab) (width 0.1))
(pad 15 thru_hole oval (at 0 -35.56 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 7 +3V3))
(pad 14 thru_hole oval (at 0 -33.02 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 4 GND))
(pad 13 thru_hole oval (at 0 -30.48 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 3 /fpga/RS))
(pad 12 thru_hole oval (at 0 -27.94 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 1 /fpga/TX))
(pad 11 thru_hole oval (at 0 -25.4 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 2 /fpga/RX))
(pad 10 thru_hole oval (at 0 -22.86 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 4 GND))
(pad 9 thru_hole oval (at 0 -20.32 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 18 /fpga/P25))
(pad 8 thru_hole oval (at 0 -17.78 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 17 /fpga/P27))
(pad 7 thru_hole oval (at 0 -15.24 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
2017-10-01 23:12:04 +02:00
(net 33 /fpga/CLK_FPGA))
2017-09-29 22:56:25 +02:00
(pad 6 thru_hole oval (at 0 -12.7 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 4 GND))
(pad 5 thru_hole oval (at 0 -10.16 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
2017-10-01 22:33:15 +02:00
(net 11 /fpga/JTAG_EN))
2017-09-29 22:56:25 +02:00
(pad 4 thru_hole oval (at 0 -7.62 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 10 /fpga/JTAG_TMS))
(pad 3 thru_hole oval (at 0 -5.08 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 9 /fpga/JTAG_TCK))
(pad 2 thru_hole oval (at 0 -2.54 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 8 /fpga/JTAG_TDI))
(pad 1 thru_hole rect (at 0 0 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 12 /fpga/JTAG_TDO))
(model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Straight_1x15_Pitch2.54mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module TO_SOT_Packages_SMD:SOT-223-3Lead_TabPin2 (layer B.Cu) (tedit 58CE4E7E) (tstamp 59E00696)
(at 116.84 116.84 90)
(descr "module CMS SOT223 4 pins")
(tags "CMS SOT")
(path /59CE0A28/59CE0B45)
(attr smd)
(fp_text reference U1 (at 3.048 3.302 90) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text value AP1117-33 (at 0 -4.5 90) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_line (start 1.85 3.35) (end 1.85 -3.35) (layer B.Fab) (width 0.1))
(fp_line (start -1.85 -3.35) (end 1.85 -3.35) (layer B.Fab) (width 0.1))
(fp_line (start -4.1 3.41) (end 1.91 3.41) (layer B.SilkS) (width 0.12))
(fp_line (start -0.85 3.35) (end 1.85 3.35) (layer B.Fab) (width 0.1))
(fp_line (start -1.85 -3.41) (end 1.91 -3.41) (layer B.SilkS) (width 0.12))
(fp_line (start -1.85 2.35) (end -1.85 -3.35) (layer B.Fab) (width 0.1))
(fp_line (start -1.85 2.35) (end -0.85 3.35) (layer B.Fab) (width 0.1))
(fp_line (start -4.4 3.6) (end -4.4 -3.6) (layer B.CrtYd) (width 0.05))
(fp_line (start -4.4 -3.6) (end 4.4 -3.6) (layer B.CrtYd) (width 0.05))
(fp_line (start 4.4 -3.6) (end 4.4 3.6) (layer B.CrtYd) (width 0.05))
(fp_line (start 4.4 3.6) (end -4.4 3.6) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.91 3.41) (end 1.91 2.15) (layer B.SilkS) (width 0.12))
(fp_line (start 1.91 -3.41) (end 1.91 -2.15) (layer B.SilkS) (width 0.12))
(fp_text user %R (at 0 0) (layer B.Fab)
(effects (font (size 0.8 0.8) (thickness 0.12)) (justify mirror))
)
(pad 1 smd rect (at -3.15 2.3 90) (size 2 1.5) (layers B.Cu B.Paste B.Mask)
(net 4 GND))
(pad 3 smd rect (at -3.15 -2.3 90) (size 2 1.5) (layers B.Cu B.Paste B.Mask)
(net 5 VBUS))
(pad 2 smd rect (at -3.15 0 90) (size 2 1.5) (layers B.Cu B.Paste B.Mask)
(net 7 +3V3))
(pad 2 smd rect (at 3.15 0 90) (size 2 3.8) (layers B.Cu B.Paste B.Mask)
(net 7 +3V3))
(model ${KISYS3DMOD}/TO_SOT_Packages_SMD.3dshapes/SOT-223.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Housings_DFN_QFN:QFN-32-1EP_5x5mm_Pitch0.5mm (layer F.Cu) (tedit 54130A77) (tstamp 59E006CE)
(at 116.84 88.9 315)
(descr "UH Package; 32-Lead Plastic QFN (5mm x 5mm); (see Linear Technology QFN_32_05-08-1693.pdf)")
(tags "QFN 0.5")
(path /59CE0A28/59CE1D8D)
(attr smd)
(fp_text reference U2 (at 0 -3.75 315) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value LCMXO2-1200HC-4SG32C (at 0 3.75 315) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 2.625 -2.625) (end 2.1 -2.625) (layer F.SilkS) (width 0.15))
(fp_line (start 2.625 2.625) (end 2.1 2.625) (layer F.SilkS) (width 0.15))
(fp_line (start -2.625 2.625) (end -2.1 2.625) (layer F.SilkS) (width 0.15))
(fp_line (start -2.625 -2.625) (end -2.1 -2.625) (layer F.SilkS) (width 0.15))
(fp_line (start 2.625 2.625) (end 2.625 2.1) (layer F.SilkS) (width 0.15))
(fp_line (start -2.625 2.625) (end -2.625 2.1) (layer F.SilkS) (width 0.15))
(fp_line (start 2.625 -2.625) (end 2.625 -2.1) (layer F.SilkS) (width 0.15))
(fp_line (start -3 3) (end 3 3) (layer F.CrtYd) (width 0.05))
(fp_line (start -3 -3) (end 3 -3) (layer F.CrtYd) (width 0.05))
(fp_line (start 3 -3) (end 3 3) (layer F.CrtYd) (width 0.05))
(fp_line (start -3 -3) (end -3 3) (layer F.CrtYd) (width 0.05))
(fp_line (start -2.5 -1.5) (end -1.5 -2.5) (layer F.Fab) (width 0.15))
(fp_line (start -2.5 2.5) (end -2.5 -1.5) (layer F.Fab) (width 0.15))
(fp_line (start 2.5 2.5) (end -2.5 2.5) (layer F.Fab) (width 0.15))
(fp_line (start 2.5 -2.5) (end 2.5 2.5) (layer F.Fab) (width 0.15))
(fp_line (start -1.5 -2.5) (end 2.5 -2.5) (layer F.Fab) (width 0.15))
(pad 33 smd rect (at -0.8625 -0.8625 315) (size 1.725 1.725) (layers F.Cu F.Paste F.Mask)
(net 4 GND) (solder_paste_margin_ratio -0.2))
(pad 33 smd rect (at -0.8625 0.8625 315) (size 1.725 1.725) (layers F.Cu F.Paste F.Mask)
(net 4 GND) (solder_paste_margin_ratio -0.2))
(pad 33 smd rect (at 0.8625 -0.8625 315) (size 1.725 1.725) (layers F.Cu F.Paste F.Mask)
(net 4 GND) (solder_paste_margin_ratio -0.2))
(pad 33 smd rect (at 0.8625 0.8625 315) (size 1.725 1.725) (layers F.Cu F.Paste F.Mask)
(net 4 GND) (solder_paste_margin_ratio -0.2))
(pad 32 smd rect (at -1.75 -2.4 45) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
(net 8 /fpga/JTAG_TDI))
(pad 31 smd rect (at -1.25 -2.4 45) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
(net 7 +3V3))
(pad 30 smd rect (at -0.75 -2.4 45) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
(net 9 /fpga/JTAG_TCK))
(pad 29 smd rect (at -0.25 -2.4 45) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
(net 10 /fpga/JTAG_TMS))
(pad 28 smd rect (at 0.25 -2.4 45) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
2017-10-01 23:12:04 +02:00
(net 33 /fpga/CLK_FPGA))
2017-09-29 22:56:25 +02:00
(pad 27 smd rect (at 0.75 -2.4 45) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
(net 17 /fpga/P27))
(pad 26 smd rect (at 1.25 -2.4 45) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
(net 11 /fpga/JTAG_EN))
(pad 25 smd rect (at 1.75 -2.4 45) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
(net 18 /fpga/P25))
(pad 24 smd rect (at 2.4 -1.75 315) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
(net 7 +3V3))
(pad 23 smd rect (at 2.4 -1.25 315) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
(net 3 /fpga/RS))
(pad 22 smd rect (at 2.4 -0.75 315) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
(net 4 GND))
(pad 21 smd rect (at 2.4 -0.25 315) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
(net 1 /fpga/TX))
(pad 20 smd rect (at 2.4 0.25 315) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
(net 2 /fpga/RX))
(pad 19 smd rect (at 2.4 0.75 315) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
(net 7 +3V3))
(pad 18 smd rect (at 2.4 1.25 315) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
(net 7 +3V3))
(pad 17 smd rect (at 2.4 1.75 315) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
(net 29 /fpga/P17))
(pad 16 smd rect (at 1.75 2.4 45) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
(net 19 /fpga/P16))
(pad 15 smd rect (at 1.25 2.4 45) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
(net 6 /fpga/VCCIO23))
(pad 14 smd rect (at 0.75 2.4 45) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
(net 20 /fpga/P14))
(pad 13 smd rect (at 0.25 2.4 45) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
(net 21 /fpga/P13))
(pad 12 smd rect (at -0.25 2.4 45) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
(net 22 /fpga/P12))
(pad 11 smd rect (at -0.75 2.4 45) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
(net 23 /fpga/P11))
(pad 10 smd rect (at -1.25 2.4 45) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
(net 24 /fpga/P10))
(pad 9 smd rect (at -1.75 2.4 45) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
(net 25 /fpga/P9))
(pad 8 smd rect (at -2.4 1.75 315) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
(net 26 /fpga/P8))
(pad 7 smd rect (at -2.4 1.25 315) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
(net 6 /fpga/VCCIO23))
(pad 6 smd rect (at -2.4 0.75 315) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
(net 6 /fpga/VCCIO23))
(pad 5 smd rect (at -2.4 0.25 315) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
(net 27 /fpga/P5))
(pad 4 smd rect (at -2.4 -0.25 315) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
(net 28 /fpga/P4))
(pad 3 smd rect (at -2.4 -0.75 315) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
(net 4 GND))
(pad 2 smd rect (at -2.4 -1.25 315) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
(net 7 +3V3))
(pad 1 smd rect (at -2.4 -1.75 315) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
(net 12 /fpga/JTAG_TDO))
(model ${KISYS3DMOD}/Housings_DFN_QFN.3dshapes/QFN-32-1EP_5x5mm_Pitch0.5mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Housings_SOIC:SOIC-16_3.9x9.9mm_Pitch1.27mm (layer B.Cu) (tedit 58CC8F64) (tstamp 59E006F3)
(at 116.84 107.95 270)
(descr "16-Lead Plastic Small Outline (SL) - Narrow, 3.90 mm Body [SOIC] (see Microchip Packaging Specification 00000049BS.pdf)")
(tags "SOIC 1.27")
(path /59CE3CDF/59CE5435)
(attr smd)
(fp_text reference U3 (at 3.302 -5.588 270) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text value ch340g (at 0 -6 270) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_line (start -2.075 5.05) (end -3.45 5.05) (layer B.SilkS) (width 0.15))
(fp_line (start -2.075 -5.075) (end 2.075 -5.075) (layer B.SilkS) (width 0.15))
(fp_line (start -2.075 5.075) (end 2.075 5.075) (layer B.SilkS) (width 0.15))
(fp_line (start -2.075 -5.075) (end -2.075 -4.97) (layer B.SilkS) (width 0.15))
(fp_line (start 2.075 -5.075) (end 2.075 -4.97) (layer B.SilkS) (width 0.15))
(fp_line (start 2.075 5.075) (end 2.075 4.97) (layer B.SilkS) (width 0.15))
(fp_line (start -2.075 5.075) (end -2.075 5.05) (layer B.SilkS) (width 0.15))
(fp_line (start -3.7 -5.25) (end 3.7 -5.25) (layer B.CrtYd) (width 0.05))
(fp_line (start -3.7 5.25) (end 3.7 5.25) (layer B.CrtYd) (width 0.05))
(fp_line (start 3.7 5.25) (end 3.7 -5.25) (layer B.CrtYd) (width 0.05))
(fp_line (start -3.7 5.25) (end -3.7 -5.25) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.95 3.95) (end -0.95 4.95) (layer B.Fab) (width 0.15))
(fp_line (start -1.95 -4.95) (end -1.95 3.95) (layer B.Fab) (width 0.15))
(fp_line (start 1.95 -4.95) (end -1.95 -4.95) (layer B.Fab) (width 0.15))
(fp_line (start 1.95 4.95) (end 1.95 -4.95) (layer B.Fab) (width 0.15))
(fp_line (start -0.95 4.95) (end 1.95 4.95) (layer B.Fab) (width 0.15))
(fp_text user %R (at 0 0 270) (layer B.Fab)
(effects (font (size 0.9 0.9) (thickness 0.135)) (justify mirror))
)
(pad 16 smd rect (at 2.7 4.445 270) (size 1.5 0.6) (layers B.Cu B.Paste B.Mask)
(net 7 +3V3))
(pad 15 smd rect (at 2.7 3.175 270) (size 1.5 0.6) (layers B.Cu B.Paste B.Mask)
2017-10-01 23:12:04 +02:00
(net 36 "Net-(U3-Pad15)"))
2017-09-29 22:56:25 +02:00
(pad 14 smd rect (at 2.7 1.905 270) (size 1.5 0.6) (layers B.Cu B.Paste B.Mask)
2017-10-01 23:12:04 +02:00
(net 37 "Net-(U3-Pad14)"))
2017-09-29 22:56:25 +02:00
(pad 13 smd rect (at 2.7 0.635 270) (size 1.5 0.6) (layers B.Cu B.Paste B.Mask)
(net 13 /usbserial/DTR))
(pad 12 smd rect (at 2.7 -0.635 270) (size 1.5 0.6) (layers B.Cu B.Paste B.Mask)
2017-10-01 23:12:04 +02:00
(net 38 "Net-(U3-Pad12)"))
2017-09-29 22:56:25 +02:00
(pad 11 smd rect (at 2.7 -1.905 270) (size 1.5 0.6) (layers B.Cu B.Paste B.Mask)
2017-10-01 23:12:04 +02:00
(net 39 "Net-(U3-Pad11)"))
2017-09-29 22:56:25 +02:00
(pad 10 smd rect (at 2.7 -3.175 270) (size 1.5 0.6) (layers B.Cu B.Paste B.Mask)
2017-10-01 23:12:04 +02:00
(net 40 "Net-(U3-Pad10)"))
2017-09-29 22:56:25 +02:00
(pad 9 smd rect (at 2.7 -4.445 270) (size 1.5 0.6) (layers B.Cu B.Paste B.Mask)
2017-10-01 23:12:04 +02:00
(net 41 "Net-(U3-Pad9)"))
2017-09-29 22:56:25 +02:00
(pad 8 smd rect (at -2.7 -4.445 270) (size 1.5 0.6) (layers B.Cu B.Paste B.Mask)
(net 14 "Net-(U3-Pad8)"))
(pad 7 smd rect (at -2.7 -3.175 270) (size 1.5 0.6) (layers B.Cu B.Paste B.Mask)
2017-10-01 23:12:04 +02:00
(net 34 /fpga/CLK_USBSER))
2017-09-29 22:56:25 +02:00
(pad 6 smd rect (at -2.7 -1.905 270) (size 1.5 0.6) (layers B.Cu B.Paste B.Mask)
(net 15 /usbserial/USB-))
(pad 5 smd rect (at -2.7 -0.635 270) (size 1.5 0.6) (layers B.Cu B.Paste B.Mask)
(net 16 /usbserial/USB+))
(pad 4 smd rect (at -2.7 0.635 270) (size 1.5 0.6) (layers B.Cu B.Paste B.Mask)
(net 7 +3V3))
(pad 3 smd rect (at -2.7 1.905 270) (size 1.5 0.6) (layers B.Cu B.Paste B.Mask)
2017-10-01 23:12:04 +02:00
(net 32 /fpga/RXD))
2017-09-29 22:56:25 +02:00
(pad 2 smd rect (at -2.7 3.175 270) (size 1.5 0.6) (layers B.Cu B.Paste B.Mask)
2017-10-01 23:12:04 +02:00
(net 31 /fpga/TXD))
2017-09-29 22:56:25 +02:00
(pad 1 smd rect (at -2.7 4.445 270) (size 1.5 0.6) (layers B.Cu B.Paste B.Mask)
(net 4 GND))
(model ${KISYS3DMOD}/Housings_SOIC.3dshapes/SOIC-16_3.9x9.9mm_Pitch1.27mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Pin_Headers:Pin_Header_Straight_2x04_Pitch2.54mm (layer F.Cu) (tedit 59650532) (tstamp 5A00FBEC)
(at 113.03 81.28 90)
(descr "Through hole straight pin header, 2x04, 2.54mm pitch, double rows")
(tags "Through hole pin header THT 2x04 2.54mm double row")
(path /59CE819F/59CE71D1)
2017-10-01 23:12:04 +02:00
(fp_text reference J2 (at 2.921 -2.413 180) (layer F.SilkS)
2017-09-29 22:56:25 +02:00
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value JTAG (at 1.27 9.95 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 1.27 3.81 180) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 4.35 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.35 9.4) (end 4.35 -1.8) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.8 9.4) (end 4.35 9.4) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.8 -1.8) (end -1.8 9.4) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12))
(fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.12))
(fp_line (start 1.27 -1.33) (end 3.87 -1.33) (layer F.SilkS) (width 0.12))
(fp_line (start 1.27 1.27) (end 1.27 -1.33) (layer F.SilkS) (width 0.12))
(fp_line (start -1.33 1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.12))
(fp_line (start 3.87 -1.33) (end 3.87 8.95) (layer F.SilkS) (width 0.12))
(fp_line (start -1.33 1.27) (end -1.33 8.95) (layer F.SilkS) (width 0.12))
(fp_line (start -1.33 8.95) (end 3.87 8.95) (layer F.SilkS) (width 0.12))
(fp_line (start -1.27 0) (end 0 -1.27) (layer F.Fab) (width 0.1))
(fp_line (start -1.27 8.89) (end -1.27 0) (layer F.Fab) (width 0.1))
(fp_line (start 3.81 8.89) (end -1.27 8.89) (layer F.Fab) (width 0.1))
(fp_line (start 3.81 -1.27) (end 3.81 8.89) (layer F.Fab) (width 0.1))
(fp_line (start 0 -1.27) (end 3.81 -1.27) (layer F.Fab) (width 0.1))
(pad 8 thru_hole oval (at 2.54 7.62 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 11 /fpga/JTAG_EN))
(pad 7 thru_hole oval (at 0 7.62 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 10 /fpga/JTAG_TMS))
(pad 6 thru_hole oval (at 2.54 5.08 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
2017-10-01 23:12:04 +02:00
(net 46 "Net-(J2-Pad6)"))
2017-09-29 22:56:25 +02:00
(pad 5 thru_hole oval (at 0 5.08 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 9 /fpga/JTAG_TCK))
(pad 4 thru_hole oval (at 2.54 2.54 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 4 GND))
(pad 3 thru_hole oval (at 0 2.54 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 8 /fpga/JTAG_TDI))
(pad 2 thru_hole oval (at 2.54 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 7 +3V3))
(pad 1 thru_hole rect (at 0 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 12 /fpga/JTAG_TDO))
(model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Straight_2x04_Pitch2.54mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Capacitors_SMD:C_0805 (layer B.Cu) (tedit 58AA8463) (tstamp 5A1184B9)
(at 109.236 120.142)
(descr "Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)")
(tags "capacitor 0805")
(path /59CE0A28/59CE0E72)
(attr smd)
2017-10-01 23:12:04 +02:00
(fp_text reference C5 (at 0 -1.524) (layer B.SilkS)
2017-09-29 22:56:25 +02:00
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text value 1u (at 0 -1.75) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_line (start 1.75 -0.87) (end -1.75 -0.87) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.75 -0.87) (end 1.75 0.88) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.75 0.88) (end -1.75 -0.87) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.75 0.88) (end 1.75 0.88) (layer B.CrtYd) (width 0.05))
(fp_line (start -0.5 -0.85) (end 0.5 -0.85) (layer B.SilkS) (width 0.12))
(fp_line (start 0.5 0.85) (end -0.5 0.85) (layer B.SilkS) (width 0.12))
(fp_line (start -1 0.62) (end 1 0.62) (layer B.Fab) (width 0.1))
(fp_line (start 1 0.62) (end 1 -0.62) (layer B.Fab) (width 0.1))
(fp_line (start 1 -0.62) (end -1 -0.62) (layer B.Fab) (width 0.1))
(fp_line (start -1 -0.62) (end -1 0.62) (layer B.Fab) (width 0.1))
(fp_text user %R (at 0 1.5) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(pad 2 smd rect (at 1 0) (size 1 1.25) (layers B.Cu B.Paste B.Mask)
(net 4 GND))
(pad 1 smd rect (at -1 0) (size 1 1.25) (layers B.Cu B.Paste B.Mask)
(net 5 VBUS))
(model Capacitors_SMD.3dshapes/C_0805.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Capacitors_SMD:C_0603 (layer B.Cu) (tedit 59958EE7) (tstamp 5A1184CA)
(at 112.141 118.63 270)
(descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)")
(tags "capacitor 0603")
(path /59CE0A28/59CE0D8D)
(attr smd)
2017-10-01 23:12:04 +02:00
(fp_text reference C6 (at 2.147 0 270) (layer B.SilkS)
2017-09-29 22:56:25 +02:00
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text value 100n (at 0 -1.5 270) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_line (start 1.4 -0.65) (end -1.4 -0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.4 -0.65) (end 1.4 0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.4 0.65) (end -1.4 -0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.4 0.65) (end 1.4 0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start 0.35 -0.6) (end -0.35 -0.6) (layer B.SilkS) (width 0.12))
(fp_line (start -0.35 0.6) (end 0.35 0.6) (layer B.SilkS) (width 0.12))
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.1))
(fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.1))
(fp_text user %R (at 0 0 270) (layer B.Fab)
(effects (font (size 0.3 0.3) (thickness 0.075)) (justify mirror))
)
(pad 2 smd rect (at 0.75 0 270) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)
(net 4 GND))
(pad 1 smd rect (at -0.75 0 270) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)
(net 5 VBUS))
(model Capacitors_SMD.3dshapes/C_0603.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Capacitors_SMD:C_0603 (layer B.Cu) (tedit 59958EE7) (tstamp 5A1184DB)
(at 121.92 116.32 90)
(descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)")
(tags "capacitor 0603")
(path /59CE0A28/59CE1081)
(attr smd)
2017-10-01 23:12:04 +02:00
(fp_text reference C7 (at -2.552 0.127 90) (layer B.SilkS)
2017-09-29 22:56:25 +02:00
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text value 100n (at 0 -1.5 90) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text user %R (at 0 0 90) (layer B.Fab)
(effects (font (size 0.3 0.3) (thickness 0.075)) (justify mirror))
)
(fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.1))
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.1))
(fp_line (start -0.35 0.6) (end 0.35 0.6) (layer B.SilkS) (width 0.12))
(fp_line (start 0.35 -0.6) (end -0.35 -0.6) (layer B.SilkS) (width 0.12))
(fp_line (start -1.4 0.65) (end 1.4 0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.4 0.65) (end -1.4 -0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.4 -0.65) (end 1.4 0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.4 -0.65) (end -1.4 -0.65) (layer B.CrtYd) (width 0.05))
(pad 1 smd rect (at -0.75 0 90) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)
(net 4 GND))
(pad 2 smd rect (at 0.75 0 90) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)
(net 7 +3V3))
(model Capacitors_SMD.3dshapes/C_0603.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Capacitors_SMD:C_0603 (layer B.Cu) (tedit 59958EE7) (tstamp 5A1184EC)
(at 118.491 91.567 315)
(descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)")
(tags "capacitor 0603")
(path /59CE0A28/59CE1FC1)
(attr smd)
2017-10-01 23:12:04 +02:00
(fp_text reference C1 (at 2.514472 0 315) (layer B.SilkS)
2017-09-29 22:56:25 +02:00
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text value 10n (at 0 -1.5 315) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_line (start 1.4 -0.65) (end -1.4 -0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.4 -0.65) (end 1.4 0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.4 0.65) (end -1.4 -0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.4 0.65) (end 1.4 0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start 0.349999 -0.6) (end -0.349999 -0.6) (layer B.SilkS) (width 0.12))
(fp_line (start -0.349999 0.6) (end 0.349999 0.6) (layer B.SilkS) (width 0.12))
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.1))
(fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.1))
(fp_text user %R (at 0 0 315) (layer B.Fab)
(effects (font (size 0.3 0.3) (thickness 0.075)) (justify mirror))
)
(pad 2 smd rect (at 0.75 0 315) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)
(net 7 +3V3))
(pad 1 smd rect (at -0.75 0 315) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)
(net 4 GND))
(model Capacitors_SMD.3dshapes/C_0603.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Capacitors_SMD:C_0603 (layer B.Cu) (tedit 59958EE7) (tstamp 5A1184FD)
(at 117.475 92.583 315)
(descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)")
(tags "capacitor 0603")
(path /59CE0A28/59CE2F41)
(attr smd)
2017-10-01 23:12:04 +02:00
(fp_text reference C2 (at 0.035921 1.436841 315) (layer B.SilkS)
2017-09-29 22:56:25 +02:00
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text value 100n (at 0 -1.5 315) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_line (start 1.4 -0.65) (end -1.4 -0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.4 -0.65) (end 1.4 0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.4 0.65) (end -1.4 -0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.4 0.65) (end 1.4 0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start 0.349999 -0.6) (end -0.349999 -0.6) (layer B.SilkS) (width 0.12))
(fp_line (start -0.349999 0.6) (end 0.349999 0.6) (layer B.SilkS) (width 0.12))
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.1))
(fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.1))
(fp_text user %R (at 0 0 315) (layer B.Fab)
(effects (font (size 0.3 0.3) (thickness 0.075)) (justify mirror))
)
(pad 2 smd rect (at 0.75 0 315) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)
(net 7 +3V3))
(pad 1 smd rect (at -0.75 0 315) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)
(net 4 GND))
(model Capacitors_SMD.3dshapes/C_0603.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Capacitors_SMD:C_0603 (layer B.Cu) (tedit 59958EE7) (tstamp 5A11850E)
(at 115.189 86.233 135)
(descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)")
(tags "capacitor 0603")
(path /59CE0A28/59CE300F)
(attr smd)
2017-10-01 23:12:04 +02:00
(fp_text reference C3 (at -2.424669 -0.089803 135) (layer B.SilkS)
2017-09-29 22:56:25 +02:00
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text value 10n (at 0 -1.5 135) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_line (start 1.4 -0.65) (end -1.4 -0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.4 -0.65) (end 1.4 0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.4 0.65) (end -1.4 -0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.4 0.65) (end 1.4 0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start 0.349999 -0.6) (end -0.349999 -0.6) (layer B.SilkS) (width 0.12))
(fp_line (start -0.349999 0.6) (end 0.349999 0.6) (layer B.SilkS) (width 0.12))
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.1))
(fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.1))
(fp_text user %R (at 0 0 135) (layer B.Fab)
(effects (font (size 0.3 0.3) (thickness 0.075)) (justify mirror))
)
(pad 2 smd rect (at 0.75 0 135) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)
(net 7 +3V3))
(pad 1 smd rect (at -0.75 0 135) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)
(net 4 GND))
(model Capacitors_SMD.3dshapes/C_0603.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Capacitors_SMD:C_0603 (layer B.Cu) (tedit 59958EE7) (tstamp 5A11851F)
(at 116.205 85.217 135)
(descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)")
(tags "capacitor 0603")
(path /59CE0A28/59CE303F)
(attr smd)
2017-10-01 23:12:04 +02:00
(fp_text reference C4 (at 2.424669 -0.089803 135) (layer B.SilkS)
2017-09-29 22:56:25 +02:00
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text value 100n (at 0 -1.5 135) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text user %R (at 0 0 135) (layer B.Fab)
(effects (font (size 0.3 0.3) (thickness 0.075)) (justify mirror))
)
(fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.1))
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.1))
(fp_line (start -0.349999 0.6) (end 0.349999 0.6) (layer B.SilkS) (width 0.12))
(fp_line (start 0.349999 -0.6) (end -0.349999 -0.6) (layer B.SilkS) (width 0.12))
(fp_line (start -1.4 0.65) (end 1.4 0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.4 0.65) (end -1.4 -0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.4 -0.65) (end 1.4 0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.4 -0.65) (end -1.4 -0.65) (layer B.CrtYd) (width 0.05))
(pad 1 smd rect (at -0.75 0 135) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)
(net 4 GND))
(pad 2 smd rect (at 0.75 0 135) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)
(net 7 +3V3))
(model Capacitors_SMD.3dshapes/C_0603.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Capacitors_SMD:C_0603 (layer B.Cu) (tedit 59958EE7) (tstamp 5A118530)
2017-10-01 11:42:30 +02:00
(at 113.6523 102.9081 180)
2017-09-29 22:56:25 +02:00
(descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)")
(tags "capacitor 0603")
(path /59CE3CDF/59CE59BF)
(attr smd)
2017-10-01 11:42:30 +02:00
(fp_text reference C8 (at -2.3749 -0.0635 180) (layer B.SilkS)
2017-09-29 22:56:25 +02:00
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text value 100n (at 0 -1.5 180) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_line (start 1.4 -0.65) (end -1.4 -0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.4 -0.65) (end 1.4 0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.4 0.65) (end -1.4 -0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.4 0.65) (end 1.4 0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start 0.35 -0.6) (end -0.35 -0.6) (layer B.SilkS) (width 0.12))
(fp_line (start -0.35 0.6) (end 0.35 0.6) (layer B.SilkS) (width 0.12))
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.1))
(fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.1))
(fp_text user %R (at 0 0 180) (layer B.Fab)
(effects (font (size 0.3 0.3) (thickness 0.075)) (justify mirror))
)
(pad 2 smd rect (at 0.75 0 180) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)
(net 4 GND))
(pad 1 smd rect (at -0.75 0 180) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)
(net 7 +3V3))
(model Capacitors_SMD.3dshapes/C_0603.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Capacitors_SMD:C_0603 (layer B.Cu) (tedit 59958EE7) (tstamp 5A118541)
2017-10-01 11:42:30 +02:00
(at 115.2024 101.4984)
2017-09-29 22:56:25 +02:00
(descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)")
(tags "capacitor 0603")
(path /59CE819F/59CE98A6)
(attr smd)
2017-10-01 11:42:30 +02:00
(fp_text reference C9 (at -2.4264 0) (layer B.SilkS)
2017-09-29 22:56:25 +02:00
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
2017-10-01 11:42:30 +02:00
(fp_text value 100n (at 0 -1.5) (layer B.Fab)
2017-09-29 22:56:25 +02:00
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
2017-10-01 11:42:30 +02:00
(fp_text user %R (at 0 0) (layer B.Fab)
2017-09-29 22:56:25 +02:00
(effects (font (size 0.3 0.3) (thickness 0.075)) (justify mirror))
)
(fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.1))
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.1))
(fp_line (start -0.35 0.6) (end 0.35 0.6) (layer B.SilkS) (width 0.12))
(fp_line (start 0.35 -0.6) (end -0.35 -0.6) (layer B.SilkS) (width 0.12))
(fp_line (start -1.4 0.65) (end 1.4 0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.4 0.65) (end -1.4 -0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.4 -0.65) (end 1.4 0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.4 -0.65) (end -1.4 -0.65) (layer B.CrtYd) (width 0.05))
2017-10-01 11:42:30 +02:00
(pad 1 smd rect (at -0.75 0) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)
2017-09-29 22:56:25 +02:00
(net 7 +3V3))
2017-10-01 11:42:30 +02:00
(pad 2 smd rect (at 0.75 0) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)
2017-09-29 22:56:25 +02:00
(net 4 GND))
(model Capacitors_SMD.3dshapes/C_0603.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Capacitors_SMD:C_0603 (layer B.Cu) (tedit 59958EE7) (tstamp 5A118552)
(at 118.237 86.233 225)
(descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)")
(tags "capacitor 0603")
(path /59CE819F/59CEB38A)
(attr smd)
(fp_text reference C10 (at -2.963485 -0.089803 225) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text value 100n (at 0 -1.5 225) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_line (start 1.4 -0.65) (end -1.4 -0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.4 -0.65) (end 1.4 0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.4 0.65) (end -1.4 -0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.4 0.65) (end 1.4 0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start 0.349999 -0.6) (end -0.349999 -0.6) (layer B.SilkS) (width 0.12))
(fp_line (start -0.349999 0.6) (end 0.349999 0.6) (layer B.SilkS) (width 0.12))
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.1))
(fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.1))
(fp_text user %R (at 0 0 225) (layer B.Fab)
(effects (font (size 0.3 0.3) (thickness 0.075)) (justify mirror))
)
(pad 2 smd rect (at 0.75 0 225) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)
(net 4 GND))
(pad 1 smd rect (at -0.75 0 225) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)
(net 7 +3V3))
(model Capacitors_SMD.3dshapes/C_0603.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Capacitors_SMD:C_0603 (layer B.Cu) (tedit 59958EE7) (tstamp 5A118563)
(at 120.523 89.535 135)
(descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)")
(tags "capacitor 0603")
(path /59CE819F/59CEB4E5)
(attr smd)
(fp_text reference C11 (at -0.089803 1.347038 135) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text value 100n (at 0 -1.5 135) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text user %R (at 0 0 135) (layer B.Fab)
(effects (font (size 0.3 0.3) (thickness 0.075)) (justify mirror))
)
(fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.1))
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.1))
(fp_line (start -0.349999 0.6) (end 0.349999 0.6) (layer B.SilkS) (width 0.12))
(fp_line (start 0.349999 -0.6) (end -0.349999 -0.6) (layer B.SilkS) (width 0.12))
(fp_line (start -1.4 0.65) (end 1.4 0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.4 0.65) (end -1.4 -0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.4 -0.65) (end 1.4 0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.4 -0.65) (end -1.4 -0.65) (layer B.CrtYd) (width 0.05))
(pad 1 smd rect (at -0.75 0 135) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)
(net 7 +3V3))
(pad 2 smd rect (at 0.75 0 135) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)
(net 4 GND))
(model Capacitors_SMD.3dshapes/C_0603.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Capacitors_SMD:C_0603 (layer B.Cu) (tedit 59958EE7) (tstamp 5A118574)
(at 119.52933 90.551 135)
(descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)")
(tags "capacitor 0603")
(path /59CE819F/59CEB527)
(attr smd)
(fp_text reference C12 (at -2.947695 0.074013 135) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text value 100n (at 0 -1.5 135) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_line (start 1.4 -0.65) (end -1.4 -0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.4 -0.65) (end 1.4 0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.4 0.65) (end -1.4 -0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.4 0.65) (end 1.4 0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start 0.349999 -0.6) (end -0.349999 -0.6) (layer B.SilkS) (width 0.12))
(fp_line (start -0.349999 0.6) (end 0.349999 0.6) (layer B.SilkS) (width 0.12))
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.1))
(fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.1))
(fp_text user %R (at 0 0 135) (layer B.Fab)
(effects (font (size 0.3 0.3) (thickness 0.075)) (justify mirror))
)
(pad 2 smd rect (at 0.75 0 135) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)
(net 4 GND))
(pad 1 smd rect (at -0.75 0 135) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)
(net 7 +3V3))
(model Capacitors_SMD.3dshapes/C_0603.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Capacitors_SMD:C_0603 (layer B.Cu) (tedit 59958EE7) (tstamp 5A118585)
(at 115.316 91.567 45)
(descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)")
(tags "capacitor 0603")
(path /59CE819F/59CEBF63)
(attr smd)
2017-10-01 11:42:30 +02:00
(fp_text reference C13 (at 0 -1.436841 45) (layer B.SilkS)
2017-09-29 22:56:25 +02:00
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text value 100n (at 0 -1.5 45) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text user %R (at 0 0 45) (layer B.Fab)
(effects (font (size 0.3 0.3) (thickness 0.075)) (justify mirror))
)
(fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.1))
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.1))
(fp_line (start -0.349999 0.6) (end 0.349999 0.6) (layer B.SilkS) (width 0.12))
(fp_line (start 0.349999 -0.6) (end -0.349999 -0.6) (layer B.SilkS) (width 0.12))
(fp_line (start -1.4 0.65) (end 1.4 0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.4 0.65) (end -1.4 -0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.4 -0.65) (end 1.4 0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.4 -0.65) (end -1.4 -0.65) (layer B.CrtYd) (width 0.05))
(pad 1 smd rect (at -0.75 0 45) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)
(net 6 /fpga/VCCIO23))
(pad 2 smd rect (at 0.75 0 45) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)
(net 4 GND))
(model Capacitors_SMD.3dshapes/C_0603.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Capacitors_SMD:C_0603 (layer B.Cu) (tedit 59958EE7) (tstamp 5A118596)
(at 113.157 88.265 315)
(descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)")
(tags "capacitor 0603")
(path /59CE819F/59CEBF69)
(attr smd)
(fp_text reference C14 (at 0 1.5 315) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text value 100n (at 0 -1.5 315) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text user %R (at 0 0 315) (layer B.Fab)
(effects (font (size 0.3 0.3) (thickness 0.075)) (justify mirror))
)
(fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.1))
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.1))
(fp_line (start -0.349999 0.6) (end 0.349999 0.6) (layer B.SilkS) (width 0.12))
(fp_line (start 0.349999 -0.6) (end -0.349999 -0.6) (layer B.SilkS) (width 0.12))
(fp_line (start -1.4 0.65) (end 1.4 0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.4 0.65) (end -1.4 -0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.4 -0.65) (end 1.4 0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.4 -0.65) (end -1.4 -0.65) (layer B.CrtYd) (width 0.05))
(pad 1 smd rect (at -0.75 0 315) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)
(net 6 /fpga/VCCIO23))
(pad 2 smd rect (at 0.75 0 315) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)
(net 4 GND))
(model Capacitors_SMD.3dshapes/C_0603.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Capacitors_SMD:C_0603 (layer B.Cu) (tedit 59958EE7) (tstamp 5A1185A7)
(at 114.173 87.249 315)
(descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)")
(tags "capacitor 0603")
(path /59CE819F/59CEBF6F)
(attr smd)
(fp_text reference C15 (at 2.963485 -0.089803 315) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text value 100n (at 0 -1.5 315) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text user %R (at 0 0 315) (layer B.Fab)
(effects (font (size 0.3 0.3) (thickness 0.075)) (justify mirror))
)
(fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.1))
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.1))
(fp_line (start -0.349999 0.6) (end 0.349999 0.6) (layer B.SilkS) (width 0.12))
(fp_line (start 0.349999 -0.6) (end -0.349999 -0.6) (layer B.SilkS) (width 0.12))
(fp_line (start -1.4 0.65) (end 1.4 0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.4 0.65) (end -1.4 -0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.4 -0.65) (end 1.4 0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.4 -0.65) (end -1.4 -0.65) (layer B.CrtYd) (width 0.05))
(pad 1 smd rect (at -0.75 0 315) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)
(net 6 /fpga/VCCIO23))
(pad 2 smd rect (at 0.75 0 315) (size 0.8 0.75) (layers B.Cu B.Paste B.Mask)
(net 4 GND))
(model Capacitors_SMD.3dshapes/C_0603.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Connectors:USB_Mini-B (layer F.Cu) (tedit 5543E571) (tstamp 5A1185E8)
(at 116.84 116.84 90)
(descr "USB Mini-B 5-pin SMD connector")
(tags "USB USB_B USB_Mini connector")
(path /59CE3CDF/59CE581D)
(attr smd)
(fp_text reference J1 (at 0 0 90) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value USB_OTG (at -0.65 -7.1 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 3.95 -3.85) (end -5.25 -3.85) (layer F.SilkS) (width 0.12))
(fp_line (start 3.95 3.85) (end 3.95 -3.85) (layer F.SilkS) (width 0.12))
(fp_line (start -5.25 3.85) (end 3.95 3.85) (layer F.SilkS) (width 0.12))
(fp_line (start -5.25 -3.85) (end -5.25 3.85) (layer F.SilkS) (width 0.12))
(fp_line (start -4.25 -3.85) (end -4.25 3.85) (layer F.SilkS) (width 0.12))
(fp_line (start -5.5 5.7) (end -5.5 -5.7) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.2 5.7) (end -5.5 5.7) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.2 -5.7) (end 4.2 5.7) (layer F.CrtYd) (width 0.05))
(fp_line (start -5.5 -5.7) (end 4.2 -5.7) (layer F.CrtYd) (width 0.05))
(pad "" np_thru_hole circle (at 0.2 2.2 90) (size 0.9 0.9) (drill 0.9) (layers *.Cu *.Mask))
(pad "" np_thru_hole circle (at 0.2 -2.2 90) (size 0.9 0.9) (drill 0.9) (layers *.Cu *.Mask))
(pad 6 smd rect (at -2.8 4.45 90) (size 2.5 2) (layers F.Cu F.Paste F.Mask)
(net 4 GND))
(pad 6 smd rect (at 2.7 4.45 90) (size 2.5 2) (layers F.Cu F.Paste F.Mask)
(net 4 GND))
(pad 6 smd rect (at -2.8 -4.45 90) (size 2.5 2) (layers F.Cu F.Paste F.Mask)
(net 4 GND))
(pad 6 smd rect (at 2.7 -4.45 90) (size 2.5 2) (layers F.Cu F.Paste F.Mask)
(net 4 GND))
(pad 5 smd rect (at 2.8 1.6 90) (size 2.3 0.5) (layers F.Cu F.Paste F.Mask)
(net 4 GND))
(pad 4 smd rect (at 2.8 0.8 90) (size 2.3 0.5) (layers F.Cu F.Paste F.Mask)
2017-10-01 23:12:04 +02:00
(net 45 "Net-(J1-Pad4)"))
2017-09-29 22:56:25 +02:00
(pad 3 smd rect (at 2.8 0 90) (size 2.3 0.5) (layers F.Cu F.Paste F.Mask)
(net 16 /usbserial/USB+))
2017-09-30 11:30:33 +02:00
(pad 2 smd rect (at 2.8 -0.8 90) (size 2.3 0.5) (layers F.Cu F.Paste F.Mask)
(net 15 /usbserial/USB-))
2017-09-29 22:56:25 +02:00
(pad 1 smd rect (at 2.8 -1.6 90) (size 2.3 0.5) (layers F.Cu F.Paste F.Mask)
2017-10-01 23:12:04 +02:00
(net 42 /usbserial/VU))
(model ${KISYS3DMOD}/smd.shapes3d/USB_JACK.x3d
(at (xyz -0.02362204724409449 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
2017-09-29 22:56:25 +02:00
)
(module Resistors_SMD:R_0603 (layer B.Cu) (tedit 58E0A804) (tstamp 5A11860A)
(at 112.903 84.963 45)
(descr "Resistor SMD 0603, reflow soldering, Vishay (see dcrcw.pdf)")
(tags "resistor 0603")
(path /59CE819F/59CEC5BE)
(attr smd)
2017-10-01 23:12:04 +02:00
(fp_text reference R9 (at 0 -1.436841 45) (layer B.SilkS)
2017-09-29 22:56:25 +02:00
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text value DNP (at 0 -1.5 45) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text user %R (at 0 0 45) (layer B.Fab)
(effects (font (size 0.4 0.4) (thickness 0.075)) (justify mirror))
)
(fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.1))
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.1))
(fp_line (start 0.5 -0.68) (end -0.5 -0.68) (layer B.SilkS) (width 0.12))
(fp_line (start -0.5 0.68) (end 0.5 0.68) (layer B.SilkS) (width 0.12))
(fp_line (start -1.25 0.7) (end 1.25 0.7) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.25 0.7) (end -1.25 -0.7) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.25 -0.7) (end 1.25 0.7) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.25 -0.7) (end -1.25 -0.7) (layer B.CrtYd) (width 0.05))
(pad 1 smd rect (at -0.75 0 45) (size 0.5 0.9) (layers B.Cu B.Paste B.Mask)
(net 6 /fpga/VCCIO23))
(pad 2 smd rect (at 0.75 0 45) (size 0.5 0.9) (layers B.Cu B.Paste B.Mask)
(net 7 +3V3))
(model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0603.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Resistors_SMD:R_0603 (layer F.Cu) (tedit 58E0A804) (tstamp 5A11861B)
(at 118.364 108.331 90)
(descr "Resistor SMD 0603, reflow soldering, Vishay (see dcrcw.pdf)")
(tags "resistor 0603")
(path /59CE819F/59CE5A45)
(attr smd)
2017-10-01 23:12:04 +02:00
(fp_text reference R6 (at -2.159 0.4445 90) (layer F.SilkS)
2017-09-29 22:56:25 +02:00
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 1k (at 0 1.5 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 1.25 0.7) (end -1.25 0.7) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.25 0.7) (end 1.25 -0.7) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.25 -0.7) (end -1.25 0.7) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.25 -0.7) (end 1.25 -0.7) (layer F.CrtYd) (width 0.05))
(fp_line (start -0.5 -0.68) (end 0.5 -0.68) (layer F.SilkS) (width 0.12))
(fp_line (start 0.5 0.68) (end -0.5 0.68) (layer F.SilkS) (width 0.12))
(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_text user %R (at 0 0 90) (layer F.Fab)
(effects (font (size 0.4 0.4) (thickness 0.075)))
)
(pad 2 smd rect (at 0.75 0 90) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask)
2017-10-01 23:12:04 +02:00
(net 31 /fpga/TXD))
2017-09-29 22:56:25 +02:00
(pad 1 smd rect (at -0.75 0 90) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask)
(net 1 /fpga/TX))
(model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0603.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Resistors_SMD:R_0603 (layer F.Cu) (tedit 58E0A804) (tstamp 5A11862C)
(at 115.316 108.331 90)
(descr "Resistor SMD 0603, reflow soldering, Vishay (see dcrcw.pdf)")
(tags "resistor 0603")
(path /59CE819F/59CE5D31)
(attr smd)
2017-10-01 23:12:04 +02:00
(fp_text reference R7 (at -2.2225 -0.1905 90) (layer F.SilkS)
2017-09-29 22:56:25 +02:00
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 1k (at 0 1.5 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 1.25 0.7) (end -1.25 0.7) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.25 0.7) (end 1.25 -0.7) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.25 -0.7) (end -1.25 0.7) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.25 -0.7) (end 1.25 -0.7) (layer F.CrtYd) (width 0.05))
(fp_line (start -0.5 -0.68) (end 0.5 -0.68) (layer F.SilkS) (width 0.12))
(fp_line (start 0.5 0.68) (end -0.5 0.68) (layer F.SilkS) (width 0.12))
(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_text user %R (at 0 0 90) (layer F.Fab)
(effects (font (size 0.4 0.4) (thickness 0.075)))
)
(pad 2 smd rect (at 0.75 0 90) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask)
2017-10-01 23:12:04 +02:00
(net 32 /fpga/RXD))
2017-09-29 22:56:25 +02:00
(pad 1 smd rect (at -0.75 0 90) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask)
(net 2 /fpga/RX))
(model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0603.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
2017-09-30 11:30:33 +02:00
(module Resistors_SMD:R_0603 (layer F.Cu) (tedit 59CF6124) (tstamp 5A11863D)
2017-09-29 22:56:25 +02:00
(at 116.955 110.617 180)
(descr "Resistor SMD 0603, reflow soldering, Vishay (see dcrcw.pdf)")
(tags "resistor 0603")
(path /59CE819F/59CE5D67)
(attr smd)
2017-10-01 23:12:04 +02:00
(fp_text reference R8 (at 0 -1.45 180) (layer F.SilkS)
2017-09-29 22:56:25 +02:00
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 1k (at 0 1.5 180) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 0 0 180) (layer F.Fab)
(effects (font (size 0.4 0.4) (thickness 0.075)))
)
(fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.5 0.68) (end -0.5 0.68) (layer F.SilkS) (width 0.12))
(fp_line (start -0.5 -0.68) (end 0.5 -0.68) (layer F.SilkS) (width 0.12))
(fp_line (start -1.25 -0.7) (end 1.25 -0.7) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.25 -0.7) (end -1.25 0.7) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.25 0.7) (end 1.25 -0.7) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.25 0.7) (end -1.25 0.7) (layer F.CrtYd) (width 0.05))
(pad 1 smd rect (at -0.75 0 180) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask)
(net 3 /fpga/RS))
(pad 2 smd rect (at 0.75 0 180) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask)
(net 13 /usbserial/DTR))
(model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0603.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Resistors_SMD:R_0603 (layer F.Cu) (tedit 58E0A804) (tstamp 5A11864E)
(at 119.888 108.331 270)
(descr "Resistor SMD 0603, reflow soldering, Vishay (see dcrcw.pdf)")
(tags "resistor 0603")
(path /59CE819F/59CEBC90)
(attr smd)
2017-10-01 23:12:04 +02:00
(fp_text reference R4 (at 2.159 -0.127 270) (layer F.SilkS)
2017-09-29 22:56:25 +02:00
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 1k (at 0 1.5 270) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 1.25 0.7) (end -1.25 0.7) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.25 0.7) (end 1.25 -0.7) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.25 -0.7) (end -1.25 0.7) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.25 -0.7) (end 1.25 -0.7) (layer F.CrtYd) (width 0.05))
(fp_line (start -0.5 -0.68) (end 0.5 -0.68) (layer F.SilkS) (width 0.12))
(fp_line (start 0.5 0.68) (end -0.5 0.68) (layer F.SilkS) (width 0.12))
(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
2017-09-29 22:56:25 +02:00
(fp_text user %R (at 0 0 270) (layer F.Fab)
(effects (font (size 0.4 0.4) (thickness 0.075)))
)
(pad 2 smd rect (at 0.75 0 270) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask)
(net 1 /fpga/TX))
(pad 1 smd rect (at -0.75 0 270) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask)
2017-10-01 23:12:04 +02:00
(net 43 "Net-(D3-Pad1)"))
2017-09-29 22:56:25 +02:00
(model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0603.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Resistors_SMD:R_0603 (layer F.Cu) (tedit 59CF890F) (tstamp 5A11865F)
2017-09-29 22:56:25 +02:00
(at 116.84 108.331 270)
(descr "Resistor SMD 0603, reflow soldering, Vishay (see dcrcw.pdf)")
(tags "resistor 0603")
(path /59CE819F/59CEBBCC)
(attr smd)
2017-10-01 23:12:04 +02:00
(fp_text reference R5 (at 0.0635 -0.0635 270) (layer F.SilkS) hide
2017-09-29 22:56:25 +02:00
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 1k (at 0 1.5 270) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 1.25 0.7) (end -1.25 0.7) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.25 0.7) (end 1.25 -0.7) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.25 -0.7) (end -1.25 0.7) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.25 -0.7) (end 1.25 -0.7) (layer F.CrtYd) (width 0.05))
(fp_line (start -0.5 -0.68) (end 0.5 -0.68) (layer F.SilkS) (width 0.12))
(fp_line (start 0.5 0.68) (end -0.5 0.68) (layer F.SilkS) (width 0.12))
(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_text user %R (at 0 0 270) (layer F.Fab)
(effects (font (size 0.4 0.4) (thickness 0.075)))
)
(pad 2 smd rect (at 0.75 0 270) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask)
(net 2 /fpga/RX))
(pad 1 smd rect (at -0.75 0 270) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask)
2017-10-01 23:12:04 +02:00
(net 44 "Net-(D4-Pad1)"))
2017-09-29 22:56:25 +02:00
(model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0603.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Resistors_SMD:R_0603 (layer B.Cu) (tedit 58E0A804) (tstamp 5A118670)
2017-10-01 11:42:30 +02:00
(at 121.158 101.7397 180)
2017-09-29 22:56:25 +02:00
(descr "Resistor SMD 0603, reflow soldering, Vishay (see dcrcw.pdf)")
(tags "resistor 0603")
(path /59CE819F/59CEA10C)
(attr smd)
2017-10-01 23:12:04 +02:00
(fp_text reference R2 (at 0 -1.524 180) (layer B.SilkS)
2017-09-29 22:56:25 +02:00
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text value 33 (at 0 -1.5 180) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text user %R (at 0 0 180) (layer B.Fab)
(effects (font (size 0.4 0.4) (thickness 0.075)) (justify mirror))
)
(fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.1))
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.1))
(fp_line (start 0.5 -0.68) (end -0.5 -0.68) (layer B.SilkS) (width 0.12))
(fp_line (start -0.5 0.68) (end 0.5 0.68) (layer B.SilkS) (width 0.12))
(fp_line (start -1.25 0.7) (end 1.25 0.7) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.25 0.7) (end -1.25 -0.7) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.25 -0.7) (end 1.25 0.7) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.25 -0.7) (end -1.25 -0.7) (layer B.CrtYd) (width 0.05))
(pad 1 smd rect (at -0.75 0 180) (size 0.5 0.9) (layers B.Cu B.Paste B.Mask)
2017-10-01 23:12:04 +02:00
(net 33 /fpga/CLK_FPGA))
2017-09-29 22:56:25 +02:00
(pad 2 smd rect (at 0.75 0 180) (size 0.5 0.9) (layers B.Cu B.Paste B.Mask)
2017-10-01 23:12:04 +02:00
(net 47 "Net-(R2-Pad2)"))
2017-09-29 22:56:25 +02:00
(model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0603.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Resistors_SMD:R_0603 (layer B.Cu) (tedit 58E0A804) (tstamp 5A118681)
2017-10-01 11:42:30 +02:00
(at 118.999 102.3112 90)
2017-09-29 22:56:25 +02:00
(descr "Resistor SMD 0603, reflow soldering, Vishay (see dcrcw.pdf)")
(tags "resistor 0603")
(path /59CE819F/59CEA1C2)
(attr smd)
2017-10-01 23:12:04 +02:00
(fp_text reference R3 (at 0 -1.397 90) (layer B.SilkS)
2017-09-29 22:56:25 +02:00
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text value 33 (at 0 -1.5 90) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_line (start 1.25 -0.7) (end -1.25 -0.7) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.25 -0.7) (end 1.25 0.7) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.25 0.7) (end -1.25 -0.7) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.25 0.7) (end 1.25 0.7) (layer B.CrtYd) (width 0.05))
(fp_line (start -0.5 0.68) (end 0.5 0.68) (layer B.SilkS) (width 0.12))
(fp_line (start 0.5 -0.68) (end -0.5 -0.68) (layer B.SilkS) (width 0.12))
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.1))
(fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.1))
(fp_text user %R (at 0 0 90) (layer B.Fab)
(effects (font (size 0.4 0.4) (thickness 0.075)) (justify mirror))
)
(pad 2 smd rect (at 0.75 0 90) (size 0.5 0.9) (layers B.Cu B.Paste B.Mask)
2017-10-01 23:12:04 +02:00
(net 47 "Net-(R2-Pad2)"))
2017-09-29 22:56:25 +02:00
(pad 1 smd rect (at -0.75 0 90) (size 0.5 0.9) (layers B.Cu B.Paste B.Mask)
2017-10-01 23:12:04 +02:00
(net 34 /fpga/CLK_USBSER))
2017-09-29 22:56:25 +02:00
(model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0603.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Diodes_SMD:D_0805 (layer B.Cu) (tedit 590CE9A4) (tstamp 5A19B8E8)
(at 112.141 115.282 270)
(descr "Diode SMD in 0805 package http://datasheets.avx.com/schottky.pdf")
(tags "smd diode")
(path /59CE3CDF/59CE5824)
(attr smd)
(fp_text reference D2 (at -2.633 0 270) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text value POL (at 0 -1.7 270) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_line (start -1.6 0.8) (end 1 0.8) (layer B.SilkS) (width 0.12))
(fp_line (start -1.6 -0.8) (end 1 -0.8) (layer B.SilkS) (width 0.12))
(fp_line (start -1 0.65) (end 1 0.65) (layer B.Fab) (width 0.1))
(fp_line (start 1 0.65) (end 1 -0.65) (layer B.Fab) (width 0.1))
(fp_line (start 1 -0.65) (end -1 -0.65) (layer B.Fab) (width 0.1))
(fp_line (start -1 -0.65) (end -1 0.65) (layer B.Fab) (width 0.1))
(fp_line (start 0.2 0.2) (end -0.1 0) (layer B.Fab) (width 0.1))
(fp_line (start -0.1 0) (end 0.2 -0.2) (layer B.Fab) (width 0.1))
(fp_line (start 0.2 -0.2) (end 0.2 0.2) (layer B.Fab) (width 0.1))
(fp_line (start -0.1 0.2) (end -0.1 -0.2) (layer B.Fab) (width 0.1))
(fp_line (start -0.1 0) (end -0.3 0) (layer B.Fab) (width 0.1))
(fp_line (start 0.2 0) (end 0.4 0) (layer B.Fab) (width 0.1))
(fp_line (start -1.7 0.88) (end 1.7 0.88) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.7 0.88) (end 1.7 -0.88) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.7 -0.88) (end -1.7 -0.88) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.7 -0.88) (end -1.7 0.88) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer B.SilkS) (width 0.12))
(fp_text user %R (at 0 1.6 270) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(pad 2 smd rect (at 1.05 0 270) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask)
2017-10-01 23:12:04 +02:00
(net 42 /usbserial/VU))
2017-09-29 22:56:25 +02:00
(pad 1 smd rect (at -1.05 0 270) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask)
(net 5 VBUS))
(model ${KISYS3DMOD}/Diodes_SMD.3dshapes/D_0805.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module LEDs:LED_0603 (layer F.Cu) (tedit 57FE93A5) (tstamp 5A19C6CE)
(at 113.792 105.41 270)
(descr "LED 0603 smd package")
(tags "LED led 0603 SMD smd SMT smt smdled SMDLED smtled SMTLED")
(path /59CE0A28/59CF2B39)
(attr smd)
(fp_text reference D1 (at 0 1.27 270) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value Gn (at 0 1.35 270) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -1.45 -0.65) (end 1.45 -0.65) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.45 0.65) (end -1.45 -0.65) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.45 0.65) (end -1.45 0.65) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.45 -0.65) (end 1.45 0.65) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.3 -0.5) (end 0.8 -0.5) (layer F.SilkS) (width 0.12))
(fp_line (start -1.3 0.5) (end 0.8 0.5) (layer F.SilkS) (width 0.12))
(fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.15 -0.2) (end 0.15 0.2) (layer F.Fab) (width 0.1))
(fp_line (start 0.15 0.2) (end -0.15 0) (layer F.Fab) (width 0.1))
(fp_line (start -0.15 0) (end 0.15 -0.2) (layer F.Fab) (width 0.1))
(fp_line (start -0.2 -0.2) (end -0.2 0.2) (layer F.Fab) (width 0.1))
(fp_line (start -1.3 -0.5) (end -1.3 0.5) (layer F.SilkS) (width 0.12))
(pad 1 smd rect (at -0.8 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask)
(net 4 GND))
(pad 2 smd rect (at 0.8 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask)
2017-10-01 23:12:04 +02:00
(net 30 "Net-(D1-Pad2)"))
2017-09-29 22:56:25 +02:00
(model ${KISYS3DMOD}/LEDs.3dshapes/LED_0603.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
)
(module Resistors_SMD:R_0603 (layer F.Cu) (tedit 58E0A804) (tstamp 5A2A4299)
(at 113.792 108.331 90)
(descr "Resistor SMD 0603, reflow soldering, Vishay (see dcrcw.pdf)")
(tags "resistor 0603")
(path /59CE0A28/59CF2BD7)
(attr smd)
(fp_text reference R1 (at -2.2225 0.0635 90) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 1k (at 0 1.5 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 1.25 0.7) (end -1.25 0.7) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.25 0.7) (end 1.25 -0.7) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.25 -0.7) (end -1.25 0.7) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.25 -0.7) (end 1.25 -0.7) (layer F.CrtYd) (width 0.05))
(fp_line (start -0.5 -0.68) (end 0.5 -0.68) (layer F.SilkS) (width 0.12))
(fp_line (start 0.5 0.68) (end -0.5 0.68) (layer F.SilkS) (width 0.12))
(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_text user %R (at 0 0 90) (layer F.Fab)
(effects (font (size 0.4 0.4) (thickness 0.075)))
)
(pad 2 smd rect (at 0.75 0 90) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask)
2017-10-01 23:12:04 +02:00
(net 30 "Net-(D1-Pad2)"))
2017-09-29 22:56:25 +02:00
(pad 1 smd rect (at -0.75 0 90) (size 0.5 0.9) (layers F.Cu F.Paste F.Mask)
(net 7 +3V3))
(model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0603.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
2017-10-01 11:42:30 +02:00
(module Oscillators:Oscillator_SMD_EuroQuartz_XO91-4pin_7.0x5.0mm (layer B.Cu) (tedit 58CD3345) (tstamp 59D99D12)
(at 116.84 97.3582)
(descr "Miniature Crystal Clock Oscillator EuroQuartz XO91 series, http://cdn-reichelt.de/documents/datenblatt/B400/XO91.pdf, 7.0x5.0mm^2 package")
(tags "SMD SMT crystal oscillator")
(path /59CE819F/59CE9484)
(attr smd)
(fp_text reference U4 (at -4.7244 0) (layer B.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text value 12MHz (at 0 -4.1) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_circle (center 0 0) (end 0.233333 0) (layer B.Adhes) (width 0.466667))
(fp_circle (center 0 0) (end 0.533333 0) (layer B.Adhes) (width 0.333333))
(fp_circle (center 0 0) (end 0.833333 0) (layer B.Adhes) (width 0.333333))
(fp_circle (center 0 0) (end 1 0) (layer B.Adhes) (width 0.1))
(fp_line (start 3.8 3.4) (end -3.8 3.4) (layer B.CrtYd) (width 0.05))
(fp_line (start 3.8 -3.4) (end 3.8 3.4) (layer B.CrtYd) (width 0.05))
(fp_line (start -3.8 -3.4) (end 3.8 -3.4) (layer B.CrtYd) (width 0.05))
(fp_line (start -3.8 3.4) (end -3.8 -3.4) (layer B.CrtYd) (width 0.05))
(fp_line (start -3.5 -1.5) (end -2.5 -2.5) (layer B.Fab) (width 0.1))
(fp_line (start -3.5 2.4) (end -3.4 2.5) (layer B.Fab) (width 0.1))
(fp_line (start -3.5 -2.4) (end -3.5 2.4) (layer B.Fab) (width 0.1))
(fp_line (start -3.4 -2.5) (end -3.5 -2.4) (layer B.Fab) (width 0.1))
(fp_line (start 3.4 -2.5) (end -3.4 -2.5) (layer B.Fab) (width 0.1))
(fp_line (start 3.5 -2.4) (end 3.4 -2.5) (layer B.Fab) (width 0.1))
(fp_line (start 3.5 2.4) (end 3.5 -2.4) (layer B.Fab) (width 0.1))
(fp_line (start 3.4 2.5) (end 3.5 2.4) (layer B.Fab) (width 0.1))
(fp_line (start -3.4 2.5) (end 3.4 2.5) (layer B.Fab) (width 0.1))
(fp_text user %R (at 0 0) (layer B.Fab)
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(pad 4 smd rect (at -2.5 2.1) (size 2 2) (layers B.Cu B.Paste B.Mask)
(net 7 +3V3))
(pad 3 smd rect (at 2.5 2.1) (size 2 2) (layers B.Cu B.Paste B.Mask)
2017-10-01 23:12:04 +02:00
(net 47 "Net-(R2-Pad2)"))
2017-10-01 11:42:30 +02:00
(pad 2 smd rect (at 2.5 -2.1) (size 2 2) (layers B.Cu B.Paste B.Mask)
(net 4 GND))
(pad 1 smd rect (at -2.5 -2.1) (size 2 2) (layers B.Cu B.Paste B.Mask)
2017-10-01 23:12:04 +02:00
(net 35 "Net-(U4-Pad1)"))
2017-10-01 11:42:30 +02:00
(model ${KISYS3DMOD}/Oscillators.3dshapes/Oscillator_SMD_EuroQuartz_XO91-4pin_7.0x5.0mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
(model ${KISYS3DMOD}/Crystals.3dshapes/Crystal_SMD_SeikoEpson_TSX3225-4pin_3.2x2.5mm.wrl
(at (xyz 0 0 0))
(scale (xyz 0.5 0.5 0.5))
(rotate (xyz 0 0 0))
)
)
2017-10-01 22:33:15 +02:00
(gr_line (start 121.92 90.551) (end 122.047 90.678) (layer F.SilkS) (width 0.1))
(gr_line (start 121.793 90.678) (end 121.92 90.551) (layer F.SilkS) (width 0.1))
(gr_line (start 121.92 90.8939) (end 121.92 89.4715) (layer F.SilkS) (width 0.1) (tstamp 59D144C0))
(gr_line (start 121.92 92.1258) (end 121.92 90.7034) (layer F.SilkS) (width 0.2) (tstamp 59D13EDD))
2017-10-01 11:42:30 +02:00
(gr_line (start 113.0554 93.98) (end 113.7666 93.98) (layer B.SilkS) (width 0.2))
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2017-10-01 11:57:13 +02:00
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2017-10-01 22:33:15 +02:00
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2017-09-29 22:56:25 +02:00
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2017-10-01 11:57:13 +02:00
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2017-10-01 22:33:15 +02:00
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2017-10-01 22:33:15 +02:00
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