doc: Add DTR usage, 2.5 V mod, power supply notes
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doc/lit.bib
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doc/lit.bib
@ -43,3 +43,13 @@
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Timestamp = {2017.11.10},
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Url = {http://www.latticesemi.com/~/media/LatticeSemi/Documents/DataSheets/MachXO23/MachXO2FamilyDataSheet.pdf?document_id=38834}
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}
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@Manual{ioguide,
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Title = {MachXO2 sysIO Usage Guide},
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Author = {Lattice~Semiconductor},
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Month = {9},
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Year = {2016},
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Owner = {markus},
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Timestamp = {2017.11.25},
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Url = {http://www.latticesemi.com/~/media/LatticeSemi/Documents/ApplicationNotes/MO/MachXO2sysIOUsageGuide.pdf?document_id=39083}
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}
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@ -29,7 +29,7 @@ pdflang=en,
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\usepackage{booktabs}
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\usepackage{multirow}
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\usepackage{graphicx}
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\usepackage{color}
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\usepackage{xcolor}
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\usepackage{pdfpages}
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\usepackage{pdflscape}
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\usepackage[american]{babel}
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@ -44,6 +44,11 @@ bibencoding=utf8
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\addbibresource{lit.bib}
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\DeclareLanguageMapping{american}{american-apa}
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\newcommand\Warning{%
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\makebox[1.4em][c]{%
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\makebox[0pt][c]{\raisebox{.1em}{\small!}}%
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\makebox[0pt][c]{\color{red}\Large$\bigtriangleup$}}}%
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\usepackage{caption}
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\captionsetup{labelfont=bf}
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@ -58,6 +63,8 @@ bibencoding=utf8
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\setlength{\parindent}{0cm}
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\setlength{\parskip}{1em}
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\newcommand{\hwmod}[1]{\paragraph{\Warning Hardware Modification \Warning} #1}
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\begin{document}
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\maketitle
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@ -72,6 +79,7 @@ The Tiny-XO2 is a small, versatile and cost-effective development platform for t
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In addition to the \ac{fpga}, it provides a \ac{usb} to \ac{uart} converter and a crystal to include the basic set of components for any \ac{fpga} design.
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This manual applies to hardware revision 01.
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\chapter{Hardware}
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This chapter explains all available hardware functions.
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@ -111,7 +119,9 @@ The board can be powered either via \ac{usb} or using the \texttt{VB} pin on pin
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The \texttt{3V} pins on the pin headers can be used to supply the on-board generated 3.3 V to supporting circuitry. The maximum current to be drawn from these pins is 500 mA\footnote{The maximum current of the AP1117 voltage regulator is 800 mA\parencite[page 4]{tlv1117}. Watch the temperature of \texttt{U1} when drawing high amounts of current.}.
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All \ac{io} pins on header \texttt{J3} use the voltage on pin \texttt{VX} as bank voltage. By populating \texttt{R9} with a zero Ohm resistor, the bank can be connected to the on-board 3.3 V supply. In this case, \texttt{VX} becomes a normal \texttt{3V} pin. See chapter \ref{ioheaders} for more details.
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All \ac{io} pins on header \texttt{J3} use the voltage on pin \texttt{VX} as bank voltage. It may range from 1.2 V to 3.3 V \parencite[page 8]{ioguide}. By populating \texttt{R9} with a zero Ohm resistor, the bank can be connected to the on-board 3.3 V supply. In this case, \texttt{VX} becomes a normal \texttt{3V} pin. See chapter \ref{ioheaders} for more details.
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\hwmod{If a 2.5 V supply voltage is required for all \ac{io} pins, the main voltage regulator \texttt{U1} can be replaced with a 1117-2.5 2.5 V voltage regulator. The \ac{fpga} will continue to function normally in this case. When doing this, all \texttt{3V} pins carry 2.5 V. \texttt{VX} may be supplied with up to 3.3 V. \textbf{The CH340G \ac{usb}-to-serial converter will stop working in this configuration}, so it needs to be removed from the board.}
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\section{\acs{fpga}}
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\label{fpga}
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@ -159,6 +169,10 @@ Additionally, the \ac{rx} and \ac{tx} lines have an \ac{led} connected in parall
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\end{tabular}
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\end{table}
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\paragraph{Reset on terminal.} By default, the \texttt{DTR} pin is pulled low by the CH340 as soon as the terminal is opened on the PC and remains high while it is closed. This high-to-low transition can be detected using an edge detector inside the \ac{fpga} to generate a reset for the rest of the design.
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\hwmod{If only a short pulse is desired when the terminal is opened, \texttt{R8} should be exchanged with a 100 nF capacitor and the internal pull-up of the \ac{fpga} must be enabled. Now, each time the terminal is opened on the PC, the DTR line on the \ac{fpga} will go low for a few ms.}
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\section{Crystal Oscillator}
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\label{crystal}
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The board features a 12 MHz crystal oscillator. It supplies the clock to the \ac{usb}-to-\ac{uart} converter and is also connected to pin \texttt{28} of the \ac{fpga}. If the 12 MHz clock signal is not needed on the \ac{fpga}, resistor \texttt{R2} can be removed to free pin \texttt{28} as a general purpose \ac{io} pin.
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@ -288,6 +302,7 @@ All \ac{io} pins are available as user \acp{io}.
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\centering
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\begin{tabular}{ll} \toprule
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\textbf{Version} & \textbf{Comment} \\ \midrule
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2017-11-25 & DTR usage, 2.5 V mod \\
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2017-11-16 & Editorial changes \\
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2017-11-10 & Initial draft \\ \bottomrule
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\end{tabular}
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