doc: Add DTR usage, 2.5 V mod, power supply notes

This commit is contained in:
Markus Koch 2017-11-25 13:30:44 +01:00
parent 9b045252c8
commit d67d16dcf4
2 changed files with 27 additions and 2 deletions

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@ -43,3 +43,13 @@
Timestamp = {2017.11.10}, Timestamp = {2017.11.10},
Url = {http://www.latticesemi.com/~/media/LatticeSemi/Documents/DataSheets/MachXO23/MachXO2FamilyDataSheet.pdf?document_id=38834} Url = {http://www.latticesemi.com/~/media/LatticeSemi/Documents/DataSheets/MachXO23/MachXO2FamilyDataSheet.pdf?document_id=38834}
} }
@Manual{ioguide,
Title = {MachXO2 sysIO Usage Guide},
Author = {Lattice~Semiconductor},
Month = {9},
Year = {2016},
Owner = {markus},
Timestamp = {2017.11.25},
Url = {http://www.latticesemi.com/~/media/LatticeSemi/Documents/ApplicationNotes/MO/MachXO2sysIOUsageGuide.pdf?document_id=39083}
}

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@ -29,7 +29,7 @@ pdflang=en,
\usepackage{booktabs} \usepackage{booktabs}
\usepackage{multirow} \usepackage{multirow}
\usepackage{graphicx} \usepackage{graphicx}
\usepackage{color} \usepackage{xcolor}
\usepackage{pdfpages} \usepackage{pdfpages}
\usepackage{pdflscape} \usepackage{pdflscape}
\usepackage[american]{babel} \usepackage[american]{babel}
@ -44,6 +44,11 @@ bibencoding=utf8
\addbibresource{lit.bib} \addbibresource{lit.bib}
\DeclareLanguageMapping{american}{american-apa} \DeclareLanguageMapping{american}{american-apa}
\newcommand\Warning{%
\makebox[1.4em][c]{%
\makebox[0pt][c]{\raisebox{.1em}{\small!}}%
\makebox[0pt][c]{\color{red}\Large$\bigtriangleup$}}}%
\usepackage{caption} \usepackage{caption}
\captionsetup{labelfont=bf} \captionsetup{labelfont=bf}
@ -58,6 +63,8 @@ bibencoding=utf8
\setlength{\parindent}{0cm} \setlength{\parindent}{0cm}
\setlength{\parskip}{1em} \setlength{\parskip}{1em}
\newcommand{\hwmod}[1]{\paragraph{\Warning Hardware Modification \Warning} #1}
\begin{document} \begin{document}
\maketitle \maketitle
@ -72,6 +79,7 @@ The Tiny-XO2 is a small, versatile and cost-effective development platform for t
In addition to the \ac{fpga}, it provides a \ac{usb} to \ac{uart} converter and a crystal to include the basic set of components for any \ac{fpga} design. In addition to the \ac{fpga}, it provides a \ac{usb} to \ac{uart} converter and a crystal to include the basic set of components for any \ac{fpga} design.
This manual applies to hardware revision 01.
\chapter{Hardware} \chapter{Hardware}
This chapter explains all available hardware functions. This chapter explains all available hardware functions.
@ -111,7 +119,9 @@ The board can be powered either via \ac{usb} or using the \texttt{VB} pin on pin
The \texttt{3V} pins on the pin headers can be used to supply the on-board generated 3.3 V to supporting circuitry. The maximum current to be drawn from these pins is 500 mA\footnote{The maximum current of the AP1117 voltage regulator is 800 mA\parencite[page 4]{tlv1117}. Watch the temperature of \texttt{U1} when drawing high amounts of current.}. The \texttt{3V} pins on the pin headers can be used to supply the on-board generated 3.3 V to supporting circuitry. The maximum current to be drawn from these pins is 500 mA\footnote{The maximum current of the AP1117 voltage regulator is 800 mA\parencite[page 4]{tlv1117}. Watch the temperature of \texttt{U1} when drawing high amounts of current.}.
All \ac{io} pins on header \texttt{J3} use the voltage on pin \texttt{VX} as bank voltage. By populating \texttt{R9} with a zero Ohm resistor, the bank can be connected to the on-board 3.3 V supply. In this case, \texttt{VX} becomes a normal \texttt{3V} pin. See chapter \ref{ioheaders} for more details. All \ac{io} pins on header \texttt{J3} use the voltage on pin \texttt{VX} as bank voltage. It may range from 1.2 V to 3.3 V \parencite[page 8]{ioguide}. By populating \texttt{R9} with a zero Ohm resistor, the bank can be connected to the on-board 3.3 V supply. In this case, \texttt{VX} becomes a normal \texttt{3V} pin. See chapter \ref{ioheaders} for more details.
\hwmod{If a 2.5 V supply voltage is required for all \ac{io} pins, the main voltage regulator \texttt{U1} can be replaced with a 1117-2.5 2.5 V voltage regulator. The \ac{fpga} will continue to function normally in this case. When doing this, all \texttt{3V} pins carry 2.5 V. \texttt{VX} may be supplied with up to 3.3 V. \textbf{The CH340G \ac{usb}-to-serial converter will stop working in this configuration}, so it needs to be removed from the board.}
\section{\acs{fpga}} \section{\acs{fpga}}
\label{fpga} \label{fpga}
@ -159,6 +169,10 @@ Additionally, the \ac{rx} and \ac{tx} lines have an \ac{led} connected in parall
\end{tabular} \end{tabular}
\end{table} \end{table}
\paragraph{Reset on terminal.} By default, the \texttt{DTR} pin is pulled low by the CH340 as soon as the terminal is opened on the PC and remains high while it is closed. This high-to-low transition can be detected using an edge detector inside the \ac{fpga} to generate a reset for the rest of the design.
\hwmod{If only a short pulse is desired when the terminal is opened, \texttt{R8} should be exchanged with a 100 nF capacitor and the internal pull-up of the \ac{fpga} must be enabled. Now, each time the terminal is opened on the PC, the DTR line on the \ac{fpga} will go low for a few ms.}
\section{Crystal Oscillator} \section{Crystal Oscillator}
\label{crystal} \label{crystal}
The board features a 12 MHz crystal oscillator. It supplies the clock to the \ac{usb}-to-\ac{uart} converter and is also connected to pin \texttt{28} of the \ac{fpga}. If the 12 MHz clock signal is not needed on the \ac{fpga}, resistor \texttt{R2} can be removed to free pin \texttt{28} as a general purpose \ac{io} pin. The board features a 12 MHz crystal oscillator. It supplies the clock to the \ac{usb}-to-\ac{uart} converter and is also connected to pin \texttt{28} of the \ac{fpga}. If the 12 MHz clock signal is not needed on the \ac{fpga}, resistor \texttt{R2} can be removed to free pin \texttt{28} as a general purpose \ac{io} pin.
@ -288,6 +302,7 @@ All \ac{io} pins are available as user \acp{io}.
\centering \centering
\begin{tabular}{ll} \toprule \begin{tabular}{ll} \toprule
\textbf{Version} & \textbf{Comment} \\ \midrule \textbf{Version} & \textbf{Comment} \\ \midrule
2017-11-25 & DTR usage, 2.5 V mod \\
2017-11-16 & Editorial changes \\ 2017-11-16 & Editorial changes \\
2017-11-10 & Initial draft \\ \bottomrule 2017-11-10 & Initial draft \\ \bottomrule
\end{tabular} \end{tabular}