PCB, FPGA, and SW design to implement a tiny Ethernet-connected SoC based on [SERV](https://github.com/olofk/serv) + [Trashernet](https://git.notsyncing.net/fpga/trashernet).
## License
Trashernet SoC, Copyright (C) 2024 Markus Koch <markus@notsyncing.net>
### Hardware
The PCB design in `/kicad` is released under a [Creative Commons Attribution-ShareAlike 4.0 International license](https://creativecommons.org/licenses/by-sa/4.0/).
You can find a copy of the full license in [LICENSE-CC-BY-SA-4.0.TXT](./LICENSE-CC-BY-SA-4.0.TXT).
The FPGA Source Code Form in `/fpga` is subject to the terms of the Mozilla Public License, v. 2.0.
You can find a copy of the full license in [LICENSE-MPL-2.0.txt](./LICENSE-MPL-2.0.txt).
Note that this design incorporates code from third-party projects, which may come with further restrictions. For details, refer to the individual projects's licensing terms:
