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fpga: run.py: Increase NVC heap size to simulate full 8 MB of external RAM

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Markus Koch 2024-11-08 10:31:19 +01:00
parent 4ca35ca18c
commit 0943656548
1 changed files with 2 additions and 1 deletions
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fpga/run.py
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@ -57,6 +57,7 @@ if not "osvvm" in libs:
vu.add_compile_option("ghdl.a_flags", ["-frelaxed", "-fsynopsys"]) vu.add_compile_option("ghdl.a_flags", ["-frelaxed", "-fsynopsys"])
vu.add_compile_option("nvc.a_flags", ["--relaxed"]) vu.add_compile_option("nvc.a_flags", ["--relaxed"])
#vu.set_sim_option("nvc.elab_flags", ["-O3"]) #vu.set_sim_option("nvc.elab_flags", ["-O3"])
vu.set_sim_option("nvc.sim_flags", ["--format=fst", "--wave=wave.fst"]) vu.set_sim_option("nvc.heap_size", "256M")
vu.set_sim_option("nvc.sim_flags", ["--format=fst", "--wave=wave.fst", "--dump-arrays"])
vu.main() vu.main()