electronics/trashernet-soc
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

env: run.py: Remove unnecessary files from compilation for synthesis

Browse Source
This commit is contained in:
Markus Koch 2024-07-07 15:58:32 +02:00
parent 07bac62438
commit 23c7d0ab20
1 changed files with 4 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
fpga/run.py
View File

@ -22,8 +22,8 @@ project_dir=pathlib.Path(__file__).parent.resolve()
libs = {}
vu = VUnit.from_argv()
vu.add_vhdl_builtins()
vu = VUnit.from_argv(compile_builtins=False)
#vu.add_vhdl_builtins()
for base_path in libraries:
for library_name in libraries[base_path]:
@ -47,8 +47,8 @@ for base_path in libraries:
libs[library_name].add_source_files(path)
# If we don't already use our own OSVVM implementation, add the default one.
if not "osvvm" in libs:
vu.add_osvvm()
#if not "osvvm" in libs:
# vu.add_osvvm()
vu.add_compile_option("ghdl.a_flags", ["-frelaxed", "-fsynopsys"])
vu.add_compile_option("nvc.a_flags", ["--relaxed"])