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fpga: aps6404l device model: Allow preloading memory from file

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This commit is contained in:
Markus Koch 2024-11-08 10:28:54 +01:00
parent 8cf103a18d
commit 539d2e0908
1 changed files with 21 additions and 2 deletions
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23
fpga/hdl/device_models/aps6404l.vhd
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@ -16,7 +16,9 @@ use std.textio.all;
entity aps6404l is
generic(
LOG_EN : boolean := true
SIZE : natural := 1024;
LOG_EN : boolean := true;
MEMFILE : string := ""
);
port(
ce_n : in std_logic;
@ -41,7 +43,24 @@ begin
test : process is
type rx_state_t is (COMMAND, READ, WRITE, COMPLETE);
type byte_vector is array (natural range <>) of std_logic_vector(7 downto 0);
variable mem : byte_vector(0 to 1023);
subtype mem_t is byte_vector(0 to SIZE - 1);
impure function init_ram_hex return mem_t is
file text_file : text;
variable text_line : line;
variable ram_content : mem_t := (others => x"5A");
begin
if MEMFILE /= "" then
file_open(text_file, MEMFILE, read_mode);
for i in 0 to SIZE - 1 loop
exit when endfile(text_file);
readline(text_file, text_line);
hread(text_line, ram_content(i));
end loop;
end if;
return ram_content;
end function;
variable mem : mem_t := init_ram_hex;
variable bytes : byte_vector(0 to 32);
variable cnt, bytecnt : integer;
variable state : rx_state_t;