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trashernet-soc/fpga
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Markus Koch 23c7d0ab20 env: run.py: Remove unnecessary files from compilation for synthesis
2024-07-07 15:58:32 +02:00
..
hdl
fpga: Test Trashernet TX
2024-07-07 15:31:41 +02:00
.gitignore
fpga: Implement basic SERV SoC
2024-06-22 11:28:15 +02:00
constraints.pcf
fpga: Continue work on full HW support
2024-07-06 19:14:39 +02:00
Makefile
env: Replace build script with proper Makefile
2024-07-06 19:15:20 +02:00
run.py
env: run.py: Remove unnecessary files from compilation for synthesis
2024-07-07 15:58:32 +02:00
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