Logo
Explore Help
Sign In
electronics/trashernet-soc
1
0
Fork 0
You've already forked trashernet-soc
Code Issues Pull Requests Packages Projects Releases Wiki Activity
trashernet-soc/fpga/hdl/generics
History
Markus Koch e7d9f391ef fpga: Clean up clocking code
2024-08-09 14:01:16 +02:00
..
fifo_block.vhd
fpga: Continue work on full HW support
2024-07-06 19:14:39 +02:00
fifo.vhd
fpga: Add generic FIFO core
2024-07-26 10:55:32 +02:00
ice40_components.vhd
fpga: Clean up clocking code
2024-08-09 14:01:16 +02:00
synchronizer.vhd
fpga: Implement basic SERV SoC
2024-06-22 11:28:15 +02:00
uart_rx.vhd
fpga: Implement basic SERV SoC
2024-06-22 11:28:15 +02:00
uart_tx.vhd
fpga: Implement basic SERV SoC
2024-06-22 11:28:15 +02:00
wishbone_arbiter.vhd
fpga: Implement basic SERV SoC
2024-06-22 11:28:15 +02:00
wishbone_pkg.vhd
fpga: Implement basic SERV SoC
2024-06-22 11:28:15 +02:00
Powered by Gitea Version: 1.23.5 Page: 21ms Template: 2ms
English
Bahasa Indonesia Deutsch English Español Français Gaeilge Italiano Latviešu Magyar nyelv Nederlands Polski Português de Portugal Português do Brasil Suomi Svenska Türkçe Čeština Ελληνικά Български Русский Українська فارسی മലയാളം 日本語 简体中文 繁體中文(台灣) 繁體中文(香港) 한국어
Licenses API